Merge "lib: malloc: Flush the cache after allocating on heap"
diff --git a/dev/gcdb/display/include/panel_hx8394d_720p_video.h b/dev/gcdb/display/include/panel_hx8394d_720p_video.h
index 3ab32f8..ac4806f 100644
--- a/dev/gcdb/display/include/panel_hx8394d_720p_video.h
+++ b/dev/gcdb/display/include/panel_hx8394d_720p_video.h
@@ -283,6 +283,6 @@
1, 1, 4095, 100, 1, "PMIC_8941"
};
-#define HX8394D_720P_VIDEO_SIGNATURE 0xFFFF
+#define HX8394D_720P_VIDEO_SIGNATURE 0xa0087
#endif /*_HX8394D_720P_VIDEO_H_*/
diff --git a/platform/msm8909/include/platform/iomap.h b/platform/msm8909/include/platform/iomap.h
index e2a66fe..bca7c54 100644
--- a/platform/msm8909/include/platform/iomap.h
+++ b/platform/msm8909/include/platform/iomap.h
@@ -280,4 +280,5 @@
#define SECURITY_CONTROL_CORE_FEATURE_CONFIG0 0x0005E004
/* EBI2 */
#define TLMM_EBI2_EMMC_GPIO_CFG (TLMM_BASE_ADDR + 0x00111000)
+#define TCSR_BOOT_MISC_DETECT 0x193D100
#endif
diff --git a/platform/msm8916/include/platform/iomap.h b/platform/msm8916/include/platform/iomap.h
index fd56c0e..d98bbdf 100644
--- a/platform/msm8916/include/platform/iomap.h
+++ b/platform/msm8916/include/platform/iomap.h
@@ -265,4 +265,5 @@
#define HS_TIMER_CTRL 0x0BC
#define TCSR_TZ_WONCE 0x193D000
+#define TCSR_BOOT_MISC_DETECT 0x193D100
#endif
diff --git a/platform/msm_shared/include/scm.h b/platform/msm_shared/include/scm.h
index 283f1cc..83685d5 100644
--- a/platform/msm_shared/include/scm.h
+++ b/platform/msm_shared/include/scm.h
@@ -256,6 +256,7 @@
#define PRNG_CMD_ID 0x01
#define IS_CALL_AVAIL_CMD 0x01
+#define IS_SECURE_BOOT_ENABLED 0x04
/* Download Mode specific arguments to be passed to TZ */
#define SCM_EDLOAD_MODE 0x01
@@ -337,6 +338,7 @@
#define SCM_SVC_PWR 0x9
#define SCM_IO_DISABLE_PMIC_ARBITER 0x1
+#define SCM_IO_DISABLE_PMIC_ARBITER1 0x2
#define SCM_SVC_MILESTONE_32_64_ID 0x1
#define SCM_SVC_MILESTONE_CMD_ID 0xf
@@ -349,6 +351,11 @@
/* Apps CE resource. */
#define TZ_RESOURCE_CE_AP 2
+/* Secure IO Service IDs */
+#define SCM_IO_READ 0x1
+#define SCM_IO_WRITE 0x2
+#define SCM_SVC_IO 0x5
+
uint8_t switch_ce_chn_cmd(enum ap_ce_channel_type channel);
/**
@@ -443,4 +450,5 @@
* Used for checking if armv8 SCM support present
*/
void scm_init();
+bool is_secure_boot_enable();
#endif
diff --git a/platform/msm_shared/scm.c b/platform/msm_shared/scm.c
index b45fd3d..681b238 100644
--- a/platform/msm_shared/scm.c
+++ b/platform/msm_shared/scm.c
@@ -34,6 +34,8 @@
#include <arch/ops.h>
#include <rand.h>
#include <image_verify.h>
+#include <dload_util.h>
+#include <platform/iomap.h>
#include "scm.h"
#pragma GCC optimize ("O0")
@@ -54,6 +56,7 @@
/* SCM interface as per ARM spec present? */
bool scm_arm_support;
+static uint32_t scm_io_write(uint32_t address, uint32_t val);
static void scm_arm_support_available(uint32_t svc_id, uint32_t cmd_id)
{
@@ -958,14 +961,29 @@
int scm_halt_pmic_arbiter()
{
int ret = 0;
+ scmcall_arg scm_arg = {0};
- if (scm_arm_support)
- {
- dprintf(INFO, "%s:SCM call is not supported\n",__func__);
- return -1;
+ if (scm_arm_support) {
+ scm_arg.x0 = MAKE_SIP_SCM_CMD(SCM_SVC_PWR, SCM_IO_DISABLE_PMIC_ARBITER);
+ scm_arg.x1 = MAKE_SCM_ARGS(0x1);
+ scm_arg.x2 = 0;
+ scm_arg.atomic = true;
+ ret = scm_call2(&scm_arg, NULL);
+ } else {
+ ret = scm_call_atomic(SCM_SVC_PWR, SCM_IO_DISABLE_PMIC_ARBITER, 0);
}
- ret = scm_call_atomic(SCM_SVC_PWR, SCM_IO_DISABLE_PMIC_ARBITER, 0);
+ /* Retry with the SCM_IO_DISABLE_PMIC_ARBITER1 func ID if the above Func ID fails*/
+ if(ret) {
+ if (scm_arm_support) {
+ scm_arg.x0 = MAKE_SIP_SCM_CMD(SCM_SVC_PWR, SCM_IO_DISABLE_PMIC_ARBITER1);
+ scm_arg.x1 = MAKE_SCM_ARGS(0x1);
+ scm_arg.x2 = 0;
+ scm_arg.atomic = true;
+ ret = scm_call2(&scm_arg, NULL);
+ } else
+ ret = scm_call_atomic(SCM_SVC_PWR, SCM_IO_DISABLE_PMIC_ARBITER1, 0);
+ }
return ret;
}
@@ -1178,3 +1196,133 @@
return 0;
}
+
+static bool secure_boot_enable = false;
+static bool wdog_debug_fuse_disable = false;
+
+void scm_check_boot_fuses()
+{
+ uint32_t ret = 0;
+ uint32_t resp;
+ scmcall_arg scm_arg = {0};
+ scmcall_ret scm_ret = {0};
+
+ if (!scm_arm_support) {
+ ret = scm_call(TZBSP_SVC_INFO, IS_SECURE_BOOT_ENABLED, NULL, 0, &resp, sizeof(resp));
+ } else {
+ scm_arg.x0 = MAKE_SIP_SCM_CMD(TZBSP_SVC_INFO, IS_SECURE_BOOT_ENABLED);
+ ret = scm_call2(&scm_arg, &scm_ret);
+ resp = scm_ret.x1;
+ }
+
+ /* Parse Bit 0 and Bit 2 of the response */
+ if(!ret) {
+ /* Bit 0 - SECBOOT_ENABLE_CHECK */
+ if(resp & 0x1)
+ secure_boot_enable = true;
+ /* Bit 2 - DEBUG_DISABLE_CHECK */
+ if(resp & 0x4)
+ wdog_debug_fuse_disable = true;
+ } else
+ dprintf(CRITICAL, "scm call to check secure boot fuses failed\n");
+}
+
+bool is_secure_boot_enable()
+{
+ scm_check_boot_fuses();
+ return secure_boot_enable;
+}
+
+static uint32_t scm_io_read(addr_t address)
+{
+ uint32_t ret;
+ scmcall_arg scm_arg = {0};
+ scmcall_ret scm_ret = {0};
+
+ if (!scm_arm_support) {
+ ret = scm_call_atomic(SCM_SVC_IO, SCM_IO_READ, address);
+ } else {
+ scm_arg.x0 = MAKE_SIP_SCM_CMD(SCM_SVC_IO, SCM_IO_READ);
+ scm_arg.x1 = MAKE_SCM_ARGS(0x1);
+ scm_arg.x2 = address;
+ scm_arg.atomic = true;
+ ret = scm_call2(&scm_arg, &scm_ret);
+ }
+ return ret;
+}
+
+static uint32_t scm_io_write(uint32_t address, uint32_t val)
+{
+ uint32_t ret;
+ scmcall_arg scm_arg = {0};
+ scmcall_ret scm_ret = {0};
+
+ if (!scm_arm_support) {
+ ret = scm_call_atomic2(SCM_SVC_IO, SCM_IO_WRITE, address, val);
+ } else {
+ scm_arg.x0 = MAKE_SIP_SCM_CMD(SCM_SVC_IO, SCM_IO_WRITE);
+ scm_arg.x1 = MAKE_SCM_ARGS(0x2);
+ scm_arg.x2 = address;
+ scm_arg.x3 = val;
+ scm_arg.atomic = true;
+ ret = scm_call2(&scm_arg, &scm_ret);
+ }
+ return ret;
+}
+
+static int scm_call2_atomic(uint32_t svc, uint32_t cmd, uint32_t arg1, uint32_t arg2)
+{
+ uint32_t ret = 0;
+ scmcall_arg scm_arg = {0};
+ scmcall_ret scm_ret = {0};
+
+ if (!scm_arm_support)
+ {
+ ret = scm_call_atomic2(svc, cmd, arg1, arg2);
+ } else {
+ scm_arg.x0 = MAKE_SIP_SCM_CMD(svc, cmd);
+ scm_arg.x1 = MAKE_SCM_ARGS(0x2);
+ scm_arg.x2 = arg1;
+ scm_arg.x3 = arg2;
+ ret = scm_call2(&scm_arg, &scm_ret);
+ }
+ return ret;
+}
+
+#if PLATFORM_USE_SCM_DLOAD
+int scm_dload_mode(int mode)
+{
+ int ret = 0;
+ uint32_t dload_type;
+
+ dprintf(SPEW, "DLOAD mode: %d\n", mode);
+ if (mode == NORMAL_DLOAD)
+ dload_type = SCM_DLOAD_MODE;
+ else if(mode == EMERGENCY_DLOAD)
+ dload_type = SCM_EDLOAD_MODE;
+ else
+ dload_type = 0;
+
+ /* Write to the Boot MISC register */
+ ret = scm_call2_atomic(SCM_SVC_BOOT, SCM_DLOAD_CMD, dload_type, 0);
+
+ if (ret) {
+ ret = scm_io_write(TCSR_BOOT_MISC_DETECT,dload_type);
+ if(ret) {
+ dprintf(CRITICAL, "Failed to write to boot misc: %d\n", ret);
+ return ret;
+ }
+ }
+
+ scm_check_boot_fuses();
+
+ /* Make WDOG_DEBUG DISABLE scm call only in non-secure boot */
+ if(!(secure_boot_enable || wdog_debug_fuse_disable)) {
+ ret = scm_call2_atomic(SCM_SVC_BOOT, WDOG_DEBUG_DISABLE, 1, 0);
+ if(ret)
+ dprintf(CRITICAL, "Failed to disable the wdog debug \n");
+ }
+
+ return ret;
+}
+#endif
diff --git a/project/msm8909.mk b/project/msm8909.mk
index afc40f6..3eea90b 100644
--- a/project/msm8909.mk
+++ b/project/msm8909.mk
@@ -65,3 +65,6 @@
ifeq ($(ENABLE_BOOT_CONFIG_SUPPORT),1)
DEFINES += BOOT_CONFIG_SUPPORT=1
endif
+
+#SCM call before entering DLOAD mode
+DEFINES += PLATFORM_USE_SCM_DLOAD=1
diff --git a/project/msm8916.mk b/project/msm8916.mk
index 5f51f80..2dff5df 100644
--- a/project/msm8916.mk
+++ b/project/msm8916.mk
@@ -51,3 +51,6 @@
#enable user force reset feature
DEFINES += USER_FORCE_RESET_SUPPORT=1
+
+#SCM call before entering DLOAD mode
+DEFINES += PLATFORM_USE_SCM_DLOAD=1
diff --git a/target/fsm9010/meminfo.c b/target/fsm9010/meminfo.c
index fa0f96a..3c1fc98 100644
--- a/target/fsm9010/meminfo.c
+++ b/target/fsm9010/meminfo.c
@@ -90,6 +90,6 @@
unsigned target_get_max_flash_size(void)
{
- return (86 * 1024 * 1024);
+ return (222 * 1024 * 1024);
}
#endif /* DEVICE_TREE */
diff --git a/target/fsm9010/rules.mk b/target/fsm9010/rules.mk
index 17a1b1d..8e7fd48 100644
--- a/target/fsm9010/rules.mk
+++ b/target/fsm9010/rules.mk
@@ -12,7 +12,7 @@
TAGS_ADDR := BASE_ADDR+0x01e00000
KERNEL_ADDR := BASE_ADDR+0x00008000
RAMDISK_ADDR := BASE_ADDR+0x02000000
-SCRATCH_ADDR := 0x0e000000
+SCRATCH_ADDR := 0x32200000
MODULES += \
dev/keys \
diff --git a/target/msm8909/init.c b/target/msm8909/init.c
index 96232fe..7b055a5 100644
--- a/target/msm8909/init.c
+++ b/target/msm8909/init.c
@@ -378,30 +378,6 @@
return restart_reason;
}
-static int scm_dload_mode(int mode)
-{
- int ret = 0;
- uint32_t dload_type;
-
- dprintf(SPEW, "DLOAD mode: %d\n", mode);
- if (mode == NORMAL_DLOAD)
- dload_type = SCM_DLOAD_MODE;
- else if(mode == EMERGENCY_DLOAD)
- dload_type = SCM_EDLOAD_MODE;
- else
- dload_type = 0;
-
- ret = scm_call_atomic2(SCM_SVC_BOOT, SCM_DLOAD_CMD, dload_type, 0);
- if (ret)
- dprintf(CRITICAL, "Failed to write to boot misc: %d\n", ret);
-
- ret = scm_call_atomic2(SCM_SVC_BOOT, WDOG_DEBUG_DISABLE, 1, 0);
- if (ret)
- dprintf(CRITICAL, "Failed to disable the wdog debug \n");
-
- return ret;
-}
-
/* Configure PMIC and Drop PS_HOLD for shutdown */
void shutdown_device()
{
diff --git a/target/msm8916/init.c b/target/msm8916/init.c
index fbc45e4..3bdd5ac 100644
--- a/target/msm8916/init.c
+++ b/target/msm8916/init.c
@@ -257,29 +257,6 @@
return hard_restart_reason;
}
-static int scm_dload_mode(int mode)
-{
- int ret = 0;
- uint32_t dload_type;
-
- dprintf(SPEW, "DLOAD mode: %d\n", mode);
- if (mode == NORMAL_DLOAD)
- dload_type = SCM_DLOAD_MODE;
- else if(mode == EMERGENCY_DLOAD)
- dload_type = SCM_EDLOAD_MODE;
- else
- dload_type = 0;
-
- ret = scm_call_atomic2(SCM_SVC_BOOT, SCM_DLOAD_CMD, dload_type, 0);
- if (ret)
- dprintf(CRITICAL, "Failed to write to boot misc: %d\n", ret);
-
- ret = scm_call_atomic2(SCM_SVC_BOOT, WDOG_DEBUG_DISABLE, 1, 0);
- if (ret)
- dprintf(CRITICAL, "Failed to disable the wdog debug \n");
-
- return ret;
-}
/* Configure PMIC and Drop PS_HOLD for shutdown */
void shutdown_device()
{
diff --git a/target/msm8916/oem_panel.c b/target/msm8916/oem_panel.c
index ae2725d..9e4349d 100644
--- a/target/msm8916/oem_panel.c
+++ b/target/msm8916/oem_panel.c
@@ -634,6 +634,9 @@
panel_id = JDI_1080P_VIDEO_PANEL;
break;
case 1:
+ panel_id = HX8394D_720P_VIDEO_PANEL;
+ break;
+ case 2:
panel_id = NT35590_720P_VIDEO_PANEL;
break;
default: