commit 78045236f6806f00815695d7abb5e1cb1d9285f2
author Linux Build Service Account <lnxbuild@qualcomm.com> Wed Dec 22 16:39:37 2010 -0800
committer QuIC Gerrit Code Review <code-review@localhost> Wed Dec 22 16:39:37 2010 -0800
tree 08a8e3c29e7060c2468bde12ea7d6292ace059fd
parent 7a11d611f1cf97b2a9e3c375e1b5048136d0f8a2
parent 8282bdc9c8a88e35bab439de3d7e020fa17cce07

Merge "[msm7k]: Fix ACPU clock initialization"

platform/msm7k/acpuclock.c

diff --git a/platform/msm7k/acpuclock.c b/platform/msm7k/acpuclock.c
index 89583f3..25c7ceb 100755
--- a/platform/msm7k/acpuclock.c
+++ b/platform/msm7k/acpuclock.c
@@ -69,7 +69,7 @@
 	(WAIT_CNT << 16) | (SRC_SEL_PLL1 << 4)  | DIV_4,
 	(WAIT_CNT << 16) | (SRC_SEL_PLL1 << 12) | (DIV_4 << 8),
 	(WAIT_CNT << 16) | (SRC_SEL_PLL1 << 12) | (DIV_2 << 8),
-	(WAIT_CNT << 16) | (SRC_SEL_PLL1 << 12) | DIV_2,
+	(WAIT_CNT << 16) | (SRC_SEL_PLL1 << 4) | DIV_2,
 	(WAIT_CNT << 16) | (SRC_SEL_PLL3 << 4)  | DIV_2,
 	(WAIT_CNT << 16) | (SRC_SEL_PLL3 << 12) | (DIV_2 << 8),
 };
@@ -78,16 +78,16 @@
 	(WAIT_CNT << 16) | (SRC_SEL_PLL1 << 4)  | DIV_4,
 	(WAIT_CNT << 16) | (SRC_SEL_PLL1 << 12) | (DIV_4 << 8),
 	(WAIT_CNT << 16) | (SRC_SEL_PLL1 << 12) | (DIV_2 << 8),
-	(WAIT_CNT << 16) | (SRC_SEL_PLL1 << 12) | DIV_2,
+	(WAIT_CNT << 16) | (SRC_SEL_PLL1 << 4) | DIV_2,
 	(WAIT_CNT << 16) | (SRC_SEL_PLL2 << 4)  | DIV_2,
 	(WAIT_CNT << 16) | (SRC_SEL_PLL2 << 12) | (DIV_2 << 8),
 };
 
-uint32_t const clk_cntl_reg_val_7627A[] = {
+uint32_t const clk_cntl_reg_val_7627T[] = {
 	(WAIT_CNT << 16) | (SRC_SEL_PLL1 << 4)  | DIV_4,
 	(WAIT_CNT << 16) | (SRC_SEL_PLL1 << 12) | (DIV_4 << 8),
 	(WAIT_CNT << 16) | (SRC_SEL_PLL1 << 12) | (DIV_2 << 8),
-	(WAIT_CNT << 16) | (SRC_SEL_PLL1 << 12) | DIV_2,
+	(WAIT_CNT << 16) | (SRC_SEL_PLL1 << 4) | DIV_2,
 	(WAIT_CNT << 16) | (SRC_SEL_PLL2 << 4),
 	(WAIT_CNT << 16) | (SRC_SEL_PLL2 << 12),
 };
@@ -136,7 +136,7 @@
 		writel(clk_cntl_reg_val_7625[i], A11S_CLK_CNTL_ADDR);
 #else
 		if(clk == ACPU_800MHZ)
-			writel(clk_cntl_reg_val_7627A[i], A11S_CLK_CNTL_ADDR);
+			writel(clk_cntl_reg_val_7627T[i], A11S_CLK_CNTL_ADDR);
 		else
 			writel(clk_cntl_reg_val_7627[i], A11S_CLK_CNTL_ADDR);
 #endif