Merge "dev: pm8x41: Fix incorrect WLED masks"
diff --git a/dev/gcdb/display/include/panel_hx8379a_wvga_video.h b/dev/gcdb/display/include/panel_hx8379a_wvga_video.h
old mode 100644
new mode 100755
index acda031..ff6133d
--- a/dev/gcdb/display/include/panel_hx8379a_wvga_video.h
+++ b/dev/gcdb/display/include/panel_hx8379a_wvga_video.h
@@ -34,7 +34,6 @@
*---------------------------------------------------------------------------*/
#ifndef _PANEL_HX8379A_WVGA_VIDEO_H_
-
#define _PANEL_HX8379A_WVGA_VIDEO_H_
/*---------------------------------------------------------------------------*/
/* HEADER files */
@@ -44,209 +43,232 @@
/*---------------------------------------------------------------------------*/
/* Panel configuration */
/*---------------------------------------------------------------------------*/
-
static struct panel_config hx8379a_wvga_video_panel_data = {
- "qcom,mdss_dsi_hx8379a_wvga_video", "dsi:0:", "qcom,mdss-dsi-panel",
- 10, 0, "DISPLAY_1", 0, 0, 60, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+ "qcom,mdss_dsi_hx8379a_wvga_video", "dsi:0:", "qcom,mdss-dsi-panel",
+ 10, 0, "DISPLAY_1", 0, 0, 60, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
};
/*---------------------------------------------------------------------------*/
/* Panel resolution */
/*---------------------------------------------------------------------------*/
static struct panel_resolution hx8379a_wvga_video_panel_res = {
- 480, 800, 94, 100, 40, 0, 6, 6, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0
+ 480, 800, 100, 94, 40, 0, 6, 4, 6, 0, 0, 0, 0, 0, 0, 0, 0, 0
};
/*---------------------------------------------------------------------------*/
-/* Panel Color Information */
+/* Panel color information */
/*---------------------------------------------------------------------------*/
static struct color_info hx8379a_wvga_video_color = {
- 24, 0, 0xff, 0, 0, 0
+ 24, 0, 0xff, 0, 0, 0
};
/*---------------------------------------------------------------------------*/
-/* Panel Command information */
+/* Panel on/off command information */
/*---------------------------------------------------------------------------*/
static char hx8379a_wvga_video_on_cmd0[] = {
-0x04, 0x00, 0x39, 0xC0,
-0xB9, 0xFF, 0x83, 0x79,
- };
-
+ 0x04, 0x00, 0x39, 0xC0,
+ 0xB9, 0xFF, 0x83, 0x79,
+};
static char hx8379a_wvga_video_on_cmd1[] = {
-0x03, 0x00, 0x39, 0xC0,
-0xBA, 0x51, 0x93, 0xFF, };
-
+ 0x03, 0x00, 0x39, 0xC0,
+ 0xBA, 0x51, 0x93, 0xFF,
+};
static char hx8379a_wvga_video_on_cmd2[] = {
-0x14, 0x00, 0x39, 0xC0,
-0xB1, 0x00, 0x50, 0x44,
-0xEA, 0x8D, 0x08, 0x11,
-0x11, 0x11, 0x27, 0x2F,
-0x9A, 0x1A, 0x42, 0x0B,
-0x6E, 0xF1, 0x00, 0xE6,
- };
-
+ 0x14, 0x00, 0x39, 0xC0,
+ 0xB1, 0x00, 0x50, 0x44,
+ 0xEA, 0x8D, 0x08, 0x11,
+ 0x11, 0x11, 0x27, 0x2F,
+ 0x9A, 0x1A, 0x42, 0x0B,
+ 0x6E, 0xF1, 0x00, 0xE6,
+};
static char hx8379a_wvga_video_on_cmd3[] = {
-0x0E, 0x00, 0x39, 0xC0,
-0xB2, 0x00, 0x00, 0x3C,
-0x08, 0x04, 0x19, 0x22,
-0x00, 0xFF, 0x08, 0x04,
-0x19, 0x20, 0xFF, 0xFF, };
-
+ 0x0E, 0x00, 0x39, 0xC0,
+ 0xB2, 0x00, 0x00, 0x3C,
+ 0x08, 0x04, 0x19, 0x22,
+ 0x00, 0xFF, 0x08, 0x04,
+ 0x19, 0x20, 0xFF, 0xFF,
+};
static char hx8379a_wvga_video_on_cmd4[] = {
-0x20, 0x00, 0x39, 0xC0,
-0xB4, 0x80, 0x08, 0x00,
-0x32, 0x10, 0x03, 0x32,
-0x13, 0x70, 0x32, 0x10,
-0x08, 0x37, 0x01, 0x28,
-0x07, 0x37, 0x08, 0x35,
-0x08, 0x3D, 0x44, 0x08,
-0x00, 0x40, 0x08, 0x28,
-0x08, 0x30, 0x30, 0x04,
- };
-
+ 0x20, 0x00, 0x39, 0xC0,
+ 0xB4, 0x80, 0x08, 0x00,
+ 0x32, 0x10, 0x03, 0x32,
+ 0x13, 0x70, 0x32, 0x10,
+ 0x08, 0x37, 0x01, 0x28,
+ 0x07, 0x37, 0x08, 0x35,
+ 0x08, 0x3D, 0x44, 0x08,
+ 0x00, 0x40, 0x08, 0x28,
+ 0x08, 0x30, 0x30, 0x04,
+};
static char hx8379a_wvga_video_on_cmd5[] = {
-0x30, 0x00, 0x39, 0xC0,
-0xD5, 0x00, 0x00, 0x0A,
-0x00, 0x01, 0x05, 0x00,
-0x03, 0x00, 0x88, 0x88,
-0x88, 0x88, 0x23, 0x01,
-0x67, 0x45, 0x02, 0x13,
-0x88, 0x88, 0x88, 0x88,
-0x88, 0x88, 0x88, 0x88,
-0x88, 0x88, 0x54, 0x76,
-0x10, 0x32, 0x31, 0x20,
-0x88, 0x88, 0x88, 0x88,
-0x88, 0x88, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00,
- };
-
+ 0x30, 0x00, 0x39, 0xC0,
+ 0xD5, 0x00, 0x00, 0x0A,
+ 0x00, 0x01, 0x05, 0x00,
+ 0x03, 0x00, 0x88, 0x88,
+ 0x88, 0x88, 0x23, 0x01,
+ 0x67, 0x45, 0x02, 0x13,
+ 0x88, 0x88, 0x88, 0x88,
+ 0x88, 0x88, 0x88, 0x88,
+ 0x88, 0x88, 0x54, 0x76,
+ 0x10, 0x32, 0x31, 0x20,
+ 0x88, 0x88, 0x88, 0x88,
+ 0x88, 0x88, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00,
+};
static char hx8379a_wvga_video_on_cmd6[] = {
-0x24, 0x00, 0x39, 0xC0,
-0xE0, 0x79, 0x05, 0x0F,
-0x14, 0x26, 0x20, 0x3F,
-0x2A, 0x43, 0x04, 0x0C,
-0x11, 0x15, 0x17, 0x15,
-0x15, 0x10, 0x13, 0x05,
-0x0F, 0x14, 0x26, 0x20,
-0x3F, 0x2A, 0x43, 0x04,
-0x0C, 0x11, 0x15, 0x17,
-0x15, 0x15, 0x10, 0x13,
- };
-
+ 0x24, 0x00, 0x39, 0xC0,
+ 0xE0, 0x79, 0x05, 0x0F,
+ 0x14, 0x23, 0x24, 0x3F,
+ 0x30, 0x46, 0x06, 0x10,
+ 0x13, 0x16, 0x17, 0x16,
+ 0x16, 0x13, 0x18, 0x05,
+ 0x0F, 0x14, 0x23, 0x24,
+ 0x3F, 0x30, 0x46, 0x06,
+ 0x10, 0x13, 0x16, 0x17,
+ 0x16, 0x16, 0x13, 0x18,
+};
static char hx8379a_wvga_video_on_cmd7[] = {
-0xcc, 0x02, 0x23, 0x80 };
-
+ 0x80, 0x00, 0x39, 0xC0,
+ 0xC1, 0x01, 0x00, 0x07,
+ 0x10, 0x17, 0x1D, 0x2A,
+ 0x33, 0x3A, 0x43, 0x4A,
+ 0x52, 0x5B, 0x64, 0x6D,
+ 0x78, 0x7F, 0x88, 0x90,
+ 0x98, 0xA0, 0xA9, 0xB2,
+ 0xB9, 0xC1, 0xC9, 0xD1,
+ 0xD7, 0xDF, 0xE6, 0xED,
+ 0xF4, 0xFA, 0xFD, 0x00,
+ 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x08, 0x10, 0x18,
+ 0x20, 0x28, 0x30, 0x38,
+ 0x40, 0x47, 0x4F, 0x58,
+ 0x60, 0x68, 0x70, 0x78,
+ 0x80, 0x88, 0x90, 0x98,
+ 0xA0, 0xA9, 0xB1, 0xB9,
+ 0xC1, 0xC9, 0xD1, 0xD8,
+ 0xE0, 0xE8, 0xF0, 0xF9,
+ 0xFE, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x08,
+ 0x10, 0x18, 0x1E, 0x26,
+ 0x2E, 0x34, 0x3A, 0x41,
+ 0x49, 0x4F, 0x58, 0x5E,
+ 0x67, 0x6F, 0x77, 0x80,
+ 0x88, 0x8F, 0x97, 0x9F,
+ 0xA7, 0xAF, 0xB8, 0xBF,
+ 0xC7, 0xD1, 0xD8, 0xE3,
+ 0xEA, 0xF6, 0xFF, 0x00,
+ 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00,
+};
static char hx8379a_wvga_video_on_cmd8[] = {
-0x05, 0x00, 0x39, 0xC0,
-0xB6, 0x00, 0x9C, 0x00,
-0x9C, 0xFF, 0xFF, 0xFF, };
-
+ 0xcc, 0x02, 0x23, 0x80
+};
static char hx8379a_wvga_video_on_cmd9[] = {
-0x11, 0x00, 0x05, 0x80 };
-
+ 0x05, 0x00, 0x39, 0xC0,
+ 0xB6, 0x00, 0x9C, 0x00,
+ 0x9C, 0xFF, 0xFF, 0xFF,
+};
static char hx8379a_wvga_video_on_cmd10[] = {
-0x29, 0x00, 0x05, 0x80 };
+ 0x11, 0x00, 0x05, 0x80
+};
-
-
+static char hx8379a_wvga_video_on_cmd11[] = {
+ 0x29, 0x00, 0x05, 0x80
+};
static struct mipi_dsi_cmd hx8379a_wvga_video_on_command[] = {
-{ 0x8 , hx8379a_wvga_video_on_cmd0},
-{ 0x8 , hx8379a_wvga_video_on_cmd1},
-{ 0x18 , hx8379a_wvga_video_on_cmd2},
-{ 0x14 , hx8379a_wvga_video_on_cmd3},
-{ 0x24 , hx8379a_wvga_video_on_cmd4},
-{ 0x34 , hx8379a_wvga_video_on_cmd5},
-{ 0x28 , hx8379a_wvga_video_on_cmd6},
-{ 0x4 , hx8379a_wvga_video_on_cmd7},
-{ 0xc , hx8379a_wvga_video_on_cmd8},
-{ 0x4 , hx8379a_wvga_video_on_cmd9},
-{ 0x4 , hx8379a_wvga_video_on_cmd10}
+ {0x8, hx8379a_wvga_video_on_cmd0, 0x00},
+ {0x8, hx8379a_wvga_video_on_cmd1, 0x00},
+ {0x18, hx8379a_wvga_video_on_cmd2, 0x00},
+ {0x14, hx8379a_wvga_video_on_cmd3, 0x00},
+ {0x24, hx8379a_wvga_video_on_cmd4, 0x00},
+ {0x34, hx8379a_wvga_video_on_cmd5, 0x00},
+ {0x28, hx8379a_wvga_video_on_cmd6, 0x00},
+ {0x84, hx8379a_wvga_video_on_cmd7, 0x00},
+ {0x4, hx8379a_wvga_video_on_cmd8, 0x00},
+ {0xc, hx8379a_wvga_video_on_cmd9, 0x00},
+ {0x4, hx8379a_wvga_video_on_cmd10, 0x96},
+ {0x4, hx8379a_wvga_video_on_cmd11, 0x78}
};
-#define HX8379A_WVGA_VIDEO_ON_COMMAND 11
+
+#define HX8379A_WVGA_VIDEO_ON_COMMAND 12
static char hx8379a_wvga_videooff_cmd0[] = {
-0x28, 0x00, 0x05, 0x80 };
-
+ 0x28, 0x00, 0x05, 0x80
+};
static char hx8379a_wvga_videooff_cmd1[] = {
-0x10, 0x00, 0x05, 0x80 };
-
-
-
+ 0x10, 0x00, 0x05, 0x80
+};
static struct mipi_dsi_cmd hx8379a_wvga_video_off_command[] = {
-{ 0x4 , hx8379a_wvga_videooff_cmd0},
-{ 0x4 , hx8379a_wvga_videooff_cmd1}
+ {0x4, hx8379a_wvga_videooff_cmd0, 0x32},
+ {0x4, hx8379a_wvga_videooff_cmd1, 0x78}
};
+
#define HX8379A_WVGA_VIDEO_OFF_COMMAND 2
static struct command_state hx8379a_wvga_video_state = {
- 0, 0
+ 0, 0
};
/*---------------------------------------------------------------------------*/
/* Command mode panel information */
/*---------------------------------------------------------------------------*/
-
static struct commandpanel_info hx8379a_wvga_video_command_panel = {
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
};
/*---------------------------------------------------------------------------*/
/* Video mode panel information */
/*---------------------------------------------------------------------------*/
-
static struct videopanel_info hx8379a_wvga_video_video_panel = {
- 1, 0, 0, 0, 1, 1, 2, 0, 0x9
+ 1, 0, 0, 0, 1, 1, 2, 0, 0x9
};
/*---------------------------------------------------------------------------*/
-/* Lane Configuration */
+/* Lane configuration */
/*---------------------------------------------------------------------------*/
-
static struct lane_configuration hx8379a_wvga_video_lane_config = {
- 2, 1, 1, 1, 0, 0
+ 2, 1, 1, 1, 0, 0
};
-
/*---------------------------------------------------------------------------*/
-/* Panel Timing */
+/* Panel timing */
/*---------------------------------------------------------------------------*/
static const uint32_t hx8379a_wvga_video_timings[] = {
- 0x78, 0x1B, 0x11, 0x00, 0x3E, 0x43, 0x16, 0x1E, 0x1D, 0x03, 0x04, 0x00
+ 0x78, 0x1B, 0x11, 0x00, 0x3E, 0x43, 0x16, 0x1E, 0x1D, 0x03, 0x04, 0x00
};
static struct panel_timing hx8379a_wvga_video_timing_info = {
- 0, 4, 0x04, 0x1b
+ 0, 4, 0x04, 0x1b
};
/*---------------------------------------------------------------------------*/
-/* Panel Reset Sequence */
+/* Panel reset sequence */
/*---------------------------------------------------------------------------*/
static struct panel_reset_sequence hx8379a_wvga_video_reset_seq = {
- { 2, 0, 2, }, { 20, 2, 20, }, 2
+ {2, 0, 2, }, {20, 2, 20, }, 2
};
/*---------------------------------------------------------------------------*/
-/* Backlight Settings */
+/* Backlight setting */
/*---------------------------------------------------------------------------*/
-
static struct backlight hx8379a_wvga_video_backlight = {
- 0, 1, 255, 0, 1, 0
+ 0, 1, 255, 0, 1, 0
};
-
#endif /*_PANEL_HX8379A_WVGA_VIDEO_H_*/
diff --git a/dev/gcdb/display/include/panel_hx8389b_qhd_video.h b/dev/gcdb/display/include/panel_hx8389b_qhd_video.h
index b172fdb..1b756be 100644
--- a/dev/gcdb/display/include/panel_hx8389b_qhd_video.h
+++ b/dev/gcdb/display/include/panel_hx8389b_qhd_video.h
@@ -191,22 +191,22 @@
static struct mipi_dsi_cmd hx8389b_qhd_video_on_command[] = {
-{ 0x8 , hx8389b_qhd_video_on_cmd0},
-{ 0xc , hx8389b_qhd_video_on_cmd1},
-{ 0x4 , hx8389b_qhd_video_on_cmd2},
-{ 0x8 , hx8389b_qhd_video_on_cmd3},
-{ 0x4 , hx8389b_qhd_video_on_cmd4},
-{ 0x18 , hx8389b_qhd_video_on_cmd5},
-{ 0xc , hx8389b_qhd_video_on_cmd6},
-{ 0x1c , hx8389b_qhd_video_on_cmd7},
-{ 0x3c , hx8389b_qhd_video_on_cmd8},
-{ 0x8 , hx8389b_qhd_video_on_cmd9},
-{ 0xc , hx8389b_qhd_video_on_cmd10},
-{ 0x8 , hx8389b_qhd_video_on_cmd11},
-{ 0xc , hx8389b_qhd_video_on_cmd12},
-{ 0x28 , hx8389b_qhd_video_on_cmd13},
-{ 0x4 , hx8389b_qhd_video_on_cmd14},
-{ 0x4 , hx8389b_qhd_video_on_cmd15}
+{ 0x8 , hx8389b_qhd_video_on_cmd0, 0x00},
+{ 0xc , hx8389b_qhd_video_on_cmd1, 0x00},
+{ 0x4 , hx8389b_qhd_video_on_cmd2, 0x00},
+{ 0x8 , hx8389b_qhd_video_on_cmd3, 0x00},
+{ 0x4 , hx8389b_qhd_video_on_cmd4, 0x00},
+{ 0x18 , hx8389b_qhd_video_on_cmd5, 0x00},
+{ 0xc , hx8389b_qhd_video_on_cmd6, 0x00},
+{ 0x1c , hx8389b_qhd_video_on_cmd7, 0x00},
+{ 0x3c , hx8389b_qhd_video_on_cmd8, 0x00},
+{ 0x8 , hx8389b_qhd_video_on_cmd9, 0x00},
+{ 0xc , hx8389b_qhd_video_on_cmd10, 0x00},
+{ 0x8 , hx8389b_qhd_video_on_cmd11, 0x00},
+{ 0xc , hx8389b_qhd_video_on_cmd12, 0x00},
+{ 0x28 , hx8389b_qhd_video_on_cmd13, 0x00},
+{ 0x4 , hx8389b_qhd_video_on_cmd14, 0x96},
+{ 0x4 , hx8389b_qhd_video_on_cmd15, 0x96}
};
#define HX8389B_QHD_VIDEO_ON_COMMAND 16
diff --git a/dev/gcdb/display/include/panel_ssd2080m_720p_video.h b/dev/gcdb/display/include/panel_ssd2080m_720p_video.h
index 73fbdc2..018afc3 100755
--- a/dev/gcdb/display/include/panel_ssd2080m_720p_video.h
+++ b/dev/gcdb/display/include/panel_ssd2080m_720p_video.h
@@ -54,7 +54,7 @@
/* Panel resolution */
/*---------------------------------------------------------------------------*/
static struct panel_resolution ssd2080m_720p_video_panel_res = {
- 720, 1280, 80, 24, 14, 0, 12, 15, 10, 0, 0, 0, 0, 0, 0, 0, 0, 0
+ 720, 1280, 80, 24, 14, 0, 11, 14, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0
};
/*---------------------------------------------------------------------------*/
diff --git a/dev/gcdb/display/include/panel_truly_wvga_cmd.h b/dev/gcdb/display/include/panel_truly_wvga_cmd.h
index e088b8d..a85b138 100644
--- a/dev/gcdb/display/include/panel_truly_wvga_cmd.h
+++ b/dev/gcdb/display/include/panel_truly_wvga_cmd.h
@@ -215,31 +215,31 @@
static struct mipi_dsi_cmd truly_wvga_cmd_on_command[] = {
-{ 0x4 , truly_wvga_cmd_on_cmd0},
-{ 0x4 , truly_wvga_cmd_on_cmd1},
-{ 0x8 , truly_wvga_cmd_on_cmd2},
-{ 0x4 , truly_wvga_cmd_on_cmd3},
-{ 0x8 , truly_wvga_cmd_on_cmd4},
-{ 0x14 , truly_wvga_cmd_on_cmd5},
-{ 0xc , truly_wvga_cmd_on_cmd6},
-{ 0x20 , truly_wvga_cmd_on_cmd7},
-{ 0x20 , truly_wvga_cmd_on_cmd8},
-{ 0x20 , truly_wvga_cmd_on_cmd9},
-{ 0x18 , truly_wvga_cmd_on_cmd10},
-{ 0xc , truly_wvga_cmd_on_cmd11},
-{ 0x4 , truly_wvga_cmd_on_cmd12},
-{ 0x8 , truly_wvga_cmd_on_cmd13},
-{ 0x8 , truly_wvga_cmd_on_cmd14},
-{ 0x4 , truly_wvga_cmd_on_cmd15},
-{ 0x4 , truly_wvga_cmd_on_cmd16},
-{ 0x4 , truly_wvga_cmd_on_cmd17},
-{ 0x4 , truly_wvga_cmd_on_cmd18},
-{ 0xc , truly_wvga_cmd_on_cmd19},
-{ 0xc , truly_wvga_cmd_on_cmd20},
-{ 0x4 , truly_wvga_cmd_on_cmd21},
-{ 0x8 , truly_wvga_cmd_on_cmd22},
-{ 0x4 , truly_wvga_cmd_on_cmd23},
-{ 0x4 , truly_wvga_cmd_on_cmd24}
+{ 0x4 , truly_wvga_cmd_on_cmd0, 0x00},
+{ 0x4 , truly_wvga_cmd_on_cmd1, 0x00},
+{ 0x8 , truly_wvga_cmd_on_cmd2, 0x00},
+{ 0x4 , truly_wvga_cmd_on_cmd3, 0x00},
+{ 0x8 , truly_wvga_cmd_on_cmd4, 0x00},
+{ 0x14 , truly_wvga_cmd_on_cmd5, 0x00},
+{ 0xc , truly_wvga_cmd_on_cmd6, 0x00},
+{ 0x20 , truly_wvga_cmd_on_cmd7, 0x00},
+{ 0x20 , truly_wvga_cmd_on_cmd8, 0x00},
+{ 0x20 , truly_wvga_cmd_on_cmd9, 0x00},
+{ 0x18 , truly_wvga_cmd_on_cmd10, 0x00},
+{ 0xc , truly_wvga_cmd_on_cmd11, 0x00},
+{ 0x4 , truly_wvga_cmd_on_cmd12, 0x00},
+{ 0x8 , truly_wvga_cmd_on_cmd13, 0x00},
+{ 0x8 , truly_wvga_cmd_on_cmd14, 0x00},
+{ 0x4 , truly_wvga_cmd_on_cmd15, 0x00},
+{ 0x4 , truly_wvga_cmd_on_cmd16, 0x00},
+{ 0x4 , truly_wvga_cmd_on_cmd17, 0x00},
+{ 0x4 , truly_wvga_cmd_on_cmd18, 0x00},
+{ 0xc , truly_wvga_cmd_on_cmd19, 0x00},
+{ 0xc , truly_wvga_cmd_on_cmd20, 0x00},
+{ 0x4 , truly_wvga_cmd_on_cmd21, 0x00},
+{ 0x8 , truly_wvga_cmd_on_cmd22, 0x00},
+{ 0x4 , truly_wvga_cmd_on_cmd23, 0x7D},
+{ 0x4 , truly_wvga_cmd_on_cmd24, 0x3C}
};
#define TRULY_WVGA_CMD_ON_COMMAND 25
diff --git a/dev/gcdb/display/include/panel_truly_wvga_video.h b/dev/gcdb/display/include/panel_truly_wvga_video.h
index ee1ab28..facac62 100644
--- a/dev/gcdb/display/include/panel_truly_wvga_video.h
+++ b/dev/gcdb/display/include/panel_truly_wvga_video.h
@@ -219,32 +219,32 @@
static struct mipi_dsi_cmd truly_wvga_video_on_command[] = {
-{ 0x4 , truly_wvga_video_on_cmd0},
-{ 0x4 , truly_wvga_video_on_cmd1},
-{ 0x8 , truly_wvga_video_on_cmd2},
-{ 0x4 , truly_wvga_video_on_cmd3},
-{ 0x8 , truly_wvga_video_on_cmd4},
-{ 0x14 , truly_wvga_video_on_cmd5},
-{ 0xc , truly_wvga_video_on_cmd6},
-{ 0x20 , truly_wvga_video_on_cmd7},
-{ 0x20 , truly_wvga_video_on_cmd8},
-{ 0x20 , truly_wvga_video_on_cmd9},
-{ 0x18 , truly_wvga_video_on_cmd10},
-{ 0xc , truly_wvga_video_on_cmd11},
-{ 0x4 , truly_wvga_video_on_cmd12},
-{ 0x8 , truly_wvga_video_on_cmd13},
-{ 0x8 , truly_wvga_video_on_cmd14},
-{ 0x4 , truly_wvga_video_on_cmd15},
-{ 0x4 , truly_wvga_video_on_cmd16},
-{ 0x4 , truly_wvga_video_on_cmd17},
-{ 0xc , truly_wvga_video_on_cmd18},
-{ 0xc , truly_wvga_video_on_cmd19},
-{ 0x4 , truly_wvga_video_on_cmd20},
-{ 0x8 , truly_wvga_video_on_cmd21},
-{ 0x4 , truly_wvga_video_on_cmd22},
-{ 0x4 , truly_wvga_video_on_cmd23},
-{ 0x4 , truly_wvga_video_on_cmd24},
-{ 0x4 , truly_wvga_video_on_cmd25}
+{ 0x4 , truly_wvga_video_on_cmd0, 0x00},
+{ 0x4 , truly_wvga_video_on_cmd1, 0x00},
+{ 0x8 , truly_wvga_video_on_cmd2, 0x00},
+{ 0x4 , truly_wvga_video_on_cmd3, 0x00},
+{ 0x8 , truly_wvga_video_on_cmd4, 0x00},
+{ 0x14 , truly_wvga_video_on_cmd5, 0x00},
+{ 0xc , truly_wvga_video_on_cmd6, 0x00},
+{ 0x20 , truly_wvga_video_on_cmd7, 0x00},
+{ 0x20 , truly_wvga_video_on_cmd8, 0x00},
+{ 0x20 , truly_wvga_video_on_cmd9, 0x00},
+{ 0x18 , truly_wvga_video_on_cmd10, 0x00},
+{ 0xc , truly_wvga_video_on_cmd11, 0x00},
+{ 0x4 , truly_wvga_video_on_cmd12, 0x00},
+{ 0x8 , truly_wvga_video_on_cmd13, 0x00},
+{ 0x8 , truly_wvga_video_on_cmd14, 0x00},
+{ 0x4 , truly_wvga_video_on_cmd15, 0x00},
+{ 0x4 , truly_wvga_video_on_cmd16, 0x00},
+{ 0x4 , truly_wvga_video_on_cmd17, 0x00},
+{ 0xc , truly_wvga_video_on_cmd18, 0x00},
+{ 0xc , truly_wvga_video_on_cmd19, 0x00},
+{ 0x4 , truly_wvga_video_on_cmd20, 0x00},
+{ 0x8 , truly_wvga_video_on_cmd21, 0x00},
+{ 0x4 , truly_wvga_video_on_cmd22, 0x00},
+{ 0x4 , truly_wvga_video_on_cmd23, 0x00},
+{ 0x4 , truly_wvga_video_on_cmd24, 0x7D},
+{ 0x4 , truly_wvga_video_on_cmd25, 0x3c}
};
#define TRULY_WVGA_VIDEO_ON_COMMAND 26
diff --git a/dev/gcdb/display/panel_display.c b/dev/gcdb/display/panel_display.c
index 21936f5..38d1721 100644
--- a/dev/gcdb/display/panel_display.c
+++ b/dev/gcdb/display/panel_display.c
@@ -114,6 +114,8 @@
& 0x1);
pinfo->mipi.mode_gpio_state = pstruct->paneldata->mode_gpio_state;
pinfo->mipi.bitclock = pstruct->paneldata->panel_bitclock_freq;
+ pinfo->mipi.use_enable_gpio =
+ pstruct->paneldata->panel_with_enable_gpio;
/* Video Panel configuration */
pinfo->mipi.pulse_mode_hsa_he = pstruct->videopanel->hsync_pulse;
diff --git a/dev/pmic/pm8x41/include/pm8x41.h b/dev/pmic/pm8x41/include/pm8x41.h
index 236aed7..e5772e8 100644
--- a/dev/pmic/pm8x41/include/pm8x41.h
+++ b/dev/pmic/pm8x41/include/pm8x41.h
@@ -40,7 +40,7 @@
#define PM_GPIO_PULL_UP_31_5 2
/* 1.5uA + 30uA boost */
#define PM_GPIO_PULL_UP_1_5_30 3
-#define PM_GPIO_PULL_RESV_1 4
+#define PM_GPIO_PULLDOWN_10 4
#define PM_GPIO_PULL_RESV_2 5
@@ -52,9 +52,9 @@
#define PM_GPIO_OUT_DRIVE_MED 0x02
#define PM_GPIO_OUT_DRIVE_HIGH 0x03
-
#define PM_GPIO_FUNC_LOW 0x00
#define PM_GPIO_FUNC_HIGH 0x01
+#define PM_GPIO_FUNC_2 0x06
#define PM_GPIO_MODE_MASK 0x70
#define PM_GPIO_OUTPUT_MASK 0x0F
@@ -187,6 +187,7 @@
#define PM8x41_MMP3_BASE 0xA200
+void pm8x41_lpg_write(uint8_t chan, uint8_t off, uint8_t val);
int pm8x41_gpio_get(uint8_t gpio, uint8_t *status);
int pm8x41_gpio_set(uint8_t gpio, uint8_t value);
int pm8x41_gpio_config(uint8_t gpio, struct pm8x41_gpio *config);
diff --git a/dev/pmic/pm8x41/include/pm8x41_hw.h b/dev/pmic/pm8x41/include/pm8x41_hw.h
index c8c83ce..7664f37 100644
--- a/dev/pmic/pm8x41/include/pm8x41_hw.h
+++ b/dev/pmic/pm8x41/include/pm8x41_hw.h
@@ -37,6 +37,12 @@
#define REVID_REVISION4 0x103
+/* LPG Registers */
+#define LPG_SLAVE_ID 0x10000 /* slave_id == 1 */
+#define LPG_PERIPHERAL_BASE (0x0B100 | LPG_SLAVE_ID)
+/* Peripheral base address for LPG channel */
+#define LPG_N_PERIPHERAL_BASE(x) (LPG_PERIPHERAL_BASE + ((x) - 1) * 0x100)
+
/* GPIO Registers */
#define GPIO_PERIPHERAL_BASE 0xC000
/* Peripheral base address for GPIO_X */
@@ -109,4 +115,23 @@
#define DIFF_CLK1_EN_CTL 0x5746
#define DIFF_CLK1_EN_BIT 7
+/* SMBB registers */
+#define PM8XXX_IBAT_ATC_A 0x1054
+#define PM8XXX_VBAT_DET 0x105D
+#define PM8XXX_SEC_ACCESS 0x10D0
+#define PM8XXX_COMP_OVR0 0x10ED
+#define PM8XXX_VCP 0x1247
+#define PM8XXX_TRKL_CHG_TEST 0x10E2
+#define PM8XXX_VBAT_IN_TSTS 0x1010
+
+/* Macros for broken battery */
+#define VBAT_DET_LO_4_30V 0x35
+#define SEC_ACCESS 0xa5
+#define OVR0_DIS_VTRKL_FAULT 0x08
+#define CHG_TRICKLE_FORCED_ON 0x01
+#define VBAT_DET_HI_RT_STS 0x02
+#define VCP_ENABLE 0x01
+
+int pm8xxx_is_battery_broken(void);
+
#endif
diff --git a/dev/pmic/pm8x41/pm8x41.c b/dev/pmic/pm8x41/pm8x41.c
index 915cf52..4ea7643 100644
--- a/dev/pmic/pm8x41/pm8x41.c
+++ b/dev/pmic/pm8x41/pm8x41.c
@@ -347,6 +347,16 @@
return 0;
}
+/*
+ * lpg channel register write:
+ */
+void pm8x41_lpg_write(uint8_t chan, uint8_t off, uint8_t val)
+{
+ uint32_t lpg_base = LPG_N_PERIPHERAL_BASE(chan);
+
+ REG_WRITE(lpg_base + off, val);
+}
+
uint8_t pm8x41_get_pmic_rev()
{
return REG_READ(REVID_REVISION4);
@@ -401,3 +411,53 @@
REG_WRITE(DIFF_CLK1_EN_CTL, reg);
}
+
+/* API to check for borken battery */
+int pm8xxx_is_battery_broken()
+{
+ uint8_t trkl_default = 0;
+ uint8_t vbat_det_default = 0;
+ int batt_is_broken = 0;
+
+ /* Store original trickle charging current setting */
+ trkl_default = pm8x41_reg_read(PM8XXX_IBAT_ATC_A);
+ /* Store original VBAT_DET_LO setting */
+ vbat_det_default = pm8x41_reg_read(PM8XXX_VBAT_DET);
+
+ /*Set trickle charge current to 50mA (IBAT_ATC_A = 0x00) */
+ pm8x41_reg_write(PM8XXX_IBAT_ATC_A, 0x00);
+ /* Set VBAT_DET_LO to 4.3V so that VBAT_DET_HI = 4.52V (VBAT_DET_LO = 0x35) */
+ pm8x41_reg_write(PM8XXX_VBAT_DET, VBAT_DET_LO_4_30V);
+ /* Unlock SMBBP Secured Register */
+ pm8x41_reg_write(PM8XXX_SEC_ACCESS, SEC_ACCESS);
+ /* Disable VTRKL_FAULT comp (SMBBP_CHGR_COMP_OVR0 = 0x08) */
+ pm8x41_reg_write(PM8XXX_COMP_OVR0, OVR0_DIS_VTRKL_FAULT);
+ /* Disable VCP (SMBB_BAT_IF_VCP = 0x00) */
+ pm8x41_reg_write(PM8XXX_VCP, 0x00);
+ /* Unlock SMBBP Secured Register */
+ pm8x41_reg_write(PM8XXX_SEC_ACCESS, SEC_ACCESS);
+ /* Force trickle charging (SMBB_CHGR_TRKL_CHG_TEST = 0x01) */
+ pm8x41_reg_write(PM8XXX_TRKL_CHG_TEST, CHG_TRICKLE_FORCED_ON);
+ /* Wait for vbat to rise */
+ mdelay(12);
+
+ /* Check Above VBAT_DET_HIGH status */
+ if (pm8x41_reg_read(PM8XXX_VBAT_IN_TSTS) & VBAT_DET_HI_RT_STS)
+ batt_is_broken = 1;
+ else
+ batt_is_broken = 0;
+
+ /* Unlock SMBBP Secured Register */
+ pm8x41_reg_write(PM8XXX_SEC_ACCESS, SEC_ACCESS);
+
+ /* Disable force trickle charging */
+ pm8x41_reg_write(PM8XXX_TRKL_CHG_TEST, 0x00);
+ /* re-enable VCP */
+ pm8x41_reg_write(PM8XXX_VCP, VCP_ENABLE);
+ /* restore trickle charging default current */
+ pm8x41_reg_write(PM8XXX_IBAT_ATC_A, trkl_default);
+ /* restore VBAT_DET_LO setting to original value */
+ pm8x41_reg_write(PM8XXX_VBAT_DET, vbat_det_default);
+
+ return batt_is_broken;
+}
diff --git a/platform/msm8226/acpuclock.c b/platform/msm8226/acpuclock.c
index 9525415..2496d8f 100755
--- a/platform/msm8226/acpuclock.c
+++ b/platform/msm8226/acpuclock.c
@@ -311,7 +311,7 @@
ASSERT(0);
}
- ret = clk_get_set_enable("mdss_mdp_clk_src", 100000000, 1);
+ ret = clk_get_set_enable("mdss_mdp_clk_src", 200000000, 1);
if(ret)
{
dprintf(CRITICAL, "failed to set mdp_clk_src ret = %d\n", ret);
diff --git a/platform/msm8226/msm8226-clock.c b/platform/msm8226/msm8226-clock.c
index 4c4758d..d79b895 100644
--- a/platform/msm8226/msm8226-clock.c
+++ b/platform/msm8226/msm8226-clock.c
@@ -377,6 +377,7 @@
static struct clk_freq_tbl ftbl_mdp_clk[] = {
F_MM( 75000000, gpll0, 8, 0, 0),
F_MM( 100000000, gpll0, 6, 0, 0),
+ F_MM( 200000000, gpll0, 3, 0, 0),
F_END
};
diff --git a/platform/msm_shared/include/msm_panel.h b/platform/msm_shared/include/msm_panel.h
index b586de0..4a3b98f 100755
--- a/platform/msm_shared/include/msm_panel.h
+++ b/platform/msm_shared/include/msm_panel.h
@@ -162,6 +162,7 @@
uint8_t broadcast;
uint8_t mode_gpio_state;
uint32_t signature;
+ uint32_t use_enable_gpio;
};
struct edp_panel_info {
diff --git a/target/msm8226/include/target/display.h b/target/msm8226/include/target/display.h
index 62f0eac..3d6ba61 100755
--- a/target/msm8226/include/target/display.h
+++ b/target/msm8226/include/target/display.h
@@ -42,7 +42,7 @@
};
static struct gpio_pin enable_gpio = {
- 0, 0, 0, 0, 0, 0
+ "msmgpio", 109, 3, 1, 0, 1
};
static struct gpio_pin te_gpio = {
diff --git a/target/msm8226/oem_panel.c b/target/msm8226/oem_panel.c
index 17955a7..56dcc06 100755
--- a/target/msm8226/oem_panel.c
+++ b/target/msm8226/oem_panel.c
@@ -47,6 +47,7 @@
#include "include/panel_nt35596_1080p_video.h"
#include "include/panel_nt35521_720p_video.h"
#include "include/panel_ssd2080m_720p_video.h"
+#include "include/panel_jdi_1080p_video.h"
/*---------------------------------------------------------------------------*/
/* static panel selection variable */
@@ -58,7 +59,17 @@
NT35596_1080P_VIDEO_PANEL,
HX8394A_720P_VIDEO_PANEL,
NT35521_720P_VIDEO_PANEL,
-SSD2080M_720P_VIDEO_PANEL
+SSD2080M_720P_VIDEO_PANEL,
+JDI_1080P_VIDEO_PANEL
+};
+
+enum target_subtype {
+ HW_PLATFORM_SUBTYPE_720P = 0,
+ HW_PLATFORM_SUBTYPE_SKUAA = 1,
+ HW_PLATFORM_SUBTYPE_SKUF = 2,
+ HW_PLATFORM_SUBTYPE_1080P = 2,
+ HW_PLATFORM_SUBTYPE_SKUAB = 3,
+ HW_PLATFORM_SUBTYPE_SKUG = 5,
};
static uint32_t panel_id;
@@ -244,6 +255,26 @@
= NT35596_1080P_VIDEO_ON_COMMAND;
memcpy(phy_db->timing,
nt35596_1080p_video_timings, TIMING_SIZE);
+ case JDI_1080P_VIDEO_PANEL:
+ panelstruct->paneldata = &jdi_1080p_video_panel_data;
+ panelstruct->paneldata->panel_with_enable_gpio = 1;
+ panelstruct->panelres = &jdi_1080p_video_panel_res;
+ panelstruct->color = &jdi_1080p_video_color;
+ panelstruct->videopanel = &jdi_1080p_video_video_panel;
+ panelstruct->commandpanel = &jdi_1080p_video_command_panel;
+ panelstruct->state = &jdi_1080p_video_state;
+ panelstruct->laneconfig = &jdi_1080p_video_lane_config;
+ panelstruct->paneltiminginfo
+ = &jdi_1080p_video_timing_info;
+ panelstruct->panelresetseq
+ = &jdi_1080p_video_panel_reset_seq;
+ panelstruct->backlightinfo = &jdi_1080p_video_backlight;
+ pinfo->mipi.panel_cmds
+ = jdi_1080p_video_on_command;
+ pinfo->mipi.num_of_panel_cmds
+ = JDI_1080P_VIDEO_ON_COMMAND;
+ memcpy(phy_db->timing,
+ jdi_1080p_video_timings, TIMING_SIZE);
break;
}
}
@@ -255,6 +286,7 @@
uint32_t hw_id = board_hardware_id();
uint32_t target_id = board_target_id();
uint32_t nt35590_panel_id = NT35590_720P_VIDEO_PANEL;
+ uint32_t hw_subtype = board_hardware_subtype();
#if DISPLAY_TYPE_CMD_MODE
nt35590_panel_id = NT35590_720P_CMD_PANEL;
@@ -262,12 +294,12 @@
switch (hw_id) {
case HW_PLATFORM_QRD:
- if (board_hardware_subtype() == 2) { //HW_PLATFORM_SUBTYPE_SKUF
+ if (hw_subtype == HW_PLATFORM_SUBTYPE_SKUF) {
panel_id = NT35521_720P_VIDEO_PANEL;
- } else if (board_hardware_subtype() == 5) { //HW_PLATFORM_SUBTYPE_SKUG
+ } else if (hw_subtype == HW_PLATFORM_SUBTYPE_SKUG) {
panel_id = SSD2080M_720P_VIDEO_PANEL;
} else {
- if (((target_id >> 16) & 0xFF) == 0x1) //EVT
+ if (((target_id >> 16) & 0xFF) == 0x1 || ((target_id >> 16) & 0xFF) == 0x3) //EVT || PVT
panel_id = nt35590_panel_id;
else if (((target_id >> 16) & 0xFF) == 0x2) //DVT
panel_id = HX8394A_720P_VIDEO_PANEL;
@@ -280,7 +312,15 @@
break;
case HW_PLATFORM_MTP:
case HW_PLATFORM_SURF:
- panel_id = nt35590_panel_id;
+ if (hw_subtype == HW_PLATFORM_SUBTYPE_720P) {
+ panel_id = nt35590_panel_id;
+ } else if (hw_subtype == HW_PLATFORM_SUBTYPE_1080P) {
+ panel_id = JDI_1080P_VIDEO_PANEL;
+ } else {
+ dprintf(CRITICAL, "Unsupported target_id=%d hw_subtype=%d\n"
+ , target_id, hw_subtype);
+ return false;
+ }
break;
default:
dprintf(CRITICAL, "Display not enabled for %d HW type\n"
diff --git a/target/msm8226/target_display.c b/target/msm8226/target_display.c
index 0dce4fe..d63352a 100755
--- a/target/msm8226/target_display.c
+++ b/target/msm8226/target_display.c
@@ -265,6 +265,15 @@
{
int ret = NO_ERROR;
if (enable) {
+ if (pinfo->mipi.use_enable_gpio) {
+ gpio_tlmm_config(enable_gpio.pin_id, 0,
+ enable_gpio.pin_direction, enable_gpio.pin_pull,
+ enable_gpio.pin_strength,
+ enable_gpio.pin_state);
+
+ gpio_set_dir(enable_gpio.pin_id, 2);
+ }
+
gpio_tlmm_config(reset_gpio.pin_id, 0,
reset_gpio.pin_direction, reset_gpio.pin_pull,
reset_gpio.pin_strength, reset_gpio.pin_state);
@@ -279,6 +288,8 @@
mdelay(resetseq->sleep[2]);
} else if(!target_cont_splash_screen()) {
gpio_set_value(reset_gpio.pin_id, 0);
+ if (pinfo->mipi.use_enable_gpio)
+ gpio_set_value(enable_gpio.pin_id, 0);
}
return ret;
diff --git a/target/msm8974/target_display.c b/target/msm8974/target_display.c
index 22568e8..e877f27 100644
--- a/target/msm8974/target_display.c
+++ b/target/msm8974/target_display.c
@@ -261,12 +261,31 @@
return 0;
}
+static void msm8974_lpg_backlight_enable(void)
+{
+ /* lpg channel 8 */
+ pm8x41_lpg_write(8, 0x41, 0x33); /* LPG_PWM_SIZE_CLK, */
+ pm8x41_lpg_write(8, 0x42, 0x01); /* LPG_PWM_FREQ_PREDIV */
+ pm8x41_lpg_write(8, 0x43, 0x20); /* LPG_PWM_TYPE_CONFIG */
+ pm8x41_lpg_write(8, 0x44, 0xb2); /* LPG_VALUE_LSB */
+ pm8x41_lpg_write(8, 0x45, 0x01); /* LPG_VALUE_MSB */
+ pm8x41_lpg_write(8, 0x46, 0xe4); /* LPG_ENABLE_CONTROL */
+}
+
+static void msm8974_lpg_backlight_disable(void)
+{
+ pm8x41_lpg_write(8, 0x46, 0x00); /* LPG_ENABLE_CONTROL */
+}
+
static int msm8974_edp_panel_power(int enable)
{
struct pm8x41_gpio gpio36_param = {
.direction = PM_GPIO_DIR_OUT,
+ .function = PM_GPIO_FUNC_2,
+ .vin_sel = 2, /* VIN_2 */
+ .pull = PM_GPIO_PULL_UP_1_5 | PM_GPIO_PULLDOWN_10,
.output_buffer = PM_GPIO_OUT_CMOS,
- .out_strength = PM_GPIO_OUT_DRIVE_MED,
+ .out_strength = PM_GPIO_OUT_DRIVE_HIGH,
};
struct pm8x41_ldo ldo12 = LDO(PM8x41_LDO12, PLDO_TYPE);
@@ -275,7 +294,7 @@
/* Enable backlight */
dprintf(SPEW, "Enable Backlight\n");
pm8x41_gpio_config(36, &gpio36_param);
- pm8x41_gpio_set(36, PM_GPIO_FUNC_HIGH);
+ msm8974_lpg_backlight_enable();
dprintf(SPEW, "Enable Backlight Done\n");
/* Turn on LDO12 for edp vdda */
@@ -293,7 +312,7 @@
} else {
/* Keep LDO12 on, otherwise kernel will not boot */
gpio_set(58, 0);
- pm8x41_gpio_set(36, PM_GPIO_FUNC_LOW);
+ msm8974_lpg_backlight_disable();
}
return 0;