| commit | 7d2adc35606c56036f32b4d1c3996183ae927be5 | [log] [tgz] |
|---|---|---|
| author | raghavendra ambadas <rambad@codeaurora.org> | Mon Dec 21 12:30:55 2015 +0530 |
| committer | raghavendra ambadas <rambad@codeaurora.org> | Mon Dec 21 12:30:55 2015 +0530 |
| tree | 168666c156f4ca213b89e56d6d6fae920a37dec2 | |
| parent | 0dad668f88575f60b58ba21f879ca4f6e97818f4 [diff] |
platform: msm_shared: Add delay in lock detection config PLL lock status check fails without delay between lock detection configuration and PLL lock check. This delay was earlier removed by below change Ie8669bd6f7a8ee4d92fd21aa568528faebe3612a Change-Id: I311b1025f8192a0231a8208287b8d68f9b6d4f54
diff --git a/platform/msm_shared/mipi_dsi_phy.c b/platform/msm_shared/mipi_dsi_phy.c index 6449e02..9e23255 100644 --- a/platform/msm_shared/mipi_dsi_phy.c +++ b/platform/msm_shared/mipi_dsi_phy.c
@@ -203,6 +203,7 @@ writel(0x0c, ctl_base + 0x0264); /* LKDetect CFG2 */ udelay(1); writel(0x0d, ctl_base + 0x0264); /* LKDetect CFG2 */ + mdelay(1); } void mdss_dsi_uniphy_pll_sw_reset(uint32_t ctl_base)