Merge "msm_shared: edp continuous splash support"
diff --git a/app/aboot/aboot.c b/app/aboot/aboot.c
index 50e1425..2f8aff1 100644
--- a/app/aboot/aboot.c
+++ b/app/aboot/aboot.c
@@ -69,8 +69,6 @@
 #include "scm.h"
 
 extern  bool target_use_signed_kernel(void);
-extern void dsb();
-extern void isb();
 extern void platform_uninit(void);
 extern void target_uninit(void);
 
@@ -121,7 +119,7 @@
 /* Assuming unauthorized kernel image by default */
 static int auth_kernel_img = 0;
 
-static device_info device = {DEVICE_MAGIC, 0, 0};
+static device_info device = {DEVICE_MAGIC, 0, 0, 0};
 
 struct atag_ptbl_entry
 {
@@ -155,6 +153,7 @@
 };
 
 char max_download_size[MAX_RSP_SIZE];
+char charger_screen_enabled[MAX_RSP_SIZE];
 char sn_buf[13];
 
 extern int emmc_recovery_init(void);
@@ -213,7 +212,8 @@
 		cmdline_len += strlen(ffbm_mode_string);
 		/* reduce kernel console messages to speed-up boot */
 		cmdline_len += strlen(loglevel);
-	} else if (target_pause_for_battery_charge()) {
+	} else if (device.charger_screen_enabled &&
+			target_pause_for_battery_charge()) {
 		pause_at_bootup = 1;
 		cmdline_len += strlen(battchg_pause);
 	}
@@ -1194,6 +1194,7 @@
 		memcpy(info->magic, DEVICE_MAGIC, DEVICE_MAGIC_SIZE);
 		info->is_unlocked = 0;
 		info->is_tampered = 0;
+		info->charger_screen_enabled = 0;
 
 		write_device_info_mmc(info);
 	}
@@ -1836,6 +1837,22 @@
 	reboot_device(FASTBOOT_MODE);
 }
 
+void cmd_oem_enable_charger_screen(const char *arg, void *data, unsigned size)
+{
+	dprintf(INFO, "Enabling charger screen check\n");
+	device.charger_screen_enabled = 1;
+	write_device_info(&device);
+	fastboot_okay("");
+}
+
+void cmd_oem_disable_charger_screen(const char *arg, void *data, unsigned size)
+{
+	dprintf(INFO, "Disabling charger screen check\n");
+	device.charger_screen_enabled = 0;
+	write_device_info(&device);
+	fastboot_okay("");
+}
+
 void cmd_oem_unlock(const char *arg, void *data, unsigned sz)
 {
 	if(!device.is_unlocked)
@@ -1849,9 +1866,11 @@
 void cmd_oem_devinfo(const char *arg, void *data, unsigned sz)
 {
 	char response[64];
-	snprintf(response, 64, "\tDevice tampered: %s", (device.is_tampered ? "true" : "false"));
+	snprintf(response, sizeof(response), "\tDevice tampered: %s", (device.is_tampered ? "true" : "false"));
 	fastboot_info(response);
-	snprintf(response, 64, "\tDevice unlocked: %s", (device.is_unlocked ? "true" : "false"));
+	snprintf(response, sizeof(response), "\tDevice unlocked: %s", (device.is_unlocked ? "true" : "false"));
+	fastboot_info(response);
+	snprintf(response, sizeof(response), "\tCharger screen enabled: %s", (device.charger_screen_enabled ? "true" : "false"));
 	fastboot_info(response);
 	fastboot_okay("");
 }
@@ -1971,7 +1990,10 @@
 	fastboot_register("oem unlock",        cmd_oem_unlock);
 	fastboot_register("oem device-info",   cmd_oem_devinfo);
 	fastboot_register("preflash",          cmd_preflash);
-
+	fastboot_register("oem enable-charger-screen",
+			cmd_oem_enable_charger_screen);
+	fastboot_register("oem disable-charger-screen",
+			cmd_oem_disable_charger_screen);
 	/* publish variables and their values */
 	fastboot_publish("product",  TARGET(BOARD));
 	fastboot_publish("kernel",   "lk");
@@ -1987,8 +2009,14 @@
 		publish_getvar_partition_info(part_info, ARRAY_SIZE(part_info));
 
 	/* Max download size supported */
-	snprintf(max_download_size, MAX_RSP_SIZE, "\t0x%x", target_get_max_flash_size());
+	snprintf(max_download_size, MAX_RSP_SIZE, "\t0x%x",
+			target_get_max_flash_size());
 	fastboot_publish("max-download-size", (const char *) max_download_size);
+	/* Is the charger screen check enabled */
+	snprintf(charger_screen_enabled, MAX_RSP_SIZE, "%d",
+			device.charger_screen_enabled);
+	fastboot_publish("charger-screen-enabled",
+			(const char *) charger_screen_enabled);
 }
 
 void aboot_init(const struct app_descriptor *app)
@@ -2010,11 +2038,7 @@
 
 	ASSERT((MEMBASE + MEMSIZE) > MEMBASE);
 
-	if(target_use_signed_kernel())
-	{
-		read_device_info(&device);
-
-	}
+	read_device_info(&device);
 
 	target_serialno((unsigned char *) sn_buf);
 	dprintf(SPEW,"serial number: %s\n",sn_buf);
diff --git a/app/aboot/devinfo.h b/app/aboot/devinfo.h
index 1d87581..558aaf9 100644
--- a/app/aboot/devinfo.h
+++ b/app/aboot/devinfo.h
@@ -40,6 +40,7 @@
 	unsigned char magic[DEVICE_MAGIC_SIZE];
 	bool is_unlocked;
 	bool is_tampered;
+	bool charger_screen_enabled;
 };
 
 #endif
diff --git a/arch/arm/cache.c b/arch/arm/cache.c
index 0a403b5..b024d37 100644
--- a/arch/arm/cache.c
+++ b/arch/arm/cache.c
@@ -1,22 +1,43 @@
-/*
- * Copyright (c) 2008 Travis Geiselbrecht
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
  *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of The Linux Foundation nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
  *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
+
+ #include <debug.h>
+ #include <arch/defines.h>
+ #include <stdlib.h>
+ #include <arch/ops.h>
+
+ void cache_clean_invalidate_unaligned_start_addr(addr_t start, size_t size)
+ {
+	addr_t actual_start;
+	size_t actual_size;
+
+	actual_start = GET_CAHE_LINE_START_ADDR(start);
+	actual_size = start - actual_start + size;
+
+	arch_clean_invalidate_cache_range(actual_start, actual_size);
+ }
diff --git a/arch/arm/include/arch/defines.h b/arch/arm/include/arch/defines.h
index 2041f39..f1e5228 100644
--- a/arch/arm/include/arch/defines.h
+++ b/arch/arm/include/arch/defines.h
@@ -41,5 +41,13 @@
 #endif
 
 #define IS_CACHE_LINE_ALIGNED(addr)  !((uint32_t) (addr) & (CACHE_LINE - 1))
+
+#if ARM_ISA_ARMV7
+#define dsb() __asm__ volatile ("dsb" : : : "memory");
+#elif ARM_ISA_ARMV6
+#define dsb() __asm__ volatile ("mcr p15, 0, %0, c7, c10, 4" : : "r" (0): "memory");
 #endif
 
+#define GET_CAHE_LINE_START_ADDR(addr) ROUNDDOWN(addr, CACHE_LINE)
+
+#endif
diff --git a/arch/arm/mmu.c b/arch/arm/mmu.c
index 3fc61bf..2027b41 100644
--- a/arch/arm/mmu.c
+++ b/arch/arm/mmu.c
@@ -25,6 +25,7 @@
 #include <compiler.h>
 #include <arch.h>
 #include <arch/arm.h>
+#include <arch/defines.h>
 #include <arch/arm/mmu.h>
 
 #if ARM_WITH_MMU
@@ -94,6 +95,10 @@
 
 void arch_disable_mmu(void)
 {
+	/* Ensure all memory access are complete
+	 * before disabling MMU
+	 */
+	dsb();
 	arm_write_cr1(arm_read_cr1() & ~(1<<0));
 	arm_invalidate_tlb();
 }
diff --git a/arch/arm/ops.S b/arch/arm/ops.S
index 2581273..6b9d966 100644
--- a/arch/arm/ops.S
+++ b/arch/arm/ops.S
@@ -209,6 +209,12 @@
 /* void arm_write_cr1(uint32_t val) */
 FUNCTION(arm_write_cr1)
 	mcr		p15, 0, r0, c1, c0, 0
+#if ARM_CPU_CORTEX_A8
+	isb		sy
+#elif ARM_CPU_ARM1136
+	mov		r0, #0
+	mcr		p15, 0, r0, c7, c5, 4
+#endif
 	bx		lr
 
 /* uint32_t arm_read_cr1_aux(void) */
@@ -235,6 +241,18 @@
 FUNCTION(arm_invalidate_tlb)
 	mov		r0, #0
 	mcr	p15, 0, r0, c8, c7, 0
+#if ARM_CPU_CORTEX_A8
+	dsb		sy
+#elif ARM_CPU_ARM1136
+	mov		r0, #0
+	mcr		p15, 0, r0, c7, c10, 4
+#endif
+#if ARM_CPU_CORTEX_A8
+	isb		sy
+#elif ARM_CPU_ARM1136
+	mov		r0, #0
+	mcr		p15, 0, r0, c7, c5, 4
+#endif
 	bx		lr
 
 /* void arch_switch_stacks_and_call(addr_t call, addr_t stack) */
@@ -252,26 +270,6 @@
 #endif
 	bx		lr
 
-/*void isb(void) */
-FUNCTION(isb)
-#if ARM_CPU_CORTEX_A8
-	isb		sy
-#elif ARM_CPU_ARM1136
-	mov		r0, #0
-	mcr		p15, 0, r0, c7, c5, 4
-#endif
-	bx		lr
-
-/*void dsb(void) */
-FUNCTION(dsb)
-#if ARM_CPU_CORTEX_A8
-	dsb		sy
-#elif ARM_CPU_ARM1136
-	mov		r0, #0
-	mcr		p15, 0, r0, c7, c10, 4
-#endif
-	bx		lr
-
 /* uint32_t arm_read_cycle_count(void); */
 FUNCTION(arm_read_cycle_count)
 
diff --git a/dev/gcdb/display/include/panel_nt35521_720p_video.h b/dev/gcdb/display/include/panel_nt35521_720p_video.h
index e9e4104..ae70a50 100644
--- a/dev/gcdb/display/include/panel_nt35521_720p_video.h
+++ b/dev/gcdb/display/include/panel_nt35521_720p_video.h
@@ -1185,6 +1185,9 @@
 0x53, 0x2C, 0xFF, 0xFF,  };
 
 
+static char nt35521_720p_video_on_cmd205[] = {
+0x02, 0x00, 0x29, 0xC0,
+0x51, 0xFF, 0xFF, 0xFF,  };
 
 
 static struct mipi_dsi_cmd nt35521_720p_video_on_command[] = {
@@ -1392,9 +1395,10 @@
 { 0x4 , nt35521_720p_video_on_cmd201},
 { 0xc , nt35521_720p_video_on_cmd202},
 { 0xc , nt35521_720p_video_on_cmd203},
-{ 0x8 , nt35521_720p_video_on_cmd204}
+{ 0x8 , nt35521_720p_video_on_cmd204},
+{ 0x8 , nt35521_720p_video_on_cmd205}
 };
-#define NT35521_720P_VIDEO_ON_COMMAND 205
+#define NT35521_720P_VIDEO_ON_COMMAND 206
 
 
 static char nt35521_720p_videooff_cmd0[] = {
diff --git a/dev/panel/msm/mipi_hx8379a_video_wvga.c b/dev/panel/msm/mipi_hx8379a_video_wvga.c
new file mode 100644
index 0000000..de04f2f
--- /dev/null
+++ b/dev/panel/msm/mipi_hx8379a_video_wvga.c
@@ -0,0 +1,263 @@
+/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of The Linux Foundation nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include <stdint.h>
+#include <msm_panel.h>
+#include <mipi_dsi.h>
+#include <sys/types.h>
+#include <err.h>
+#include <reg.h>
+#include <debug.h>
+#include <target/display.h>
+#include <platform/iomap.h>
+
+#define WVGA_MIPI_FB_WIDTH            480
+#define WVGA_MIPI_FB_HEIGHT           800
+
+#define HX8379A_PANEL_FRAME_RATE        60
+#define HX8379A_PANEL_NUM_OF_LANES	2
+#define HX8379A_PANEL_LANE_SWAP         1
+#define HX8379A_PANEL_T_CLK_PRE         0x41b
+#define HX8379A_PANEL_T_CLK_POST        0x0
+#define HX8379A_PANEL_BPP               24
+#define HX8379A_PANEL_CLK_RATE          499000000
+
+#define MIPI_HSYNC_PULSE_WIDTH      17
+#define MIPI_HSYNC_BACK_PORCH_DCLK   90
+#define MIPI_HSYNC_FRONT_PORCH_DCLK  90
+#define MIPI_VSYNC_PULSE_WIDTH       6
+#define MIPI_VSYNC_BACK_PORCH_LINES  10
+#define MIPI_VSYNC_FRONT_PORCH_LINES 15
+
+static char disp_on0[8] = {
+	0x04, 0x00, 0x39, 0xC0,
+	0xB9, 0xFF, 0x83, 0x79
+};
+static char disp_on1[4] = {
+	0xBA, 0x51, 0x23, 0x80,
+};
+static char disp_on2[8] = {
+	0x04, 0x00, 0x39, 0xC0,
+	0xDE, 0x05, 0x50, 0x04
+};
+static char disp_on3[24] = {
+	0x14, 0x00, 0x39, 0xC0,
+	0xB1, 0x00, 0x50, 0x44,
+	0xEA, 0x8D, 0x08, 0x11,
+	0x11, 0x11, 0x27, 0x2F,
+	0x9A, 0x1A, 0x42, 0x0B,
+	0x6E, 0xF1, 0x00, 0xE6
+};
+static char disp_on4[20] = {
+	0x0E, 0x00, 0x39, 0xC0,
+	0xB2, 0x00, 0x00, 0x3C,
+	0x08, 0x04, 0x19, 0x22,
+	0x00, 0xFF, 0x08, 0x04,
+	0x19, 0x20, 0xFF, 0xFF
+};
+static char disp_on5[36] = {
+	0x20, 0x00, 0x39, 0xC0,
+	0xB4, 0x82, 0x08, 0x00,
+	0x32, 0x10, 0x03, 0x32,
+	0x13, 0x70, 0x32, 0x10,
+	0x08, 0x37, 0x01, 0x28,
+	0x07, 0x37, 0x08, 0x3A,
+	0x08, 0x42, 0x42, 0x08,
+	0x00, 0x40, 0x08, 0x28,
+	0x08, 0x30, 0x30, 0x04
+};
+static char disp_on6[52] = {
+	0x30, 0x00, 0x39, 0xC0,
+	0xD5, 0x00, 0x00, 0x0A,
+	0x00, 0x01, 0x05, 0x00,
+	0x03, 0x00, 0x88, 0x88,
+	0x88, 0x88, 0x23, 0x01,
+	0x67, 0x45, 0x02, 0x13,
+	0x88, 0x88, 0x88, 0x88,
+	0x88, 0x88, 0x88, 0x88,
+	0x88, 0x88, 0x54, 0x76,
+	0x10, 0x32, 0x31, 0x20,
+	0x88, 0x88, 0x88, 0x88,
+	0x88, 0x88, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00
+};
+static char disp_on7[40] = {
+	0x24, 0x00, 0x39, 0xC0,
+	0xE0, 0x79, 0x05, 0x0F,
+	0x14, 0x26, 0x29, 0x3F,
+	0x2B, 0x46, 0x04, 0x0E,
+	0x12, 0x15, 0x18, 0x16,
+	0x16, 0x11, 0x17, 0x05,
+	0x0F, 0x14, 0x26, 0x29,
+	0x3F, 0x2B, 0x46, 0x04,
+	0x0E, 0x12, 0x15, 0x18,
+	0x16, 0x16, 0x11, 0x17
+};
+static char disp_on8[4] = {
+	0xCC, 0x02, 0x23, 0x80,
+};
+static char disp_on9[12] = {
+	0x05, 0x00, 0x39, 0xC0,
+	0xB6, 0x00, 0x9C, 0x00,
+	0x9C, 0xFF, 0xFF, 0xFF
+};
+static char disp_on10[4] = {
+	0x11, 0x00, 0x05, 0x80
+};
+static char disp_on11[4] = {
+	0x29, 0x00, 0x05, 0x80
+};
+
+static struct mipi_dsi_cmd hx8379a_wvga_panel_video_mode_cmds[] = {
+	{sizeof(disp_on0), (char *)disp_on0},
+	{sizeof(disp_on1), (char *)disp_on1},
+	{sizeof(disp_on2), (char *)disp_on2},
+	{sizeof(disp_on3), (char *)disp_on3},
+	{sizeof(disp_on4), (char *)disp_on4},
+	{sizeof(disp_on5), (char *)disp_on5},
+	{sizeof(disp_on6), (char *)disp_on6},
+	{sizeof(disp_on7), (char *)disp_on7},
+	{sizeof(disp_on8), (char *)disp_on8},
+	{sizeof(disp_on9), (char *)disp_on9},
+	{sizeof(disp_on10), (char *)disp_on10},
+	{sizeof(disp_on11), (char *)disp_on11},
+};
+
+int mipi_hx8379a_video_wvga_config(void *pdata)
+{
+	int ret = NO_ERROR;
+	/* 2 Lanes -- Enables Data Lane0, 1 */
+	unsigned char lane_en = 3;
+	unsigned long low_pwr_stop_mode = 0;
+
+	/* Needed or else will have blank line at top of display */
+	unsigned char eof_bllp_pwr = 0x9;
+
+	unsigned char interleav = 0;
+	struct lcdc_panel_info *lcdc = NULL;
+	struct msm_panel_info *pinfo = (struct msm_panel_info *) pdata;
+
+	if (pinfo == NULL)
+		return ERR_INVALID_ARGS;
+
+	lcdc =  &(pinfo->lcdc);
+	if (lcdc == NULL)
+		return ERR_INVALID_ARGS;
+
+	ret = mdss_dsi_video_mode_config((pinfo->xres),
+			(pinfo->yres),
+			(pinfo->xres),
+			(pinfo->yres),
+			(lcdc->h_front_porch),
+			(lcdc->h_back_porch),
+			(lcdc->v_front_porch),
+			(lcdc->v_back_porch),
+			(lcdc->h_pulse_width),
+			(lcdc->v_pulse_width),
+			pinfo->mipi.dst_format,
+			pinfo->mipi.traffic_mode,
+			lane_en,
+			low_pwr_stop_mode,
+			eof_bllp_pwr,
+			interleav,
+			MIPI_DSI0_BASE);
+	return ret;
+}
+
+int mipi_hx8379a_video_wvga_on()
+{
+	int ret = NO_ERROR;
+	return ret;
+}
+
+int mipi_hx8379a_video_wvga_off()
+{
+	int ret = NO_ERROR;
+	return ret;
+}
+
+static struct mdss_dsi_phy_ctrl dsi_video_mode_phy_db = {
+	/* regulator */
+	{0x02, 0x08, 0x05, 0x00, 0x20, 0x03},
+	/* timing   */
+	{0x5d, 0x12, 0x0c, 0x00, 0x33, 0x39,
+		0x10, 0x16, 0x15, 0x03, 0x04, 0x00},
+	/* phy ctrl */
+	{0x7f, 0x00, 0x00, 0x00},
+	/* strength */
+	{0xff, 0x06},
+	/* bist */
+	{0x03, 0x03, 0x00, 0x00, 0x0f, 0x00},
+	/* lane config */
+	{	0x80, 0x45, 0x00, 0x00, 0x00, 0x01, 0x66, 0x00, 0x00,
+		0x80, 0x45, 0x00, 0x00, 0x00, 0x01, 0x66, 0x00, 0x00,
+		0x80, 0x45, 0x00, 0x00, 0x00, 0x01, 0x66, 0x00, 0x00,
+		0x80, 0x45, 0x00, 0x00, 0x00, 0x01, 0x66, 0x00, 0x00,
+		0x40, 0x67, 0x00, 0x00, 0x00, 0x01, 0x88, 0x00, 0x00},
+};
+
+void mipi_hx8379a_video_wvga_init(struct msm_panel_info *pinfo)
+{
+	if (!pinfo)
+		return;
+
+	pinfo->xres = WVGA_MIPI_FB_WIDTH;
+	pinfo->yres = WVGA_MIPI_FB_HEIGHT;
+	pinfo->lcdc.h_back_porch = MIPI_HSYNC_BACK_PORCH_DCLK;
+	pinfo->lcdc.h_front_porch = MIPI_HSYNC_FRONT_PORCH_DCLK;
+	pinfo->lcdc.h_pulse_width = MIPI_HSYNC_PULSE_WIDTH;
+	pinfo->lcdc.v_back_porch = MIPI_VSYNC_BACK_PORCH_LINES;
+	pinfo->lcdc.v_front_porch = MIPI_VSYNC_FRONT_PORCH_LINES;
+	pinfo->lcdc.v_pulse_width = MIPI_VSYNC_PULSE_WIDTH;
+	pinfo->mipi.num_of_lanes = HX8379A_PANEL_NUM_OF_LANES;
+	pinfo->mipi.frame_rate = HX8379A_PANEL_FRAME_RATE;
+
+	pinfo->type = MIPI_VIDEO_PANEL;
+	pinfo->wait_cycle = 0;
+	pinfo->bpp = HX8379A_PANEL_BPP;
+	pinfo->clk_rate = HX8379A_PANEL_CLK_RATE;
+
+	pinfo->mipi.mode = DSI_VIDEO_MODE;
+	pinfo->mipi.traffic_mode = 2;
+	pinfo->mipi.dst_format = DSI_VIDEO_DST_FORMAT_RGB888;
+	pinfo->mipi.mdss_dsi_phy_db = &dsi_video_mode_phy_db;
+	pinfo->mipi.tx_eot_append = TRUE;
+
+	pinfo->mipi.lane_swap = HX8379A_PANEL_LANE_SWAP;
+	pinfo->mipi.t_clk_post = HX8379A_PANEL_T_CLK_POST;
+	pinfo->mipi.t_clk_pre = HX8379A_PANEL_T_CLK_PRE;
+	pinfo->mipi.panel_cmds = hx8379a_wvga_panel_video_mode_cmds;
+	pinfo->mipi.num_of_panel_cmds = ARRAY_SIZE(hx8379a_wvga_panel_video_mode_cmds);
+
+	pinfo->on = mipi_hx8379a_video_wvga_on;
+	pinfo->off = mipi_hx8379a_video_wvga_off;
+	pinfo->config = mipi_hx8379a_video_wvga_config;
+
+	return;
+};
diff --git a/dev/panel/msm/mipi_otm8018b_video_fwvga.c b/dev/panel/msm/mipi_otm8018b_video_fwvga.c
new file mode 100644
index 0000000..4a7a179
--- /dev/null
+++ b/dev/panel/msm/mipi_otm8018b_video_fwvga.c
@@ -0,0 +1,623 @@
+/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of The Linux Foundation nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include <stdint.h>
+#include <msm_panel.h>
+#include <mipi_dsi.h>
+#include <sys/types.h>
+#include <err.h>
+#include <reg.h>
+#include <debug.h>
+#include <target/display.h>
+#include <platform/iomap.h>
+
+#define WVGA_MIPI_FB_WIDTH            480
+#define WVGA_MIPI_FB_HEIGHT           854
+
+#define OTM8018B_PANEL_FRAME_RATE        60
+#define OTM8018B_PANEL_NUM_OF_LANES	2
+#define OTM8018B_PANEL_LANE_SWAP         1
+#define OTM8018B_PANEL_T_CLK_PRE         0x41b
+#define OTM8018B_PANEL_T_CLK_POST        0x0
+#define OTM8018B_PANEL_BPP               24
+#define OTM8018B_PANEL_CLK_RATE          499000000
+
+#define MIPI_HSYNC_PULSE_WIDTH      8
+#define MIPI_HSYNC_BACK_PORCH_DCLK   54
+#define MIPI_HSYNC_FRONT_PORCH_DCLK  80
+#define MIPI_VSYNC_PULSE_WIDTH       2
+#define MIPI_VSYNC_BACK_PORCH_LINES  16
+#define MIPI_VSYNC_FRONT_PORCH_LINES 12
+
+static char disp_on0[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0x00, 0x00, 0xFF, 0xFF
+};
+
+static char disp_on1[8] = {
+	0x04, 0x00, 0x29, 0xC0,
+	0xFF, 0x80, 0x09, 0x01
+};
+static char disp_on2[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0x00, 0x80, 0xFF, 0xFF
+};
+static char disp_on3[8] = {
+	0x03, 0x00, 0x29, 0xC0,
+	0xFF, 0x80, 0x09, 0xFF
+};
+
+static char disp_on4[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0x00, 0x80, 0xFF, 0xFF
+};
+static char disp_on5[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0xD6, 0x48, 0xFF, 0xFF
+};
+
+static char disp_on6[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0x00, 0x03, 0xFF, 0xFF
+};
+static char disp_on7[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0xFF, 0x01, 0xFF, 0xFF
+};
+
+static char disp_on8[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0x00, 0xB4, 0xFF, 0xFF
+};
+
+static char disp_on9[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0xC0, 0x10, 0xFF, 0xFF
+};
+
+static char disp_on10[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0x00, 0x82, 0xFF, 0xFF
+};
+static char disp_on11[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0xC5, 0xA3, 0xFF, 0xFF
+};
+static char disp_on12[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0x00, 0x90, 0xFF, 0xFF
+};
+static char disp_on13[8] = {
+	0x03, 0x00, 0x29, 0xC0,
+	0xC5, 0x96, 0x87, 0xFF
+};
+static char disp_on14[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0x00, 0x00, 0xFF, 0xFF
+};
+static char disp_on15[8] = {
+	0x03, 0x00, 0x29, 0xC0,
+	0xD8, 0x74, 0x72, 0xFF
+};
+static char disp_on16[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0x00, 0x00, 0xFF, 0xFF
+};
+static char disp_on17[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0xD9, 0x56, 0xFF, 0xFF
+};
+static char disp_on18[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0x00, 0x00, 0xFF, 0xFF
+};
+static char disp_on19[24] = {
+	0x11, 0x00, 0x29, 0xC0,
+	0xE1, 0x00, 0x06, 0x0A,
+	0x07, 0x03, 0x16, 0x08,
+	0x0A, 0x04, 0x06, 0x07,
+	0x08, 0x0F, 0x23, 0x22,
+	0x05, 0xff, 0xff, 0xff
+};
+static char disp_on20[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0x00, 0x00, 0xFF, 0xFF
+};
+static char disp_on21[24] = {
+	0x11, 0x00, 0x29, 0xC0,
+	0xE2, 0x00, 0x06, 0x0A,
+	0x07, 0x03, 0x16, 0x08,
+	0x0A, 0x04, 0x06, 0x07,
+	0x08, 0x0F, 0x23, 0x22,
+	0x05, 0xff, 0xff, 0xff
+};
+static char disp_on22[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0x00, 0x81, 0xFF, 0xFF
+};
+static char disp_on23[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0xC1, 0x77, 0xFF, 0xFF
+};
+static char disp_on24[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0x00, 0xA0, 0xFF, 0xFF
+};
+static char disp_on25[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0xC1, 0xEA, 0xFF, 0xFF
+};
+static char disp_on26[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0x00, 0xA1, 0xFF, 0xFF
+};
+static char disp_on27[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0xC1, 0x08, 0xFF, 0xFF
+};
+static char disp_on28[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0x00, 0x89, 0xFF, 0xFF
+};
+static char disp_on29[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0xC4, 0x08, 0xFF, 0xFF
+};
+static char disp_on30[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0x00, 0x81, 0xFF, 0xFF
+};
+static char disp_on31[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0xC4, 0x83, 0xFF, 0xFF
+};
+static char disp_on32[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0x00, 0x92, 0xFF, 0xFF
+};
+static char disp_on33[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0xC5, 0x01, 0xFF, 0xFF
+};
+static char disp_on34[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0x00, 0xB1, 0xFF, 0xFF
+};
+static char disp_on35[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0xC5, 0xA9, 0xFF, 0xFF
+};
+static char disp_on36[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0x00, 0x92, 0xFF, 0xFF
+};
+static char disp_on37[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0xB3, 0x45, 0xFF, 0xFF
+};
+static char disp_on38[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0x00, 0x90, 0xFF, 0xFF
+};
+static char disp_on39[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0xB3, 0x02, 0xFF, 0xFF
+};
+static char disp_on40[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0x00, 0x80, 0xFF, 0xFF
+};
+static char disp_on41[12] = {
+	0x06, 0x00, 0x29, 0xC0,
+	0xC0, 0x00, 0x58, 0x00,
+	0x14, 0x16, 0xff, 0xff
+};
+static char disp_on42[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0x00, 0x80, 0xFF, 0xFF
+};
+static char disp_on43[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0xC4, 0x30, 0xFF, 0xFF
+};
+static char disp_on44[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0x00, 0x90, 0xFF, 0xFF
+};
+static char disp_on45[12] = {
+	0x07, 0x00, 0x29, 0xC0,
+	0xC0, 0x00, 0x44, 0x00,
+	0x00, 0x00, 0x03, 0xff
+};
+static char disp_on46[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0x00, 0xA6, 0xFF, 0xFF
+};
+static char disp_on47[8] = {
+	0x04, 0x00, 0x29, 0xC0,
+	0xC1, 0x01, 0x00, 0x00
+};
+static char disp_on48[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0x00, 0x80, 0xFF, 0xFF
+};
+static char disp_on49[20] = {
+	0x0D, 0x00, 0x29, 0xC0,
+	0xCE, 0x87, 0x03, 0x00,
+	0x85, 0x03, 0x00, 0x86,
+	0x03, 0x00, 0x84, 0x03,
+	0x00, 0xff, 0xff, 0xff
+};
+static char disp_on50[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0x00, 0xA0, 0xFF, 0xFF
+};
+static char disp_on51[20] = {
+	0x0F, 0x00, 0x29, 0xC0,
+	0xCE, 0x38, 0x03, 0x03,
+	0x58, 0x00, 0x00, 0x00,
+	0x38, 0x02, 0x03, 0x59,
+	0x00, 0x00, 0x00, 0xff
+};
+static char disp_on52[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0x00, 0xB0, 0xFF, 0xFF
+};
+static char disp_on53[20] = {
+	0x0F, 0x00, 0x29, 0xC0,
+	0xCE, 0x38, 0x01, 0x03,
+	0x5A, 0x00, 0x00, 0x00,
+	0x38, 0x00, 0x03, 0x5B,
+	0x00, 0x00, 0x00, 0xff
+};
+static char disp_on54[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0x00, 0xC0, 0xFF, 0xFF
+};
+static char disp_on55[20] = {
+	0x0F, 0x00, 0x29, 0xC0,
+	0xCE, 0x30, 0x00, 0x03,
+	0x5C, 0x00, 0x00, 0x00,
+	0x30, 0x01, 0x03, 0x5D,
+	0x00, 0x00, 0x00, 0xff
+};
+static char disp_on56[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0x00, 0xD0, 0xFF, 0xFF
+};
+static char disp_on57[20] = {
+	0x0F, 0x00, 0x29, 0xC0,
+	0xCE, 0x30, 0x02, 0x03,
+	0x5E, 0x00, 0x00, 0x00,
+	0x30, 0x03, 0x03, 0x5F,
+	0x00, 0x00, 0x00, 0xff
+};
+static char disp_on58[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0x00, 0xC7, 0xFF, 0xFF
+};
+static char disp_on59[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0xCF, 0x00, 0xFF, 0xFF
+};
+static char disp_on60[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0x00, 0xC9, 0xFF, 0xFF
+};
+static char disp_on61[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0xCF, 0x00, 0xFF, 0xFF
+};
+static char disp_on62[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0x00, 0xD0, 0xFF, 0xFF
+};
+static char disp_on63[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0xCF, 0x00, 0xFF, 0xFF
+};
+static char disp_on64[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0x00, 0xC4, 0xFF, 0xFF
+};
+static char disp_on65[12] = {
+	0x07, 0x00, 0x29, 0xC0,
+	0xCB, 0x04, 0x04, 0x04,
+	0x04, 0x04, 0x04, 0xff
+};
+static char disp_on66[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0x00, 0xD9, 0xFF, 0xFF
+};
+static char disp_on67[12] = {
+	0x07, 0x00, 0x29, 0xC0,
+	0xCB, 0x04, 0x04, 0x04,
+	0x04, 0x04, 0x04, 0xff
+};
+static char disp_on68[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0x00, 0x84, 0xFF, 0xFF
+};
+static char disp_on69[12] = {
+	0x07, 0x00, 0x29, 0xC0,
+	0xCC, 0x0C, 0x0A, 0x10,
+	0x0E, 0x03, 0x04, 0xFF
+};
+static char disp_on70[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0x00, 0x9E, 0xFF, 0xFF
+};
+static char disp_on71[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0xCC, 0x0B, 0xFF, 0xFF
+};
+static char disp_on72[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0x00, 0xA0, 0xFF, 0xFF
+};
+static char disp_on73[12] = {
+	0x06, 0x00, 0x29, 0xC0,
+	0xCC, 0x09, 0x0F, 0x0D,
+	0x01, 0x02, 0xFF, 0xFF
+};
+static char disp_on74[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0x00, 0xB4, 0xFF, 0xFF
+};
+static char disp_on75[12] = {
+	0x07, 0x00, 0x29, 0xC0,
+	0xCC, 0x0D, 0x0F, 0x09,
+	0x0B, 0x02, 0x01, 0xFF
+};
+static char disp_on76[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0x00, 0xCE, 0xFF, 0xFF
+};
+static char disp_on77[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0xCC, 0x0E, 0xFF, 0xFF
+};
+static char disp_on78[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0x00, 0xD0, 0xFF, 0xFF
+};
+static char disp_on79[12] = {
+	0x06, 0x00, 0x29, 0xC0,
+	0xCC, 0x10, 0x0A, 0x0C,
+	0x04, 0x03, 0xFF, 0xFF
+};
+static char disp_on80[8] = {
+	0x02, 0x00, 0x29, 0xC0,
+	0x00, 0x00, 0xFF, 0xFF
+};
+static char disp_on81[8] = {
+	0x04, 0x00, 0x29, 0xC0,
+	0xFF, 0xFF, 0xFF, 0xFF
+};
+static char disp_on82[4] = {
+	0x11, 0x00, 0x05, 0x80
+};
+static char disp_on83[4] = {
+	0x29, 0x00, 0x05, 0x80
+};
+
+static struct mipi_dsi_cmd otm8018b_wvga_panel_video_mode_cmds[] = {
+	{sizeof(disp_on0), (char *)disp_on0},
+	{sizeof(disp_on1), (char *)disp_on1},
+	{sizeof(disp_on2), (char *)disp_on2},
+	{sizeof(disp_on3), (char *)disp_on3},
+	{sizeof(disp_on4), (char *)disp_on4},
+	{sizeof(disp_on5), (char *)disp_on5},
+	{sizeof(disp_on6), (char *)disp_on6},
+	{sizeof(disp_on7), (char *)disp_on7},
+	{sizeof(disp_on8), (char *)disp_on8},
+	{sizeof(disp_on9), (char *)disp_on9},
+	{sizeof(disp_on10), (char *)disp_on10},
+	{sizeof(disp_on11), (char *)disp_on11},
+	{sizeof(disp_on12), (char *)disp_on12},
+	{sizeof(disp_on13), (char *)disp_on13},
+	{sizeof(disp_on14), (char *)disp_on14},
+	{sizeof(disp_on15), (char *)disp_on15},
+	{sizeof(disp_on16), (char *)disp_on16},
+	{sizeof(disp_on17), (char *)disp_on17},
+	{sizeof(disp_on18), (char *)disp_on18},
+	{sizeof(disp_on19), (char *)disp_on19},
+	{sizeof(disp_on20), (char *)disp_on20},
+	{sizeof(disp_on21), (char *)disp_on21},
+	{sizeof(disp_on22), (char *)disp_on22},
+	{sizeof(disp_on23), (char *)disp_on23},
+	{sizeof(disp_on24), (char *)disp_on24},
+	{sizeof(disp_on25), (char *)disp_on25},
+	{sizeof(disp_on26), (char *)disp_on26},
+	{sizeof(disp_on27), (char *)disp_on27},
+	{sizeof(disp_on28), (char *)disp_on28},
+	{sizeof(disp_on29), (char *)disp_on29},
+	{sizeof(disp_on30), (char *)disp_on30},
+	{sizeof(disp_on31), (char *)disp_on31},
+	{sizeof(disp_on32), (char *)disp_on32},
+	{sizeof(disp_on33), (char *)disp_on33},
+	{sizeof(disp_on34), (char *)disp_on34},
+	{sizeof(disp_on35), (char *)disp_on35},
+	{sizeof(disp_on36), (char *)disp_on36},
+	{sizeof(disp_on37), (char *)disp_on37},
+	{sizeof(disp_on38), (char *)disp_on38},
+	{sizeof(disp_on39), (char *)disp_on39},
+	{sizeof(disp_on40), (char *)disp_on40},
+	{sizeof(disp_on41), (char *)disp_on41},
+	{sizeof(disp_on42), (char *)disp_on42},
+	{sizeof(disp_on43), (char *)disp_on43},
+	{sizeof(disp_on44), (char *)disp_on44},
+	{sizeof(disp_on45), (char *)disp_on45},
+	{sizeof(disp_on46), (char *)disp_on46},
+	{sizeof(disp_on47), (char *)disp_on47},
+	{sizeof(disp_on48), (char *)disp_on48},
+	{sizeof(disp_on49), (char *)disp_on49},
+	{sizeof(disp_on50), (char *)disp_on50},
+	{sizeof(disp_on51), (char *)disp_on51},
+	{sizeof(disp_on52), (char *)disp_on52},
+	{sizeof(disp_on53), (char *)disp_on53},
+	{sizeof(disp_on54), (char *)disp_on54},
+	{sizeof(disp_on55), (char *)disp_on55},
+	{sizeof(disp_on56), (char *)disp_on56},
+	{sizeof(disp_on57), (char *)disp_on57},
+	{sizeof(disp_on58), (char *)disp_on58},
+	{sizeof(disp_on59), (char *)disp_on59},
+	{sizeof(disp_on60), (char *)disp_on60},
+	{sizeof(disp_on61), (char *)disp_on61},
+	{sizeof(disp_on62), (char *)disp_on62},
+	{sizeof(disp_on63), (char *)disp_on63},
+	{sizeof(disp_on64), (char *)disp_on64},
+	{sizeof(disp_on65), (char *)disp_on65},
+	{sizeof(disp_on66), (char *)disp_on66},
+	{sizeof(disp_on67), (char *)disp_on67},
+	{sizeof(disp_on68), (char *)disp_on68},
+	{sizeof(disp_on69), (char *)disp_on69},
+	{sizeof(disp_on70), (char *)disp_on70},
+	{sizeof(disp_on71), (char *)disp_on71},
+	{sizeof(disp_on72), (char *)disp_on72},
+	{sizeof(disp_on73), (char *)disp_on73},
+	{sizeof(disp_on74), (char *)disp_on74},
+	{sizeof(disp_on75), (char *)disp_on75},
+	{sizeof(disp_on76), (char *)disp_on76},
+	{sizeof(disp_on77), (char *)disp_on77},
+	{sizeof(disp_on78), (char *)disp_on78},
+	{sizeof(disp_on79), (char *)disp_on79},
+	{sizeof(disp_on80), (char *)disp_on80},
+	{sizeof(disp_on81), (char *)disp_on81},
+	{sizeof(disp_on82), (char *)disp_on82},
+	{sizeof(disp_on83), (char *)disp_on83},
+};
+
+int mipi_otm8018b_video_wvga_config(void *pdata)
+{
+	int ret = NO_ERROR;
+	/* 2 Lanes -- Enables Data Lane0, 1 */
+	unsigned char lane_en = 3;
+	unsigned long low_pwr_stop_mode = 0;
+
+	/* Needed or else will have blank line at top of display */
+	unsigned char eof_bllp_pwr = 0x9;
+
+	unsigned char interleav = 0;
+	struct lcdc_panel_info *lcdc = NULL;
+	struct msm_panel_info *pinfo = (struct msm_panel_info *) pdata;
+
+	if (pinfo == NULL)
+		return ERR_INVALID_ARGS;
+
+	lcdc =  &(pinfo->lcdc);
+	if (lcdc == NULL)
+		return ERR_INVALID_ARGS;
+
+	ret = mdss_dsi_video_mode_config((pinfo->xres),
+			(pinfo->yres),
+			(pinfo->xres),
+			(pinfo->yres),
+			(lcdc->h_front_porch),
+			(lcdc->h_back_porch),
+			(lcdc->v_front_porch),
+			(lcdc->v_back_porch),
+			(lcdc->h_pulse_width),
+			(lcdc->v_pulse_width),
+			pinfo->mipi.dst_format,
+			pinfo->mipi.traffic_mode,
+			lane_en,
+			low_pwr_stop_mode,
+			eof_bllp_pwr,
+			interleav,
+			MIPI_DSI0_BASE);
+	return ret;
+}
+
+int mipi_otm8018b_video_wvga_on()
+{
+	int ret = NO_ERROR;
+	return ret;
+}
+
+int mipi_otm8018b_video_wvga_off()
+{
+	int ret = NO_ERROR;
+	return ret;
+}
+
+static struct mdss_dsi_phy_ctrl dsi_video_mode_phy_db = {
+	{0x02, 0x08, 0x05, 0x00, 0x20, 0x03},
+	{0x8B, 0x1F, 0x05, 0x00, 0x45, 0x4A,
+		0x19, 0x23, 0x23, 0x03, 0x04, 0x00},
+	{0x7f, 0x00, 0x00, 0x00},
+	{0xff, 0x06},
+	{0x03, 0x03, 0x00, 0x00, 0x0f, 0x00},
+	{	0x80, 0x45, 0x00, 0x00, 0x00, 0x01, 0x66, 0x00, 0x00,
+		0x80, 0x45, 0x00, 0x00, 0x00, 0x01, 0x66, 0x00, 0x00,
+		0x80, 0x45, 0x00, 0x00, 0x00, 0x01, 0x66, 0x00, 0x00,
+		0x80, 0x45, 0x00, 0x00, 0x00, 0x01, 0x66, 0x00, 0x00,
+		0x40, 0x67, 0x00, 0x00, 0x00, 0x01, 0x88, 0x00, 0x00},
+};
+
+void mipi_otm8018b_video_wvga_init(struct msm_panel_info *pinfo)
+{
+	if (!pinfo)
+		return;
+
+	pinfo->xres = WVGA_MIPI_FB_WIDTH;
+	pinfo->yres = WVGA_MIPI_FB_HEIGHT;
+	pinfo->lcdc.h_back_porch = MIPI_HSYNC_BACK_PORCH_DCLK;
+	pinfo->lcdc.h_front_porch = MIPI_HSYNC_FRONT_PORCH_DCLK;
+	pinfo->lcdc.h_pulse_width = MIPI_HSYNC_PULSE_WIDTH;
+	pinfo->lcdc.v_back_porch = MIPI_VSYNC_BACK_PORCH_LINES;
+	pinfo->lcdc.v_front_porch = MIPI_VSYNC_FRONT_PORCH_LINES;
+	pinfo->lcdc.v_pulse_width = MIPI_VSYNC_PULSE_WIDTH;
+	pinfo->mipi.num_of_lanes = OTM8018B_PANEL_NUM_OF_LANES;
+	pinfo->mipi.frame_rate = OTM8018B_PANEL_FRAME_RATE;
+
+	pinfo->type = MIPI_VIDEO_PANEL;
+	pinfo->wait_cycle = 0;
+	pinfo->bpp = OTM8018B_PANEL_BPP;
+	pinfo->clk_rate = OTM8018B_PANEL_CLK_RATE;
+
+	pinfo->mipi.mode = DSI_VIDEO_MODE;
+	pinfo->mipi.traffic_mode = 2;
+	pinfo->mipi.dst_format = DSI_VIDEO_DST_FORMAT_RGB888;
+	pinfo->mipi.mdss_dsi_phy_db = &dsi_video_mode_phy_db;
+	pinfo->mipi.tx_eot_append = TRUE;
+
+	pinfo->mipi.lane_swap = OTM8018B_PANEL_LANE_SWAP;
+	pinfo->mipi.t_clk_post = OTM8018B_PANEL_T_CLK_POST;
+	pinfo->mipi.t_clk_pre = OTM8018B_PANEL_T_CLK_PRE;
+	pinfo->mipi.panel_cmds = otm8018b_wvga_panel_video_mode_cmds;
+	pinfo->mipi.num_of_panel_cmds =
+			ARRAY_SIZE(otm8018b_wvga_panel_video_mode_cmds);
+
+	pinfo->on = mipi_otm8018b_video_wvga_on;
+	pinfo->off = mipi_otm8018b_video_wvga_off;
+	pinfo->config = mipi_otm8018b_video_wvga_config;
+
+	return;
+};
diff --git a/dev/panel/msm/rules.mk b/dev/panel/msm/rules.mk
index 56e6815..35c025b 100644
--- a/dev/panel/msm/rules.mk
+++ b/dev/panel/msm/rules.mk
@@ -37,5 +37,7 @@
 ifeq ($(PLATFORM),msm8610)
 OBJS += \
 	$(LOCAL_DIR)/mipi_truly_video_wvga.o \
-	$(LOCAL_DIR)/mipi_truly_cmd_wvga.o
+	$(LOCAL_DIR)/mipi_truly_cmd_wvga.o \
+	$(LOCAL_DIR)/mipi_hx8379a_video_wvga.o \
+	$(LOCAL_DIR)/mipi_otm8018b_video_fwvga.o
 endif
diff --git a/include/arch/ops.h b/include/arch/ops.h
index 26d0642..9f95e2b 100644
--- a/include/arch/ops.h
+++ b/include/arch/ops.h
@@ -53,6 +53,7 @@
 void arch_clean_invalidate_cache_range(addr_t start, size_t len);
 void arch_invalidate_cache_range(addr_t start, size_t len);
 void arch_sync_cache_range(addr_t start, size_t len);
+void cache_clean_invalidate_unaligned_start_addr(addr_t start, size_t size);
 	
 void arch_idle(void);
 
diff --git a/platform/apq8084/acpuclock.c b/platform/apq8084/acpuclock.c
new file mode 100644
index 0000000..93921fb
--- /dev/null
+++ b/platform/apq8084/acpuclock.c
@@ -0,0 +1,88 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of The Linux Foundation nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <stdint.h>
+#include <debug.h>
+#include <reg.h>
+#include <mmc.h>
+#include <clock.h>
+#include <platform/clock.h>
+
+void hsusb_clock_init(void)
+{
+}
+
+void clock_init_mmc(uint32_t interface)
+{
+}
+
+/* Configure MMC clock */
+void clock_config_mmc(uint32_t interface, uint32_t freq)
+{
+	/* Disalbe MCI_CLK before changing the sdcc clock */
+	mmc_boot_mci_clk_disable();
+
+	/* Enable MCI CLK */
+	mmc_boot_mci_clk_enable();
+}
+
+/* Configure UART clock based on the UART block id*/
+void clock_config_uart_dm(uint8_t id)
+{
+}
+
+/* Function to asynchronously reset CE (Crypto Engine).
+ * Function assumes that all the CE clocks are off.
+ */
+static void ce_async_reset(uint8_t instance)
+{
+}
+
+void clock_ce_enable(uint8_t instance)
+{
+}
+
+void clock_ce_disable(uint8_t instance)
+{
+}
+
+void clock_config_ce(uint8_t instance)
+{
+	/* Need to enable the clock before disabling since the clk_disable()
+	 * has a check to default to nop when the clk_enable() is not called
+	 * on that particular clock.
+	 */
+	clock_ce_enable(instance);
+
+	clock_ce_disable(instance);
+
+	ce_async_reset(instance);
+
+	clock_ce_enable(instance);
+
+}
diff --git a/platform/apq8084/apq8084-clock.c b/platform/apq8084/apq8084-clock.c
new file mode 100644
index 0000000..b40ee29
--- /dev/null
+++ b/platform/apq8084/apq8084-clock.c
@@ -0,0 +1,110 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of The Linux Foundation nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <assert.h>
+#include <reg.h>
+#include <err.h>
+#include <clock.h>
+#include <clock_pll.h>
+#include <clock_lib2.h>
+#include <platform/clock.h>
+#include <platform/iomap.h>
+
+
+/* Mux source select values */
+#define cxo_source_val    0
+#define gpll0_source_val  1
+#define cxo_mm_source_val 0
+#define mmpll0_mm_source_val 1
+#define mmpll1_mm_source_val 2
+#define mmpll3_mm_source_val 3
+#define gpll0_mm_source_val 5
+
+struct clk_freq_tbl rcg_dummy_freq = F_END;
+
+
+/* Clock Operations */
+static struct clk_ops clk_ops_branch =
+{
+	.enable     = clock_lib2_branch_clk_enable,
+	.disable    = clock_lib2_branch_clk_disable,
+	.set_rate   = clock_lib2_branch_set_rate,
+};
+
+static struct clk_ops clk_ops_rcg_mnd =
+{
+	.enable     = clock_lib2_rcg_enable,
+	.set_rate   = clock_lib2_rcg_set_rate,
+};
+
+static struct clk_ops clk_ops_rcg =
+{
+	.enable     = clock_lib2_rcg_enable,
+	.set_rate   = clock_lib2_rcg_set_rate,
+};
+
+static struct clk_ops clk_ops_cxo =
+{
+	.enable     = cxo_clk_enable,
+	.disable    = cxo_clk_disable,
+};
+
+static struct clk_ops clk_ops_pll_vote =
+{
+	.enable     = pll_vote_clk_enable,
+	.disable    = pll_vote_clk_disable,
+	.auto_off   = pll_vote_clk_disable,
+	.is_enabled = pll_vote_clk_is_enabled,
+};
+
+static struct clk_ops clk_ops_vote =
+{
+	.enable     = clock_lib2_vote_clk_enable,
+	.disable    = clock_lib2_vote_clk_disable,
+};
+
+/* Clock Sources */
+static struct fixed_clk cxo_clk_src =
+{
+	.c = {
+		.rate     = 19200000,
+		.dbg_name = "cxo_clk_src",
+		.ops      = &clk_ops_cxo,
+	},
+};
+
+/* Clock lookup table */
+static struct clk_lookup msm_clocks_8084[] =
+{
+};
+
+
+void platform_clock_init(void)
+{
+	clk_init(msm_clocks_8084, ARRAY_SIZE(msm_clocks_8084));
+}
diff --git a/platform/apq8084/gpio.c b/platform/apq8084/gpio.c
new file mode 100644
index 0000000..32c55f4
--- /dev/null
+++ b/platform/apq8084/gpio.c
@@ -0,0 +1,61 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *  * Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  * Redistributions in binary form must reproduce the above
+ *    copyright notice, this list of conditions and the following
+ *    disclaimer in the documentation and/or other materials provided
+ *    with the distribution.
+ *  * Neither the name of The Linux Foundation nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <debug.h>
+#include <reg.h>
+#include <platform/iomap.h>
+#include <platform/gpio.h>
+
+/* Remove the file after the gpio patch to move this to msm_shared gets merged. */
+void gpio_tlmm_config(uint32_t gpio, uint8_t func,
+		      uint8_t dir, uint8_t pull,
+		      uint8_t drvstr, uint32_t enable)
+{
+	uint32_t val = 0;
+	val |= pull;
+	val |= func << 2;
+	val |= drvstr << 6;
+	val |= enable << 9;
+	writel(val, (unsigned int *)GPIO_CONFIG_ADDR(gpio));
+	return;
+}
+
+void gpio_set(uint32_t gpio, uint32_t dir)
+{
+	writel(dir, (unsigned int *)GPIO_IN_OUT_ADDR(gpio));
+	return;
+}
+
+/* Configure gpio for blsp uart 2 */
+void gpio_config_uart_dm(uint8_t id)
+{
+}
+
+void gpio_config_blsp_i2c(uint8_t blsp_id, uint8_t qup_id)
+{
+}
diff --git a/platform/apq8084/include/platform/clock.h b/platform/apq8084/include/platform/clock.h
new file mode 100644
index 0000000..bf63755
--- /dev/null
+++ b/platform/apq8084/include/platform/clock.h
@@ -0,0 +1,49 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of The Linux Foundation nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __APQ8084_CLOCK_H
+#define __APQ8084_CLOCK_H
+
+#include <clock.h>
+#include <clock_lib2.h>
+
+#define UART_DM_CLK_RX_TX_BIT_RATE 0xCC
+
+
+void platform_clock_init(void);
+
+void clock_init_mmc(uint32_t interface);
+void clock_config_mmc(uint32_t interface, uint32_t freq);
+void clock_config_uart_dm(uint8_t id);
+void hsusb_clock_init(void);
+void clock_config_ce(uint8_t instance);
+void mdp_clock_init(void);
+void clock_ce_enable(uint8_t instance);
+void clock_ce_disable(uint8_t instance);
+
+#endif
diff --git a/platform/apq8084/include/platform/gpio.h b/platform/apq8084/include/platform/gpio.h
new file mode 100644
index 0000000..fa4bb8e
--- /dev/null
+++ b/platform/apq8084/include/platform/gpio.h
@@ -0,0 +1,60 @@
+/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *  * Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  * Redistributions in binary form must reproduce the above
+ *    copyright notice, this list of conditions and the following
+ *    disclaimer in the documentation and/or other materials provided
+ *    with the distribution.
+ *  * Neither the name of The Linux Foundation, Inc. nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __PLATFORM_APQ8084_GPIO_H
+#define __PLATFORM_APQ8084_GPIO_H
+
+#include <gpio.h>
+
+/* GPIO TLMM: Direction */
+#define GPIO_INPUT      0
+#define GPIO_OUTPUT     1
+
+/* GPIO TLMM: Pullup/Pulldown */
+#define GPIO_NO_PULL    0
+#define GPIO_PULL_DOWN  1
+#define GPIO_KEEPER     2
+#define GPIO_PULL_UP    3
+
+/* GPIO TLMM: Drive Strength */
+#define GPIO_2MA        0
+#define GPIO_4MA        1
+#define GPIO_6MA        2
+#define GPIO_8MA        3
+#define GPIO_10MA       4
+#define GPIO_12MA       5
+#define GPIO_14MA       6
+#define GPIO_16MA       7
+
+/* GPIO TLMM: Status */
+#define GPIO_ENABLE     0
+#define GPIO_DISABLE    1
+
+void gpio_config_uart_dm(uint8_t id);
+void gpio_config_blsp_i2c(uint8_t, uint8_t);
+#endif
diff --git a/platform/apq8084/include/platform/iomap.h b/platform/apq8084/include/platform/iomap.h
new file mode 100644
index 0000000..d7dbb44
--- /dev/null
+++ b/platform/apq8084/include/platform/iomap.h
@@ -0,0 +1,98 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of The Linux Foundation nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _PLATFORM_APQ8084_IOMAP_H_
+#define _PLATFORM_APQ8084_IOMAP_H_
+
+#define MSM_SHARED_BASE             0x0FA00000
+
+#define KPSS_BASE                   0xF9000000
+
+#define MSM_GIC_DIST_BASE           KPSS_BASE
+#define MSM_GIC_CPU_BASE            (KPSS_BASE + 0x2000)
+#define APCS_KPSS_ACS_BASE          (KPSS_BASE + 0x00008000)
+#define APCS_APC_KPSS_PLL_BASE      (KPSS_BASE + 0x0000A000)
+#define APCS_KPSS_CFG_BASE          (KPSS_BASE + 0x00010000)
+#define APCS_KPSS_WDT_BASE          (KPSS_BASE + 0x00017000)
+#define KPSS_APCS_QTMR_AC_BASE      (KPSS_BASE + 0x00020000)
+#define KPSS_APCS_F0_QTMR_V1_BASE   (KPSS_BASE + 0x00021000)
+#define QTMR_BASE                   KPSS_APCS_F0_QTMR_V1_BASE
+
+#define PERIPH_SS_BASE              0xF9800000
+
+#define MSM_SDC1_BASE               (PERIPH_SS_BASE + 0x00024000)
+#define MSM_SDC1_SDHCI_BASE         (PERIPH_SS_BASE + 0x00024900)
+#define MSM_SDC3_BASE               (PERIPH_SS_BASE + 0x00064000)
+#define MSM_SDC3_SDHCI_BASE         (PERIPH_SS_BASE + 0x00064900)
+#define MSM_SDC2_BASE               (PERIPH_SS_BASE + 0x000A4000)
+#define MSM_SDC2_SDHCI_BASE         (PERIPH_SS_BASE + 0x000A4900)
+#define MSM_SDC4_BASE               (PERIPH_SS_BASE + 0x000E4000)
+#define MSM_SDC4_SDHCI_BASE         (PERIPH_SS_BASE + 0x000E4900)
+
+#define BLSP1_UART0_BASE            (PERIPH_SS_BASE + 0x0011D000)
+#define BLSP1_UART1_BASE            (PERIPH_SS_BASE + 0x0011E000)
+#define BLSP1_UART2_BASE            (PERIPH_SS_BASE + 0x0011F000)
+#define BLSP1_UART3_BASE            (PERIPH_SS_BASE + 0x00120000)
+#define BLSP1_UART4_BASE            (PERIPH_SS_BASE + 0x00121000)
+#define BLSP1_UART5_BASE            (PERIPH_SS_BASE + 0x00122000)
+
+/* Addresses below this point needs to be verified.
+ * Included only for compilation purposes.
+ */
+#define MSM_USB_BASE                (PERIPH_SS_BASE + 0x00255000)
+
+#define CLK_CTL_BASE                0xFC400000
+
+#define GCC_WDOG_DEBUG              (CLK_CTL_BASE +  0x00001780)
+
+#define USB_HS_BCR                  (CLK_CTL_BASE + 0x480)
+
+#define SPMI_BASE                   0xFC4C0000
+#define SPMI_GENI_BASE              (SPMI_BASE + 0xA000)
+#define SPMI_PIC_BASE               (SPMI_BASE + 0xB000)
+
+#define MSM_CE2_BAM_BASE            0xFD444000
+#define MSM_CE2_BASE                0xFD45A000
+#define USB2_PHY_SEL                0xFD4AB000
+
+#define TLMM_BASE_ADDR              0xFD510000
+#define GPIO_CONFIG_ADDR(x)         (TLMM_BASE_ADDR + 0x1000 + (x)*0x10)
+#define GPIO_IN_OUT_ADDR(x)         (TLMM_BASE_ADDR + 0x1004 + (x)*0x10)
+
+#define MPM2_MPM_CTRL_BASE                   0xFC4A1000
+#define MPM2_MPM_PS_HOLD                     0xFC4AB000
+#define MPM2_MPM_SLEEP_TIMETICK_COUNT_VAL    0xFC4A3000
+
+/* DRV strength for sdcc */
+#define SDC1_HDRV_PULL_CTL           (TLMM_BASE_ADDR + 0x00002044)
+
+/* SDHCI */
+#define SDCC_MCI_HC_MODE            (PERIPH_SS_BASE + 0x00024078)
+#define SDCC_HC_PWRCTL_MASK_REG     (PERIPH_SS_BASE + 0x000240E0)
+#define SDCC_HC_PWRCTL_CTL_REG      (PERIPH_SS_BASE + 0x000240E8)
+#endif
diff --git a/platform/apq8084/include/platform/irqs.h b/platform/apq8084/include/platform/irqs.h
new file mode 100644
index 0000000..9db58bb
--- /dev/null
+++ b/platform/apq8084/include/platform/irqs.h
@@ -0,0 +1,66 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+ *   * Neither the name of The Linux Foundation, Inc. nor the names of its
+ *     contributors may be used to endorse or promote products derived
+ *     from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+#ifndef __IRQS_APQ8084_H
+#define __IRQS_APQ8084_H
+
+/* MSM ACPU Interrupt Numbers */
+
+/* 0-15:  STI/SGI (software triggered/generated interrupts)
+ * 16-31: PPI (private peripheral interrupts)
+ * 32+:   SPI (shared peripheral interrupts)
+ */
+
+#define GIC_PPI_START                          16
+#define GIC_SPI_START                          32
+
+#define INT_QTMR_NON_SECURE_PHY_TIMER_EXP      (GIC_PPI_START + 3)
+#define INT_QTMR_VIRTUAL_TIMER_EXP             (GIC_PPI_START + 4)
+
+#define INT_QTMR_FRM_0_PHYSICAL_TIMER_EXP      (GIC_SPI_START + 8)
+
+#define USB1_HS_BAM_IRQ                        (GIC_SPI_START + 135)
+#define USB1_HS_IRQ                            (GIC_SPI_START + 134)
+#define USB2_IRQ                               (GIC_SPI_START + 141)
+#define USB1_IRQ                               (GIC_SPI_START + 142)
+
+/* Retrofit universal macro names */
+#define INT_USB_HS                             USB1_HS_IRQ
+
+#define EE0_KRAIT_HLOS_SPMI_PERIPH_IRQ         (GIC_SPI_START + 190)
+
+#define NR_MSM_IRQS                            256
+#define NR_GPIO_IRQS                           173
+#define NR_BOARD_IRQS                          0
+
+#define NR_IRQS                                (NR_MSM_IRQS + NR_GPIO_IRQS + \
+                                               NR_BOARD_IRQS)
+
+#define SDCC_PWRCTRL_IRQ                       (GIC_SPI_START + 138)
+#endif	/* __IRQS_APQ8084_H */
diff --git a/platform/apq8084/platform.c b/platform/apq8084/platform.c
new file mode 100644
index 0000000..d31a519
--- /dev/null
+++ b/platform/apq8084/platform.c
@@ -0,0 +1,61 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of The Linux Foundation nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NON-INFRINGEMENT ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <debug.h>
+#include <reg.h>
+#include <platform/iomap.h>
+#include <qgic.h>
+#include <qtimer.h>
+#include <platform/clock.h>
+#include <mmu.h>
+#include <arch/arm/mmu.h>
+#include <smem.h>
+#include <board.h>
+
+void platform_early_init(void)
+{
+	/* Uncomment board_init when bootchain is available. */
+	/* board_init(); */
+	platform_clock_init();
+	qgic_init();
+	qtimer_init();
+}
+
+void platform_init(void)
+{
+	dprintf(INFO, "platform_init()\n");
+}
+
+void platform_uninit(void)
+{
+#if DISPLAY_SPLASH_SCREEN
+	display_shutdown();
+#endif
+
+	qtimer_uninit();
+}
diff --git a/platform/apq8084/rules.mk b/platform/apq8084/rules.mk
new file mode 100644
index 0000000..4738c69
--- /dev/null
+++ b/platform/apq8084/rules.mk
@@ -0,0 +1,29 @@
+LOCAL_DIR := $(GET_LOCAL_DIR)
+
+ARCH    := arm
+ARM_CPU := cortex-a8
+CPU     := generic
+
+DEFINES += ARM_CPU_CORE_KRAIT
+
+MMC_SLOT         := 1
+
+DEFINES += PERIPH_BLK_BLSP=1
+DEFINES += WITH_CPU_EARLY_INIT=0 WITH_CPU_WARM_BOOT=0 \
+	   MMC_SLOT=$(MMC_SLOT)
+DEFINES += TZ_SAVE_KERNEL_HASH
+
+INCLUDES += -I$(LOCAL_DIR)/include -I$(LK_TOP_DIR)/platform/msm_shared/include
+
+DEVS += fbcon
+MODULES += dev/fbcon
+
+OBJS += \
+	$(LOCAL_DIR)/platform.o \
+	$(LOCAL_DIR)/acpuclock.o \
+	$(LOCAL_DIR)/apq8084-clock.o \
+	$(LOCAL_DIR)/gpio.o
+
+LINKER_SCRIPT += $(BUILDDIR)/system-onesegment.ld
+
+include platform/msm_shared/rules.mk
diff --git a/platform/fsm9900/include/platform/iomap.h b/platform/fsm9900/include/platform/iomap.h
index c8fdcf9..4cc017b 100644
--- a/platform/fsm9900/include/platform/iomap.h
+++ b/platform/fsm9900/include/platform/iomap.h
@@ -85,6 +85,8 @@
 #define BLSP2_UART4_BASE            (PERIPH_SS_BASE + 0x00161000)
 #define BLSP2_UART5_BASE            (PERIPH_SS_BASE + 0x00162000)
 
+#define MSM_USB_BASE                (PERIPH_SS_BASE + 0x00255000)
+
 #define CLK_CTL_BASE                0xFC400000
 
 #define GCC_WDOG_DEBUG              (CLK_CTL_BASE +  0x00001780)
diff --git a/platform/msm8974/include/platform/iomap.h b/platform/msm8974/include/platform/iomap.h
index f8143dd..42a436f 100644
--- a/platform/msm8974/include/platform/iomap.h
+++ b/platform/msm8974/include/platform/iomap.h
@@ -172,6 +172,17 @@
 #define SDCC2_N                     (CLK_CTL_BASE + 0x51C) /* n */
 #define SDCC2_D                     (CLK_CTL_BASE + 0x520) /* d */
 
+/* SDCC3 */
+#define SDCC3_BCR                   (CLK_CTL_BASE + 0x540) /* block reset */
+#define SDCC3_APPS_CBCR             (CLK_CTL_BASE + 0x544) /* branch control */
+#define SDCC3_AHB_CBCR              (CLK_CTL_BASE + 0x548)
+#define SDCC3_INACTIVITY_TIMER_CBCR (CLK_CTL_BASE + 0x54C)
+#define SDCC3_CMD_RCGR              (CLK_CTL_BASE + 0x550) /* cmd */
+#define SDCC3_CFG_RCGR              (CLK_CTL_BASE + 0x554) /* cfg */
+#define SDCC3_M                     (CLK_CTL_BASE + 0x558) /* m */
+#define SDCC3_N                     (CLK_CTL_BASE + 0x55C) /* n */
+#define SDCC3_D                     (CLK_CTL_BASE + 0x560) /* d */
+
 /* UART */
 #define BLSP1_AHB_CBCR              (CLK_CTL_BASE + 0x5C4)
 #define BLSP2_AHB_CBCR              (CLK_CTL_BASE + 0x944)
diff --git a/platform/msm_shared/crypto4_eng.c b/platform/msm_shared/crypto4_eng.c
index 84fbc9f..a19c224 100644
--- a/platform/msm_shared/crypto4_eng.c
+++ b/platform/msm_shared/crypto4_eng.c
@@ -26,6 +26,7 @@
  * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
+#include <arch/defines.h>
 #include <string.h>
 #include <endian.h>
 #include <debug.h>
@@ -37,7 +38,6 @@
 #include <scm.h>
 #include <smem.h>
 
-extern void dsb(void);
 extern void ce_async_reset();
 
 void wr_ce(uint32_t val,uint32_t reg)
diff --git a/platform/msm_shared/dload_util.c b/platform/msm_shared/dload_util.c
index 06140f2..7455a19 100644
--- a/platform/msm_shared/dload_util.c
+++ b/platform/msm_shared/dload_util.c
@@ -37,8 +37,6 @@
 #define EMERGENCY_DLOAD_COOKIE_1    0xC67E4350
 #define EMERGENCY_DLOAD_COOKIE_2    0x77777777
 
-extern void dsb();
-
 void dload_util_write_cookie(uint32_t target_dload_mode_addr,
 		enum dload_mode mode)
 {
diff --git a/platform/msm_shared/include/mipi_dsi.h b/platform/msm_shared/include/mipi_dsi.h
index 4f90f96..2a6d067 100755
--- a/platform/msm_shared/include/mipi_dsi.h
+++ b/platform/msm_shared/include/mipi_dsi.h
@@ -659,6 +659,7 @@
 struct mipi_dsi_cmd {
 	int size;
 	char *payload;
+	int wait;
 };
 
 struct mipi_dsi_panel_config {
diff --git a/platform/msm_shared/include/mmc_sdhci.h b/platform/msm_shared/include/mmc_sdhci.h
index 79d3965..feae9f3 100644
--- a/platform/msm_shared/include/mmc_sdhci.h
+++ b/platform/msm_shared/include/mmc_sdhci.h
@@ -281,7 +281,7 @@
 /* mmc device config data */
 struct mmc_config_data {
 	uint8_t slot;          /* Sdcc slot used */
-	uint8_t pwr_irq;       /* Power Irq from card to host */
+	uint32_t pwr_irq;       /* Power Irq from card to host */
 	uint32_t sdhc_base;    /* Base address for the sdhc */
 	uint32_t pwrctl_base;  /* Base address for power control registers */
 	uint16_t bus_width;    /* Bus width used */
diff --git a/platform/msm_shared/include/sdhci.h b/platform/msm_shared/include/sdhci.h
index ef48d1d..976b5e3 100644
--- a/platform/msm_shared/include/sdhci.h
+++ b/platform/msm_shared/include/sdhci.h
@@ -160,6 +160,7 @@
 #define SDHCI_SOFT_RESET                          BIT(0)
 #define SOFT_RESET_CMD                            BIT(1)
 #define SOFT_RESET_DATA                           BIT(2)
+#define SDHCI_RESET_MAX_TIMEOUT                   0x64
 #define SDHCI_1_8_VOL_SET                         BIT(3)
 
 /*
@@ -281,7 +282,6 @@
 /*
  * Power control relatd macros
  */
-#define SDHCI_SOFT_RESET_MASK                     (BIT(0) | BIT(1) | BIT(2))
 #define SDCC_HC_PWR_CTRL_INT                      0xF
 #define SDCC_HC_BUS_ON                            BIT(0)
 #define SDCC_HC_BUS_OFF                           BIT(1)
diff --git a/platform/msm_shared/lvds.c b/platform/msm_shared/lvds.c
index 85ab7fb..0a16c34 100644
--- a/platform/msm_shared/lvds.c
+++ b/platform/msm_shared/lvds.c
@@ -31,6 +31,7 @@
 #include <reg.h>
 #include <err.h>
 #include <bits.h>
+#include <arch/defines.h>
 #include <platform/iomap.h>
 #include <platform/clock.h>
 #include <dev/fbcon.h>
diff --git a/platform/msm_shared/mipi_dsi.c b/platform/msm_shared/mipi_dsi.c
index 6b6e6c6..92d575e 100644
--- a/platform/msm_shared/mipi_dsi.c
+++ b/platform/msm_shared/mipi_dsi.c
@@ -46,7 +46,6 @@
 			       unsigned short num_of_lanes);
 extern void mdp_shutdown(void);
 extern void mdp_start_dma(void);
-extern void dsb(void);
 
 #if (DISPLAY_TYPE_MDSS == 0)
 #define MIPI_DSI0_BASE MIPI_DSI_BASE
@@ -229,7 +228,11 @@
 		writel(cm->size, DSI_DMA_CMD_LENGTH);	// reg 0x48 for this build
 		dsb();
 		ret += dsi_cmd_dma_trigger_for_panel();
-		udelay(80);
+		dsb();
+		if (cm->wait)
+			mdelay(cm->wait);
+		else
+			udelay(80);
 		cm++;
 	}
 	return ret;
diff --git a/platform/msm_shared/mmc_sdhci.c b/platform/msm_shared/mmc_sdhci.c
index 8dae760..5487d94 100644
--- a/platform/msm_shared/mmc_sdhci.c
+++ b/platform/msm_shared/mmc_sdhci.c
@@ -907,6 +907,11 @@
 	data.pwrctl_base = cfg->pwrctl_base;
 	data.pwr_irq = cfg->pwr_irq;
 
+	/* Initialize any clocks needed for SDC controller */
+	clock_init_mmc(cfg->slot);
+
+	clock_config_mmc(cfg->slot, cfg->max_clk_rate);
+
 	/*
 	 * MSM specific sdhc init
 	 */
@@ -918,12 +923,7 @@
 	 */
 	sdhci_init(host);
 
-	/* Initialize any clocks needed for SDC controller */
-	clock_init_mmc(cfg->slot);
-
 	/* Setup initial freq to 400KHz */
-	clock_config_mmc(cfg->slot, cfg->max_clk_rate);
-
 	mmc_ret = sdhci_clk_supply(host, SDHCI_CLK_400KHZ);
 
 	return mmc_ret;
diff --git a/platform/msm_shared/qpic_nand.c b/platform/msm_shared/qpic_nand.c
index 16a498b..44e3c35 100644
--- a/platform/msm_shared/qpic_nand.c
+++ b/platform/msm_shared/qpic_nand.c
@@ -64,6 +64,7 @@
 	/* Flash ID    ID Mask      Density(MB)    Wid Pgsz    Blksz              oobsz   8-bit ECCf */
 	{0x1590AC2C,   0xFFFFFFFF,  0x20000000,    0,  2048,   0x00020000,        0x40,   0},
 	{0x2690AC2C,   0xFFFFFFFF,  0x20000000,    0,  4096,   0x00040000,        0xE0,   1},
+	{0x1590ACAD,   0xFFFFFFFF,  0x20000000,    0,  2048,   0x00020000,        0x80,   0},
 	/* Note: Width flag is 0 for 8 bit Flash and 1 for 16 bit flash   */
 };
 
diff --git a/platform/msm_shared/qtimer_mmap.c b/platform/msm_shared/qtimer_mmap.c
index ef76075..bcd9a9a 100644
--- a/platform/msm_shared/qtimer_mmap.c
+++ b/platform/msm_shared/qtimer_mmap.c
@@ -30,6 +30,7 @@
 #include <reg.h>
 #include <compiler.h>
 #include <qtimer.h>
+#include <arch/defines.h>
 #include <platform/irqs.h>
 #include <platform/iomap.h>
 #include <platform/interrupts.h>
@@ -42,7 +43,6 @@
 static volatile uint32_t current_time;
 static uint32_t tick_count;
 
-extern void dsb();
 static void qtimer_enable();
 
 static enum handler_return qtimer_irq(void *arg)
diff --git a/platform/msm_shared/rules.mk b/platform/msm_shared/rules.mk
index c6bc02a..9b7ff98 100755
--- a/platform/msm_shared/rules.mk
+++ b/platform/msm_shared/rules.mk
@@ -173,6 +173,23 @@
             $(LOCAL_DIR)/gpio.o
 endif
 
+ifeq ($(PLATFORM),apq8084)
+    OBJS += $(LOCAL_DIR)/qgic.o \
+            $(LOCAL_DIR)/qtimer.o \
+            $(LOCAL_DIR)/qtimer_mmap.o \
+            $(LOCAL_DIR)/interrupts.o \
+            $(LOCAL_DIR)/clock.o \
+            $(LOCAL_DIR)/clock_pll.o \
+            $(LOCAL_DIR)/clock_lib2.o \
+            $(LOCAL_DIR)/uart_dm.o \
+            $(LOCAL_DIR)/board.o \
+            $(LOCAL_DIR)/spmi.o \
+            $(LOCAL_DIR)/bam.o \
+            $(LOCAL_DIR)/qpic_nand.o \
+            $(LOCAL_DIR)/dev_tree.o \
+			$(LOCAL_DIR)/gpio.o
+endif
+
 ifeq ($(PLATFORM),msm7x27a)
 	OBJS += $(LOCAL_DIR)/uart.o \
 			$(LOCAL_DIR)/nand.o \
@@ -237,3 +254,28 @@
 			$(LOCAL_DIR)/clock_pll.o \
 			$(LOCAL_DIR)/clock_lib2.o
 endif
+
+ifeq ($(PLATFORM),fsm9900)
+	OBJS += $(LOCAL_DIR)/qgic.o \
+			$(LOCAL_DIR)/qtimer.o \
+			$(LOCAL_DIR)/qtimer_mmap.o \
+			$(LOCAL_DIR)/interrupts.o \
+			$(LOCAL_DIR)/clock.o \
+			$(LOCAL_DIR)/clock_pll.o \
+			$(LOCAL_DIR)/clock_lib2.o \
+			$(LOCAL_DIR)/uart_dm.o \
+			$(LOCAL_DIR)/board.o \
+			$(LOCAL_DIR)/scm.o \
+			$(LOCAL_DIR)/spmi.o \
+			$(LOCAL_DIR)/bam.o \
+			$(LOCAL_DIR)/qpic_nand.o \
+			$(LOCAL_DIR)/dev_tree.o \
+			$(LOCAL_DIR)/certificate.o \
+			$(LOCAL_DIR)/image_verify.o \
+			$(LOCAL_DIR)/crypto_hash.o \
+			$(LOCAL_DIR)/crypto5_eng.o \
+			$(LOCAL_DIR)/crypto5_wrapper.o \
+			$(LOCAL_DIR)/i2c_qup.o \
+			$(LOCAL_DIR)/gpio.o \
+			$(LOCAL_DIR)/dload_util.o
+endif
diff --git a/platform/msm_shared/sdhci.c b/platform/msm_shared/sdhci.c
index ce54433..03996f9 100644
--- a/platform/msm_shared/sdhci.c
+++ b/platform/msm_shared/sdhci.c
@@ -40,6 +40,38 @@
 
 
 /*
+ * Function: sdhci reset
+ * Arg     : Host structure & mask to write to reset register
+ * Return  : None
+ * Flow:   : Reset the host controller
+ */
+static void sdhci_reset(struct sdhci_host *host, uint8_t mask)
+{
+	uint32_t reg;
+	uint32_t timeout = SDHCI_RESET_MAX_TIMEOUT;
+
+	REG_WRITE8(host, mask, SDHCI_RESET_REG);
+
+	/* Wait for the reset to complete */
+	do {
+		reg = REG_READ8(host, SDHCI_RESET_REG);
+		reg &= mask;
+
+		if (!reg)
+			break;
+		if (!timeout)
+		{
+			dprintf(CRITICAL, "Error: sdhci reset failed for: %x\n", mask);
+			break;
+		}
+
+		timeout--;
+		mdelay(1);
+
+	} while(1);
+}
+
+/*
  * Function: sdhci error status enable
  * Arg     : Host structure
  * Return  : None
@@ -424,14 +456,14 @@
 		if (sdhci_cmd_err_status(host)) {
 			dprintf(CRITICAL, "Error: Command completed with errors\n");
 			/* Reset the command & Data line */
-			REG_WRITE8(host, (SOFT_RESET_CMD | SOFT_RESET_DATA), SDHCI_RESET_REG);
+			sdhci_reset(host, (SOFT_RESET_CMD | SOFT_RESET_DATA));
 			return 1;
 		}
 	}
 
 	/* Reset data & command line */
 	if (cmd->data_present)
-		REG_WRITE8(host, (SOFT_RESET_CMD | SOFT_RESET_DATA), SDHCI_RESET_REG);
+		sdhci_reset(host, (SOFT_RESET_CMD | SOFT_RESET_DATA));
 
 	return 0;
 }
@@ -714,28 +746,6 @@
 }
 
 /*
- * Function: sdhci reset
- * Arg     : Host structure
- * Return  : None
- * Flow:   : Reset the host controller
- */
-static void sdhci_reset(struct sdhci_host *host)
-{
-	uint32_t reg;
-
-	REG_WRITE8(host, SDHCI_SOFT_RESET, SDHCI_RESET_REG);
-
-	/* Wait for the reset to complete */
-	do {
-		reg = REG_READ8(host, SDHCI_RESET_REG);
-		reg &= SDHCI_SOFT_RESET_MASK;
-
-		if (!reg)
-			break;
-	} while(1);
-}
-
-/*
  * Function: sdhci init
  * Arg     : Host structure
  * Return  : None
@@ -754,7 +764,7 @@
 	/*
 	 * Reset the controller
 	 */
-	sdhci_reset(host);
+	sdhci_reset(host, SDHCI_SOFT_RESET);
 
 	/* Read the capabilities register & store the info */
 	caps[0] = REG_READ32(host, SDHCI_CAPS_REG1);
diff --git a/platform/msm_shared/uart_dm.c b/platform/msm_shared/uart_dm.c
index 01bcbb6..f551a7a 100644
--- a/platform/msm_shared/uart_dm.c
+++ b/platform/msm_shared/uart_dm.c
@@ -43,7 +43,6 @@
 #define NULL        0
 #endif
 
-extern void dsb(void);
 
 static int uart_init_flag = 0;
 
diff --git a/project/apq8084.mk b/project/apq8084.mk
new file mode 100644
index 0000000..cbf43c8
--- /dev/null
+++ b/project/apq8084.mk
@@ -0,0 +1,27 @@
+# top level project rules for the apq8084 project
+#
+LOCAL_DIR := $(GET_LOCAL_DIR)
+
+TARGET := apq8084
+
+MODULES += app/aboot
+
+DEBUG := 1
+EMMC_BOOT := 1
+ENABLE_SDHCI_SUPPORT := 0
+
+#DEFINES += WITH_DEBUG_DCC=1
+DEFINES += WITH_DEBUG_UART=1
+#DEFINES += WITH_DEBUG_FBCON=1
+DEFINES += DEVICE_TREE=1
+
+#Disable thumb mode
+ENABLE_THUMB := false
+
+ifeq ($(EMMC_BOOT),1)
+DEFINES += _EMMC_BOOT=1
+endif
+
+ifeq ($(ENABLE_SDHCI_SUPPORT),1)
+DEFINES += MMC_SDHCI_SUPPORT=1
+endif
diff --git a/target/apq8084/init.c b/target/apq8084/init.c
new file mode 100644
index 0000000..da3ca04
--- /dev/null
+++ b/target/apq8084/init.c
@@ -0,0 +1,229 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of The Linux Foundation nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <debug.h>
+#include <platform/iomap.h>
+#include <platform/gpio.h>
+#include <reg.h>
+#include <target.h>
+#include <platform.h>
+#include <dload_util.h>
+#include <uart_dm.h>
+#include <mmc.h>
+#include <spmi.h>
+#include <board.h>
+#include <smem.h>
+#include <baseband.h>
+#include <dev/keys.h>
+#include <pm8x41.h>
+#include <crypto5_wrapper.h>
+#include <hsusb.h>
+#include <clock.h>
+#include <partition_parser.h>
+#include <scm.h>
+#include <platform/clock.h>
+#include <platform/gpio.h>
+#include <stdlib.h>
+
+static uint32_t mmc_sdc_base[] =
+	{ MSM_SDC1_BASE, MSM_SDC2_BASE, MSM_SDC3_BASE, MSM_SDC4_BASE };
+
+void target_early_init(void)
+{
+#if WITH_DEBUG_UART
+	uart_dm_init(1, 0, BLSP1_UART1_BASE);
+#endif
+}
+
+/* Return 1 if vol_up pressed */
+static int target_volume_up()
+{
+	return 0;
+}
+
+/* Return 1 if vol_down pressed */
+uint32_t target_volume_down()
+{
+	return 0;
+}
+
+static void target_keystatus()
+{
+	keys_init();
+
+	if(target_volume_down())
+		keys_post_event(KEY_VOLUMEDOWN, 1);
+
+	if(target_volume_up())
+		keys_post_event(KEY_VOLUMEUP, 1);
+}
+
+static void target_mmc_mci_init()
+{
+	uint32_t base_addr;
+	uint8_t slot;
+
+	slot = MMC_SLOT;
+	base_addr = mmc_sdc_base[slot - 1];
+
+	if (mmc_boot_main(slot, base_addr))
+	{
+		dprintf(CRITICAL, "mmc init failed!");
+		ASSERT(0);
+	}
+}
+
+/*
+ * Function to set the capabilities for the host
+ */
+void target_mmc_caps(struct mmc_host *host)
+{
+	host->caps.bus_width = MMC_BOOT_BUS_WIDTH_8_BIT;
+	host->caps.ddr_mode = 1;
+	host->caps.hs200_mode = 1;
+	host->caps.hs_clk_rate = MMC_CLK_96MHZ;
+}
+
+static void set_sdc_power_ctrl()
+{
+	/* Drive strength configs for sdc pins */
+	struct tlmm_cfgs sdc1_hdrv_cfg[] =
+	{
+		{ SDC1_CLK_HDRV_CTL_OFF,  TLMM_CUR_VAL_16MA, TLMM_HDRV_MASK },
+		{ SDC1_CMD_HDRV_CTL_OFF,  TLMM_CUR_VAL_10MA, TLMM_HDRV_MASK },
+		{ SDC1_DATA_HDRV_CTL_OFF, TLMM_CUR_VAL_10MA, TLMM_HDRV_MASK },
+	};
+
+	/* Pull configs for sdc pins */
+	struct tlmm_cfgs sdc1_pull_cfg[] =
+	{
+		{ SDC1_CLK_PULL_CTL_OFF,  TLMM_NO_PULL, TLMM_PULL_MASK },
+		{ SDC1_CMD_PULL_CTL_OFF,  TLMM_PULL_UP, TLMM_PULL_MASK },
+		{ SDC1_DATA_PULL_CTL_OFF, TLMM_PULL_UP, TLMM_PULL_MASK },
+	};
+
+	/* Set the drive strength & pull control values */
+	tlmm_set_hdrive_ctrl(sdc1_hdrv_cfg, ARRAY_SIZE(sdc1_hdrv_cfg));
+	tlmm_set_pull_ctrl(sdc1_pull_cfg, ARRAY_SIZE(sdc1_pull_cfg));
+}
+
+void target_init(void)
+{
+	dprintf(INFO, "target_init()\n");
+
+	target_keystatus();
+
+	/*
+	 * Set drive strength & pull ctrl for
+	 * emmc
+	 */
+	/*Uncomment during bringup after the pull up values are finalized*/
+	//set_sdc_power_ctrl();
+
+	target_mmc_mci_init();
+
+	/*
+	 * MMC initialization is complete, read the partition table info
+	 */
+	if (partition_read_table())
+	{
+		dprintf(CRITICAL, "Error reading the partition table info\n");
+		ASSERT(0);
+	}
+}
+
+unsigned board_machtype(void)
+{
+	return LINUX_MACHTYPE_UNKNOWN;
+}
+
+void target_fastboot_init(void)
+{
+	/* Set the BOOT_DONE flag in PM8921 */
+}
+
+/* Detect the target type */
+void target_detect(struct board_data *board)
+{
+	board->target = LINUX_MACHTYPE_UNKNOWN;
+}
+
+/* Detect the modem type */
+void target_baseband_detect(struct board_data *board)
+{
+	uint32_t platform;
+	uint32_t platform_subtype;
+
+	platform = board->platform;
+	platform_subtype = board->platform_subtype;
+
+	/*
+	 * Look for platform subtype if present, else
+	 * check for platform type to decide on the
+	 * baseband type
+	 */
+	switch(platform_subtype) {
+	case HW_PLATFORM_SUBTYPE_UNKNOWN:
+		break;
+
+	default:
+		dprintf(CRITICAL, "Platform Subtype : %u is not supported\n",platform_subtype);
+		ASSERT(0);
+	};
+
+	switch(platform) {
+	case APQ8084:
+		board->baseband = BASEBAND_APQ;
+		break;
+	default:
+		dprintf(CRITICAL, "Platform type: %u is not supported\n",platform);
+		ASSERT(0);
+	}
+}
+
+unsigned target_baseband()
+{
+	return board_baseband();
+}
+
+void target_serialno(unsigned char *buf)
+{
+	unsigned int serialno;
+	if (target_is_emmc_boot()) {
+		serialno = mmc_get_psn();
+		snprintf((char *)buf, 13, "%x", serialno);
+	}
+}
+
+unsigned check_reboot_mode(void)
+{
+}
+
+void reboot_device(unsigned reboot_reason)
+{
+}
diff --git a/target/apq8084/meminfo.c b/target/apq8084/meminfo.c
new file mode 100644
index 0000000..745657b
--- /dev/null
+++ b/target/apq8084/meminfo.c
@@ -0,0 +1,87 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of The Linux Foundation nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <reg.h>
+#include <debug.h>
+#include <malloc.h>
+#include <smem.h>
+#include <stdint.h>
+#include <libfdt.h>
+#include <platform/iomap.h>
+#include <dev_tree.h>
+
+/* Funtion to add the ram partition entries into device tree.
+ * The function assumes that all the entire fixed memory regions should
+ * be listed in the first bank of the passed in ddr regions.
+ */
+uint32_t target_dev_tree_mem(void *fdt, uint32_t memory_node_offset)
+{
+	struct smem_ram_ptable ram_ptable;
+	unsigned int i;
+	int ret = 0;
+
+	/* Make sure RAM partition table is initialized */
+	ASSERT(smem_ram_ptable_init(&ram_ptable));
+
+	/* Calculating the size of the mem_info_ptr */
+	for (i = 0 ; i < ram_ptable.len; i++)
+	{
+		if((ram_ptable.parts[i].category == SDRAM) &&
+			(ram_ptable.parts[i].type == SYS_MEMORY))
+		{
+
+			/* Pass along all other usable memory regions to Linux */
+			ret = dev_tree_add_mem_info(fdt,
+							memory_node_offset,
+							ram_ptable.parts[i].start,
+							ram_ptable.parts[i].size);
+
+			if (ret)
+			{
+				dprintf(CRITICAL, "Failed to add secondary banks memory addresses\n"
+);
+				goto target_dev_tree_mem_err;
+			}
+
+		}
+	}
+
+target_dev_tree_mem_err:
+
+	return ret;
+}
+
+void *target_get_scratch_address(void)
+{
+	return ((void *)SCRATCH_ADDR);
+}
+
+unsigned target_get_max_flash_size(void)
+{
+	return (512 * 1024 * 1024);
+}
diff --git a/target/apq8084/rules.mk b/target/apq8084/rules.mk
new file mode 100644
index 0000000..aa2abf1
--- /dev/null
+++ b/target/apq8084/rules.mk
@@ -0,0 +1,36 @@
+LOCAL_DIR := $(GET_LOCAL_DIR)
+
+INCLUDES += -I$(LOCAL_DIR)/include -I$(LK_TOP_DIR)/platform/msm_shared
+
+PLATFORM := apq8084
+
+MEMBASE := 0x0F900000 # SDRAM
+MEMSIZE := 0x00100000 # 1MB
+
+BASE_ADDR    := 0x0000000
+
+SCRATCH_ADDR := 0xFF00000
+
+DEFINES += DISPLAY_SPLASH_SCREEN=0
+DEFINES += DISPLAY_TYPE_MIPI=1
+DEFINES += DISPLAY_TYPE_DSI6G=1
+
+MODULES += \
+	dev/keys \
+	dev/pmic/pm8x41 \
+    lib/ptable \
+    lib/libfdt
+
+DEFINES += \
+	MEMSIZE=$(MEMSIZE) \
+	MEMBASE=$(MEMBASE) \
+	BASE_ADDR=$(BASE_ADDR) \
+	TAGS_ADDR=$(TAGS_ADDR) \
+	KERNEL_ADDR=$(KERNEL_ADDR) \
+	RAMDISK_ADDR=$(RAMDISK_ADDR) \
+	SCRATCH_ADDR=$(SCRATCH_ADDR)
+
+
+OBJS += \
+    $(LOCAL_DIR)/init.o \
+    $(LOCAL_DIR)/meminfo.o \
diff --git a/target/apq8084/tools/makefile b/target/apq8084/tools/makefile
new file mode 100644
index 0000000..2757e07
--- /dev/null
+++ b/target/apq8084/tools/makefile
@@ -0,0 +1,44 @@
+#Makefile to generate appsboot.mbn
+
+ifeq ($(BOOTLOADER_OUT),.)
+APPSBOOTHEADER_DIR  := $(BUILDDIR)
+else
+APPSBOOTHEADER_DIR  := $(BOOTLOADER_OUT)/../..
+endif
+
+SRC_DIR  := target/$(TARGET)/tools
+COMPILER := gcc
+
+ifeq ($(EMMC_BOOT), 1)
+  APPSBOOTHDR_FILES := EMMCBOOT.MBN
+else
+  ifeq ($(BUILD_NANDWRITE), 1)
+    APPSBOOTHDR_FILES :=
+  else
+    APPSBOOTHDR_FILES := appsboot.mbn
+  endif
+endif
+
+APPSBOOTHEADER: $(APPSBOOTHDR_FILES)
+
+
+appsboot.mbn: appsboothd.mbn $(OUTBIN)
+	cp $(OUTBIN) $(APPSBOOTHEADER_DIR)/appsboot.raw
+	cat $(APPSBOOTHEADER_DIR)/appsboothd.mbn $(OUTBIN) > $(APPSBOOTHEADER_DIR)/appsboot.mbn
+	rm -f $(APPSBOOTHEADER_DIR)/appsboothd.mbn
+
+appsboothd.mbn: mkheader $(OUTBIN)
+	$(BUILDDIR)/mkheader $(OUTBIN) $(APPSBOOTHEADER_DIR)/appsboothd.mbn
+
+EMMCBOOT.MBN: emmc_appsboothd.mbn $(OUTBIN)
+	cp $(OUTBIN) $(APPSBOOTHEADER_DIR)/emmc_appsboot.raw
+	cat $(APPSBOOTHEADER_DIR)/emmc_appsboothd.mbn $(OUTBIN) > $(APPSBOOTHEADER_DIR)/EMMCBOOT.MBN
+	cat $(APPSBOOTHEADER_DIR)/emmc_appsboothd.mbn $(OUTBIN) > $(APPSBOOTHEADER_DIR)/emmc_appsboot.mbn
+	rm -f $(APPSBOOTHEADER_DIR)/emmc_appsboothd.mbn
+
+emmc_appsboothd.mbn: mkheader $(OUTBIN)
+	$(BUILDDIR)/mkheader $(OUTBIN) $(APPSBOOTHEADER_DIR)/emmc_appsboothd.mbn
+
+mkheader: $(SRC_DIR)/mkheader.c
+	@mkdir -p $(BUILDDIR)
+	${COMPILER} -DMEMBASE=$(MEMBASE) $(SRC_DIR)/mkheader.c -o $(BUILDDIR)/mkheader
diff --git a/target/apq8084/tools/mkheader.c b/target/apq8084/tools/mkheader.c
new file mode 100644
index 0000000..4a84bd6
--- /dev/null
+++ b/target/apq8084/tools/mkheader.c
@@ -0,0 +1,344 @@
+/*
+ * Copyright (c) 2007, Google Inc.
+ * All rights reserved.
+ *
+ * Copyright (c) 2009-2011, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *  * Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  * Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *  * Neither the name of Google, Inc. nor the names of its contributors
+ *    may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <unistd.h>
+#include <fcntl.h>
+#include <string.h>
+
+#include <sys/stat.h>
+
+int print_usage()
+{
+	fprintf(stderr, "usage: mkheader <bin> <hdr> <none|unified-boot>\n");
+	fprintf(stderr, "       mkheader <bin> <hdr> <unsecure-boot>"
+		" <outbin>\n");
+	fprintf(stderr, "       mkheader <bin> <hdr> <secure-boot> <outbin>"
+		" <maxsize>\n");
+	fprintf(stderr, "       mkheader <bin> <hdr> <secure-boot> <outbin>"
+		" <maxsize> <certchain> <files...>\n\n");
+	fprintf(stderr, "bin:               Input raw appsbl binary\n");
+	fprintf(stderr,
+		"hdr:               Output of appsbl header location\n");
+	fprintf(stderr,
+		"outbin:            Output of the signed or unsigned"
+		" apps boot location\n");
+	fprintf(stderr,
+		"maxsize:           Maximum size for certificate" " chain\n");
+	fprintf(stderr,
+		"certchain:         Output of the certchain location\n");
+	fprintf(stderr,
+		"files:             Input format <bin signature>"
+		" <certifcate file(s) for certificate chain>...\n");
+	fprintf(stderr,
+		"certificate chain: Files will be concatenated in order"
+		" to create the certificate chain\n\n");
+	return -1;
+}
+
+int cat(FILE * in, FILE * out, unsigned size, unsigned buff_size)
+{
+	unsigned bytes_left = size;
+	char buf[buff_size];
+	int ret = 0;
+
+	while (bytes_left) {
+		fread(buf, sizeof(char), buff_size, in);
+		if (!feof(in)) {
+			bytes_left -= fwrite(buf, sizeof(char), buff_size, out);
+		} else
+			bytes_left = 0;
+	}
+	ret = ferror(in) | ferror(out);
+	if (ret)
+		fprintf(stderr, "ERROR: Occured during file concatenation\n");
+	return ret;
+}
+
+int main(int argc, char *argv[])
+{
+	struct stat s;
+	unsigned size, base;
+	int unified_boot = 0;
+	unsigned unified_boot_magic[20];
+	unsigned non_unified_boot_magic[10];
+	unsigned magic_len = 0;
+	unsigned *magic;
+	unsigned cert_chain_size = 0;
+	unsigned signature_size = 0;
+	int secure_boot = 0;
+	int fd;
+
+	if (argc < 3) {
+		return print_usage();
+	}
+
+	if (argc == 4) {
+		if (!strcmp("unified-boot", argv[3])) {
+			unified_boot = 1;
+		} else if (!strcmp("secure-boot", argv[3])) {
+			fprintf(stderr,
+				"ERROR: Missing arguments: [outbin maxsize] |"
+				" [outbin, maxsize, certchain,"
+				" signature + certifcate(s)]\n");
+			return print_usage();
+		} else if (!strcmp("unsecure-boot", argv[3])) {
+			fprintf(stderr, "ERROR: Missing arguments:"
+				" outbin directory\n");
+			return print_usage();
+		}
+	}
+
+	if (argc > 4) {
+		if (!strcmp("secure-boot", argv[3])) {
+			if (argc < 9 && argc != 6) {
+				fprintf(stderr,
+					"ERROR: Missing argument(s):"
+					" [outbin maxsize] | [outbin, maxsize,"
+					" certchain,"
+					" signature + certifcate(s)]\n");
+				return print_usage();
+			}
+			secure_boot = 1;
+			signature_size = 256;	//Support SHA 256
+			cert_chain_size = atoi(argv[5]);
+		}
+	}
+
+	if (stat(argv[1], &s)) {
+		perror("cannot stat binary");
+		return -1;
+	}
+
+	if (unified_boot) {
+		magic = unified_boot_magic;
+		magic_len = sizeof(unified_boot_magic);
+	} else {
+		magic = non_unified_boot_magic;
+		magic_len = sizeof(non_unified_boot_magic);
+	}
+
+	size = s.st_size;
+#if MEMBASE
+	base = MEMBASE;
+#else
+	base = 0;
+#endif
+
+	printf("Image Destination Pointer: 0x%x\n", base);
+
+	magic[0] = 0x00000005;	/* appsbl */
+	magic[1] = 0x00000003;	//Flash_partition_version /* nand */
+	magic[2] = 0x00000000;	//image source pointer
+	magic[3] = base;	//image destination pointer
+	magic[4] = size + cert_chain_size + signature_size;	//image size
+	magic[5] = size;	//code size
+	magic[6] = base + size;
+	magic[7] = signature_size;
+	magic[8] = size + base + signature_size;
+	magic[9] = cert_chain_size;
+
+	if (unified_boot == 1) {
+		magic[10] = 0x33836685;	/* cookie magic number */
+		magic[11] = 0x00000001;	/* cookie version */
+		magic[12] = 0x00000002;	/* file formats */
+		magic[13] = 0x00000000;
+		magic[14] = 0x00000000;	/* not setting size for boot.img */
+		magic[15] = 0x00000000;
+		magic[16] = 0x00000000;
+		magic[17] = 0x00000000;
+		magic[18] = 0x00000000;
+		magic[19] = 0x00000000;
+	}
+
+	fd = open(argv[2], O_WRONLY | O_CREAT | O_TRUNC, 0644);
+	if (fd < 0) {
+		perror("cannot open header for writing");
+		return -1;
+	}
+	if (write(fd, magic, magic_len) != magic_len) {
+		perror("cannot write header");
+		close(fd);
+		unlink(argv[2]);
+		return -1;
+	}
+	close(fd);
+
+	if (secure_boot && argc > 6) {
+		FILE *input_file;
+		FILE *output_file;
+		unsigned buff_size = 1;
+		char buf[buff_size];
+		unsigned bytes_left;
+		unsigned current_cert_chain_size = 0;
+		int padding_size = 0;
+		int i;
+
+		if ((output_file = fopen(argv[6], "wb")) == NULL) {
+			perror("ERROR: Occured during fopen");
+			return -1;
+		}
+		printf("Certificate Chain Output File: %s\n", argv[6]);
+
+		for (i = 8; i < argc; i++) {
+			if ((input_file = fopen(argv[i], "rb")) == NULL) {
+				perror("ERROR: Occured during fopen");
+				return -1;
+			}
+			stat(argv[i], &s);
+			bytes_left = s.st_size;
+			current_cert_chain_size += bytes_left;
+			if (cat(input_file, output_file, bytes_left, buff_size))
+				return -1;
+			fclose(input_file);
+		}
+
+		//Pad certifcate chain to the max expected size from input
+		memset(buf, 0xFF, sizeof(buf));
+		padding_size = cert_chain_size - current_cert_chain_size;
+
+		if (padding_size < 0) {
+			fprintf(stderr, "ERROR: Input certificate chain"
+				" (Size=%d) is larger than the maximum"
+				" specified (Size=%d)\n",
+				current_cert_chain_size, cert_chain_size);
+			return -1;
+		}
+
+		bytes_left = (padding_size > 0) ? padding_size : 0;
+		while (bytes_left) {
+			if (!ferror(output_file))
+				bytes_left -= fwrite(buf,
+						     sizeof(buf),
+						     buff_size, output_file);
+			else {
+				fprintf(stderr, "ERROR: Occured during"
+					" certifcate chain padding\n");
+				return -1;
+			}
+		}
+		fclose(output_file);
+
+		/* Concat and combine to signed image.
+		 * Format [HDR][RAW APPSBOOT][PADDED CERT CHAIN]
+		 */
+		if ((output_file = fopen(argv[4], "wb")) == NULL) {
+			perror("ERROR: Occured during fopen");
+			return -1;
+		}
+		printf("Image Output File: %s\n", argv[4]);
+
+		//Header
+		if ((input_file = fopen(argv[2], "rb")) == NULL) {
+			perror("ERROR: Occured during fopen");
+			return -1;
+		}
+		stat(argv[2], &s);
+		if (cat(input_file, output_file, s.st_size, buff_size))
+			return -1;
+		fclose(input_file);
+
+		//Raw Appsbl
+		if ((input_file = fopen(argv[1], "rb")) == NULL) {
+			perror("ERROR: Occured during fopen");
+			return -1;
+		}
+		stat(argv[1], &s);
+		if (cat(input_file, output_file, s.st_size, buff_size))
+			return -1;
+		fclose(input_file);
+
+		//Signature
+		if ((input_file = fopen(argv[7], "rb")) == NULL) {
+			perror("ERROR: Occured during fopen");
+			return -1;
+		}
+		stat(argv[7], &s);
+		if (cat(input_file, output_file, s.st_size, buff_size))
+			return -1;
+		fclose(input_file);
+
+		//Certifcate Chain
+		if ((input_file = fopen(argv[6], "rb")) == NULL) {
+			perror("ERROR: Occured during fopen");
+			return -1;
+		}
+		if (cat(input_file, output_file,
+			(current_cert_chain_size + padding_size), buff_size))
+			return -1;
+		fclose(input_file);
+
+		fclose(output_file);
+
+	} else if (argc == 5 || argc == 6) {
+		FILE *input_file;
+		FILE *output_file;
+		unsigned buff_size = 1;
+		char buf[buff_size];
+
+		/* Concat and combine to unsigned image.
+		 * Format [HDR][RAW APPSBOOT]
+		 */
+		if ((output_file = fopen(argv[4], "wb")) == NULL) {
+			perror("ERROR: Occured during fopen");
+			return -1;
+		}
+		printf("Image Output File: %s\n", argv[4]);
+
+		//Header
+		if ((input_file = fopen(argv[2], "rb")) == NULL) {
+			perror("ERROR: Occured during fopen");
+			return -1;
+		}
+		stat(argv[2], &s);
+		if (cat(input_file, output_file, s.st_size, buff_size))
+			return -1;
+		fclose(input_file);
+
+		//Raw Appsbl
+		if ((input_file = fopen(argv[1], "rb")) == NULL) {
+			perror("ERROR: Occured during fopen");
+			return -1;
+		}
+		stat(argv[1], &s);
+		if (cat(input_file, output_file, s.st_size, buff_size))
+			return -1;
+		fclose(input_file);
+		fclose(output_file);
+	}
+
+	printf("Done execution\n");
+
+	return 0;
+}
diff --git a/target/msm8226/init.c b/target/msm8226/init.c
index 0b6e75b..7b31f43 100644
--- a/target/msm8226/init.c
+++ b/target/msm8226/init.c
@@ -72,6 +72,7 @@
 	HW_PLATFORM_SUBTYPE_SKUAA = 1,
 	HW_PLATFORM_SUBTYPE_SKUF = 2,
 	HW_PLATFORM_SUBTYPE_SKUAB = 3,
+	HW_PLATFORM_SUBTYPE_SKUG = 5,
 };
 
 static uint32_t mmc_pwrctl_base[] =
@@ -301,6 +302,8 @@
 		break;
 	case HW_PLATFORM_SUBTYPE_SKUAB:
 		break;
+	case HW_PLATFORM_SUBTYPE_SKUG:
+		break;
 	default:
 		dprintf(CRITICAL, "Platform Subtype : %u is not supported\n", platform_subtype);
 		ASSERT(0);
@@ -420,7 +423,6 @@
 
 unsigned target_pause_for_battery_charge(void)
 {
-#if 0
 	uint8_t pon_reason = pm8x41_get_pon_reason();
 	uint8_t is_cold_boot = pm8x41_get_is_cold_boot();
 	dprintf(INFO, "%s : pon_reason is %d cold_boot:%d\n", __func__,
@@ -436,7 +438,6 @@
 			((pon_reason & USB_CHG) || (pon_reason & DC_CHG)))
 		return 1;
 	else
-#endif
 		return 0;
 }
 
diff --git a/target/msm8226/target_display.c b/target/msm8226/target_display.c
index a30b568..5b719cc 100755
--- a/target/msm8226/target_display.c
+++ b/target/msm8226/target_display.c
@@ -42,6 +42,8 @@
 
 #include "include/display_resource.h"
 
+#define HFPLL_LDO_ID 8
+
 static struct pm8x41_wled_data wled_ctrl = {
 	.mod_scheme      = 0x00,
 	.led1_brightness = (0x0F << 8) | 0xEF,
@@ -129,11 +131,16 @@
 				ldo_entry_array[ldocounter].ldo_id);
 
 		/* Set voltage during power on */
-		if (enable == 1) {
+		if (enable) {
 			pm8x41_ldo_set_voltage(&ldo_entry,
 					ldo_entry_array[ldocounter].ldo_voltage);
+
+			pm8x41_ldo_control(&ldo_entry, enable);
+
+		} else if(!target_cont_splash_screen() &&
+				ldo_entry_array[ldocounter].ldo_id != HFPLL_LDO_ID) {
+			pm8x41_ldo_control(&ldo_entry, enable);
 		}
-		pm8x41_ldo_control(&ldo_entry, enable);
 		ldocounter++;
 	}
 
diff --git a/target/msm8610/init.c b/target/msm8610/init.c
index 3ad6a30..b662767 100644
--- a/target/msm8610/init.c
+++ b/target/msm8610/init.c
@@ -274,13 +274,15 @@
 int target_cont_splash_screen()
 {
 	int ret = 0;
+
 	switch(board_hardware_id())
 	{
-		case HW_PLATFORM_MTP:
 		case HW_PLATFORM_QRD:
+		case HW_PLATFORM_MTP:
 		case HW_PLATFORM_SURF:
-			dprintf(SPEW, "Target_cont_splash=0\n");
-			ret = 0;
+			dprintf(SPEW, "Target_cont_splash=1\n");
+			ret = 1;
+			break;
 		default:
 			dprintf(SPEW, "Target_cont_splash=0\n");
 			ret = 0;
@@ -291,16 +293,21 @@
 unsigned target_pause_for_battery_charge(void)
 {
 	uint8_t pon_reason = pm8x41_get_pon_reason();
-
-	/* This function will always return 0 to facilitate
-	 * automated testing/reboot with usb connected.
-	 * uncomment if this feature is needed.
+	uint8_t is_cold_boot = pm8x41_get_is_cold_boot();
+	dprintf(INFO, "%s : pon_reason is %d cold_boot:%d\n", __func__,
+					pon_reason, is_cold_boot);
+	/*In case of fastboot reboot, adb reboot or if we see the power key
+	 * pressed we do not want go into charger mode.
+	 * fastboot reboot is warm boot with PON hard reset bit not set
+	 * adb reboot is a cold boot with PON hard reset bit set
 	 */
-	/* if ((pon_reason == USB_CHG) || (pon_reason == DC_CHG))
-	 *	return 1;
-	 */
-
-	return 0;
+	if (is_cold_boot &&
+					(!(pon_reason & HARD_RST)) &&
+					(!(pon_reason & KPDPWR_N)) &&
+					((pon_reason & USB_CHG) || (pon_reason & DC_CHG)))
+			return 1;
+	else
+			return 0;
 }
 
 void target_usb_stop(void)
diff --git a/target/msm8610/target_display.c b/target/msm8610/target_display.c
index 6316fa8..80d8316 100644
--- a/target/msm8610/target_display.c
+++ b/target/msm8610/target_display.c
@@ -166,11 +166,29 @@
 void display_init(void)
 {
 	uint32_t hw_id = board_hardware_id();
+	uint32_t platform_subtype = board_hardware_subtype();
 
 	dprintf(SPEW, "display_init(),target_id=%d.\n", hw_id);
+	dprintf(SPEW, "display_init(),platform_subtype=%d.\n",
+		platform_subtype);
 
 	switch (hw_id) {
 	case HW_PLATFORM_QRD:
+		if ((0 == platform_subtype) || (1 == platform_subtype))
+			mipi_hx8379a_video_wvga_init(&(panel.panel_info));
+		else if (3 == platform_subtype)
+			mipi_otm8018b_video_wvga_init(&(panel.panel_info));
+
+		panel.clk_func = msm8610_mdss_dsi_panel_clock;
+		panel.power_func = msm8610_mipi_panel_power;
+		panel.fb.base = MIPI_FB_ADDR;
+		panel.fb.width =  panel.panel_info.xres;
+		panel.fb.height =  panel.panel_info.yres;
+		panel.fb.stride =  panel.panel_info.xres;
+		panel.fb.bpp =  panel.panel_info.bpp;
+		panel.fb.format = FB_FORMAT_RGB888;
+		panel.mdp_rev = MDP_REV_304;
+		break;
 	case HW_PLATFORM_MTP:
 	case HW_PLATFORM_SURF:
 		mipi_truly_video_wvga_init(&(panel.panel_info));
diff --git a/target/msm8974/init.c b/target/msm8974/init.c
index b5fbf82..a9382b7 100644
--- a/target/msm8974/init.c
+++ b/target/msm8974/init.c
@@ -144,6 +144,9 @@
 
 	pm8x41_gpio_config(5, &gpio);
 
+	/* Wait for the pmic gpio config to take effect */
+	thread_sleep(1);
+
 	/* Get status of P_GPIO_5 */
 	pm8x41_gpio_get(5, &status);
 
diff --git a/target/msm8974/target_display.c b/target/msm8974/target_display.c
index c780788..fcefcfe 100644
--- a/target/msm8974/target_display.c
+++ b/target/msm8974/target_display.c
@@ -277,8 +277,9 @@
 		break;
 	case HW_PLATFORM_DRAGON:
 		mipi_sharp_video_qhd_init(&(panel.panel_info));
-		wled_ctrl.ovp = 0x1; /* 32V */
+		wled_ctrl.ovp = 0x0; /* 35V */
 		wled_ctrl.full_current_scale = 0x14; /* 20mA */
+		wled_ctrl.max_duty_cycle = 0; /* 26ns */
 		panel.clk_func = msm8974_mdss_sharp_dsi_panel_clock;
 		panel.power_func = msm8974_mipi_panel_power;
 		panel.fb.base = MIPI_FB_ADDR;