Merge "platform: mdmfermium: Add uart and usb clock code"
diff --git a/include/platform.h b/include/platform.h
index 9c8e698..62b64c3 100644
--- a/include/platform.h
+++ b/include/platform.h
@@ -66,10 +66,10 @@
int platform_is_msm8909();
int platform_is_msm8992();
int platform_is_msm8956();
+uint32_t platform_is_msm8976_v_1_1();
int boot_device_mask(int);
uint32_t platform_detect_panel();
uint32_t platform_get_max_periph();
int platform_is_msm8996();
-uint64_t platform_get_ddr_start();
bool platform_use_qmp_misc_settings();
#endif
diff --git a/platform/msm8952/acpuclock.c b/platform/msm8952/acpuclock.c
index e3aaec3..4cf5813 100644
--- a/platform/msm8952/acpuclock.c
+++ b/platform/msm8952/acpuclock.c
@@ -132,7 +132,12 @@
}
else if(freq == MMC_CLK_192MHZ)
{
- ret = clk_get_set_enable(clk_name, 192000000, 1);
+ if (platform_is_msm8956() && platform_is_msm8976_v_1_1())
+
+ ret = clk_get_set_enable(clk_name, 186400000, 1);
+ else
+
+ ret = clk_get_set_enable(clk_name, 192000000, 1);
}
else if(freq == MMC_CLK_200MHZ)
{
@@ -140,7 +145,12 @@
}
else if(freq == MMC_CLK_400MHZ)
{
- ret = clk_get_set_enable(clk_name, 384000000, 1);
+ if (platform_is_msm8956() && platform_is_msm8976_v_1_1())
+
+ ret = clk_get_set_enable(clk_name, 372800000, 1);
+ else
+
+ ret = clk_get_set_enable(clk_name, 384000000, 1);
}
else
{
diff --git a/platform/msm8952/include/platform/iomap.h b/platform/msm8952/include/platform/iomap.h
index 6a568db..2bf5d7e 100644
--- a/platform/msm8952/include/platform/iomap.h
+++ b/platform/msm8952/include/platform/iomap.h
@@ -98,6 +98,7 @@
/* GPLL */
#define GPLL0_STATUS (CLK_CTL_BASE + 0x2101C)
+#define GPLL2_STATUS (CLK_CTL_BASE + 0x4A01C)
#define APCS_GPLL_ENA_VOTE (CLK_CTL_BASE + 0x45000)
#define APCS_CLOCK_BRANCH_ENA_VOTE (CLK_CTL_BASE + 0x45004)
#define GPLL4_MODE (CLK_CTL_BASE + 0x24000)
diff --git a/platform/msm8952/msm8952-clock.c b/platform/msm8952/msm8952-clock.c
index b87406d..3214895 100644
--- a/platform/msm8952/msm8952-clock.c
+++ b/platform/msm8952/msm8952-clock.c
@@ -39,6 +39,7 @@
/* Mux source select values */
#define cxo_source_val 0
#define gpll0_source_val 1
+#define gpll2_source_val 4
#define gpll4_source_val 2
#define cxo_mm_source_val 0
#define gpll0_mm_source_val 6
@@ -112,6 +113,21 @@
},
};
+static struct pll_vote_clk gpll2_clk_src =
+{
+ .en_reg = (void *) APCS_GPLL_ENA_VOTE,
+ .en_mask = BIT(2),
+ .status_reg = (void *) GPLL2_STATUS,
+ .status_mask = BIT(17),
+ .parent = &cxo_clk_src.c,
+
+ .c = {
+ .rate = 932000000,
+ .dbg_name = "gpll2_clk_src",
+ .ops = &clk_ops_pll_vote,
+ },
+};
+
static struct pll_vote_clk gpll4_clk_src =
{
.en_reg = (void *) APCS_GPLL_ENA_VOTE,
@@ -157,6 +173,21 @@
F_END
};
+/* SDCC Clocks for version 8976 v 1.1*/
+static struct clk_freq_tbl ftbl_gcc_sdcc1_apps_clk_8976_v_1_1[] =
+{
+ F( 144000, cxo, 16, 3, 25),
+ F( 400000, cxo, 12, 1, 4),
+ F( 20000000, gpll0, 10, 1, 4),
+ F( 25000000, gpll0, 16, 1, 2),
+ F( 50000000, gpll0, 16, 0, 0),
+ F(100000000, gpll0, 8, 0, 0),
+ F(177770000, gpll0, 4.5, 0, 0),
+ F(186400000, gpll2, 5, 0, 0),
+ F(372800000, gpll2, 2.5, 0, 0),
+ F_END
+};
+
static struct rcg_clk sdcc1_apps_clk_src =
{
.cmd_reg = (uint32_t *) SDCC1_CMD_RCGR,
@@ -594,9 +625,18 @@
mdss_mdp_clk_src.freq_tbl = ftbl_mdp_clk_8956;
}
+void msm8976_v_1_1_sdcc_clock_modify()
+{
+ sdcc1_apps_clk_src.freq_tbl = ftbl_gcc_sdcc1_apps_clk_8976_v_1_1;
+}
+
void platform_clock_init(void)
{
- if (platform_is_msm8956())
+ if (platform_is_msm8956()) {
msm8956_clock_override();
+ if (platform_is_msm8976_v_1_1())
+ /*freq and GPLL change for 8976 v1.1 */
+ msm8976_v_1_1_sdcc_clock_modify();
+ }
clk_init(msm_clocks_8952, ARRAY_SIZE(msm_clocks_8952));
}
diff --git a/platform/msm8952/platform.c b/platform/msm8952/platform.c
index ec5a1d8..8adaf4c 100644
--- a/platform/msm8952/platform.c
+++ b/platform/msm8952/platform.c
@@ -41,6 +41,7 @@
#include <platform.h>
#include <target/display.h>
+#define MSM8976_SOC_V11 0x10001
#define MSM_IOMAP_SIZE ((MSM_IOMAP_END - MSM_IOMAP_BASE)/MB)
#define APPS_SS_SIZE ((APPS_SS_END - APPS_SS_BASE)/MB)
@@ -194,3 +195,14 @@
return ret;
}
+
+uint32_t platform_is_msm8976_v_1_1()
+{
+ uint32_t soc_ver = board_soc_version();
+ uint32_t ret = 0;
+
+ if(soc_ver == MSM8976_SOC_V11)
+ ret = 1;
+
+ return ret;
+}
diff --git a/platform/msm8996/include/platform/iomap.h b/platform/msm8996/include/platform/iomap.h
index b1d223f..de4616b 100644
--- a/platform/msm8996/include/platform/iomap.h
+++ b/platform/msm8996/include/platform/iomap.h
@@ -544,9 +544,4 @@
#define APPS_WDOG_RESET_REG (APSS_WDOG_BASE + 0x04)
#define APPS_WDOG_CTL_REG (APSS_WDOG_BASE + 0x08)
-#define DDR_START platform_get_ddr_start()
-#define ABOOT_FORCE_KERNEL_ADDR DDR_START + 0x8000
-#define ABOOT_FORCE_RAMDISK_ADDR DDR_START + 0x2200000
-#define ABOOT_FORCE_TAGS_ADDR DDR_START + 0x2000000
-#define ABOOT_FORCE_KERNEL64_ADDR DDR_START + 0x80000
#endif
diff --git a/platform/msm8996/platform.c b/platform/msm8996/platform.c
index 6bad8f6..79bf7c9 100644
--- a/platform/msm8996/platform.c
+++ b/platform/msm8996/platform.c
@@ -68,19 +68,12 @@
/* Physical addr, Virtual addr, Mapping type , Size (in MB), Flags */
{ 0x00000000, 0x00000000, MMU_L2_NS_SECTION_MAPPING, 512, IOMAP_MEMORY},
{ MEMBASE, MEMBASE, MMU_L2_NS_SECTION_MAPPING, (MEMSIZE / MB), LK_MEMORY},
+ { KERNEL_ADDR, KERNEL_ADDR, MMU_L2_NS_SECTION_MAPPING, KERNEL_SIZE, SCRATCH_MEMORY},
{ SCRATCH_ADDR, SCRATCH_ADDR, MMU_L2_NS_SECTION_MAPPING, SCRATCH_SIZE, SCRATCH_MEMORY},
{ MSM_SHARED_BASE, MSM_SHARED_BASE, MMU_L2_NS_SECTION_MAPPING, MSM_SHARED_SIZE, COMMON_MEMORY},
{ RPMB_SND_RCV_BUF, RPMB_SND_RCV_BUF, MMU_L2_NS_SECTION_MAPPING, RPMB_SND_RCV_BUF_SZ, IOMAP_MEMORY},
};
-static mmu_section_t default_mmu_section_table_3gb[] =
-{
-/* Physical addr, Virtual addr, Mapping type , Size (in MB), Flags */
- { 0x40000000, 0x40000000, MMU_L1_NS_SECTION_MAPPING, 1024 , COMMON_MEMORY},
- { 0x80000000, 0x80000000, MMU_L2_NS_SECTION_MAPPING, 88 , COMMON_MEMORY},
-};
-
-
/* Map the ddr for download mode, this region belongs to non-hlos images and pil */
static mmu_section_t dload_mmu_section_table[] =
{
@@ -122,52 +115,11 @@
{
int i;
int table_sz = ARRAY_SIZE(default_mmu_section_table);
- mmu_section_t kernel_mmu_section_table;
- uint64_t ddr_size = smem_get_ddr_size();
- uint32_t kernel_size = 0;
-
- if (ddr_size == MEM_4GB)
- {
- ddr_start = 0x80000000;
- /* As per the memory map when DDR is 4GB first 88 MB is hlos memory
- * use this for loading the kernel
- */
- kernel_size = 88;
- }
- else if (ddr_size == MEM_3GB)
- {
- ddr_start = 0x20000000;
- /* As per memory map wheh DDR is 3GB the first 512 MB is assigned to hlos
- * use this region for loading kernel
- */
- kernel_size = 512;
- }
- else
- {
- dprintf(CRITICAL, "Unsupported memory map\n");
- ASSERT(0);
- }
-
- kernel_mmu_section_table.paddress = ddr_start;
- kernel_mmu_section_table.vaddress = ddr_start;
- kernel_mmu_section_table.type = MMU_L2_NS_SECTION_MAPPING;
- kernel_mmu_section_table.size = kernel_size;
- kernel_mmu_section_table.flags = SCRATCH_MEMORY;
-
- /* Map kernel entry */
- arm_mmu_map_entry(&kernel_mmu_section_table);
/* Map default memory needed for lk , scratch, rpmb & iomap */
for (i = 0 ; i < table_sz; i++)
arm_mmu_map_entry(&default_mmu_section_table[i]);
- /* Map the rest of the DDR for 3GB needed for ramdump */
- if (ddr_size == MEM_3GB)
- {
- for (i = 0 ; i < (int)ARRAY_SIZE(default_mmu_section_table_3gb); i++)
- arm_mmu_map_entry(&default_mmu_section_table_3gb[i]);
- }
-
if (scm_device_enter_dload())
{
/* TZ & Hyp memory can be mapped only while entering the download mode */
diff --git a/platform/msm_shared/include/qusb2_phy.h b/platform/msm_shared/include/qusb2_phy.h
index fc971c8..d3ed338 100644
--- a/platform/msm_shared/include/qusb2_phy.h
+++ b/platform/msm_shared/include/qusb2_phy.h
@@ -32,6 +32,8 @@
void qusb2_phy_reset(void);
+#define QUSB2PHY_PLL_LOCK 0x20
+
#define QUSB2PHY_PORT_POWERDOWN (QUSB2_PHY_BASE + 0x000000B4)
#define QUSB2PHY_PORT_UTMI_CTRL2 (QUSB2_PHY_BASE + 0x000000C4)
#define QUSB2PHY_PLL_TEST (QUSB2_PHY_BASE + 0x00000004)
@@ -45,6 +47,7 @@
#define QUSB2PHY_PORT_TEST2 (QUSB2_PHY_BASE + 0x0000009C)
#define QUSB2PHY_PLL_PWR_CTL (QUSB2_PHY_BASE + 0x00000018)
#define QUSB2PHY_PLL_AUTOPGM_CTL1 (QUSB2_PHY_BASE + 0x0000001C)
+#define QUSB2PHY_PLL_STATUS (QUSB2_PHY_BASE + 0x00000038)
#endif
diff --git a/platform/msm_shared/mipi_dsi.c b/platform/msm_shared/mipi_dsi.c
index 0474f37..d336f8b 100644
--- a/platform/msm_shared/mipi_dsi.c
+++ b/platform/msm_shared/mipi_dsi.c
@@ -837,7 +837,7 @@
}
writel(0x1115501, pinfo->mipi.ctl_base + INT_CTRL);
- if (pinfo->mipi.broadcast)
+ if (pinfo->mipi.dual_dsi)
writel(0x1115501, pinfo->mipi.sctl_base + INT_CTRL);
return NO_ERROR;
diff --git a/platform/msm_shared/qseecom_lk.c b/platform/msm_shared/qseecom_lk.c
index 0c9077b..8543e97 100644
--- a/platform/msm_shared/qseecom_lk.c
+++ b/platform/msm_shared/qseecom_lk.c
@@ -850,6 +850,7 @@
struct qseecom_client_send_data_ireq send_data_req;
struct qseecom_command_scm_resp resp;
void *buf = NULL;
+ void *rsp_buf_temp = NULL;
uint32_t size = 0;
if (req->cmd_req_buf == NULL || req->resp_buf == NULL) {
@@ -859,10 +860,19 @@
}
dprintf(SPEW, "%s called\n", __func__);
- /* Allocate for req or rsp len whichever is higher, both req and rsp point
- * to the same buffer
- */
- size = (req->cmd_req_len > req->resp_len) ? req->cmd_req_len : req->resp_len;
+ if (req->cmd_req_len > (UINT_MAX - req->resp_len)) {
+ dprintf(CRITICAL, "%s:Integer overflow\n", __func__);
+ dprintf(CRITICAL, "req->cmd_req_len: %u\n", req->cmd_req_len);
+ dprintf(CRITICAL, "req->resp_len: %u\n", req->resp_len);
+ return GENERIC_ERROR;
+ }
+
+ if ((req->cmd_req_len + req->resp_len) > (RPMB_SND_RCV_BUF_SZ * 1024 * 1024)) {
+ dprintf(CRITICAL, "%s:Cmd + Rsp len greater than TA buf\n", __func__);
+ dprintf(CRITICAL, "req->cmd_req_len: %u\n", req->cmd_req_len);
+ dprintf(CRITICAL, "req->resp_len: %u\n", req->resp_len);
+ return GENERIC_ERROR;
+ }
/* The req rsp buffer will be xPU protected by TZ during a TZ APP call
* This will still be protected during a listener call and there is a
@@ -878,8 +888,6 @@
return GENERIC_ERROR;
}
- memscpy(buf, ROUNDUP(size, PAGE_SIZE), req->cmd_req_buf, req->cmd_req_len);
-
send_data_req.qsee_cmd_id = QSEE_CLIENT_SEND_DATA_COMMAND;
send_data_req.app_id = app_id;
@@ -888,14 +896,20 @@
*/
send_data_req.req_ptr = (uint32_t)__qseecom_uvirt_to_kphys((uint32_t) buf);
send_data_req.req_len = req->cmd_req_len;
- send_data_req.rsp_ptr = (uint32_t)__qseecom_uvirt_to_kphys((uint32_t) buf);
+ size = ROUNDUP(req->cmd_req_len, PAGE_SIZE);
+ rsp_buf_temp = (uint8_t *)buf + size;
+ send_data_req.rsp_ptr = (uint32_t)__qseecom_uvirt_to_kphys((uint32_t)rsp_buf_temp);
send_data_req.rsp_len = req->resp_len;
+ memscpy(buf, (RPMB_SND_RCV_BUF_SZ * 1024 * 1024), req->cmd_req_buf, req->cmd_req_len);
+ memscpy(rsp_buf_temp, req->resp_len, req->resp_buf, req->resp_len);
+
ret = qseecom_scm_call(SCM_SVC_TZSCHEDULER, 1,
(void *)&send_data_req,
sizeof(send_data_req), (void *)&resp, sizeof(resp));
- memscpy(req->resp_buf, req->resp_len, (void *)send_data_req.rsp_ptr, send_data_req.rsp_len);
+ memscpy(req->cmd_req_buf, req->cmd_req_len, (void *)buf, send_data_req.req_len);
+ memscpy(req->resp_buf, req->resp_len, (void *)rsp_buf_temp, send_data_req.rsp_len);
return ret;
}
@@ -941,6 +955,16 @@
__func__, ret);
goto err;
}
+ dprintf(DEBUG, "Loading cmnlib done\n");
+#if ENABLE_CMNLIB64_LOADING
+ ret = qseecom_load_commonlib_image("cmnlib64");
+ if (ret) {
+ dprintf(CRITICAL, "%s qseecom_load_commonlib_image failed with status:%d\n",
+ __func__, ret);
+ goto err;
+ }
+ dprintf(DEBUG, "Loading cmnlib64 done\n");
+#endif
qseecom.cmnlib_loaded = 1;
}
/* Check if App already exits, if exits increase ref_cnt
diff --git a/platform/msm_shared/qusb2_phy.c b/platform/msm_shared/qusb2_phy.c
index 8981df7..edc0ecc 100644
--- a/platform/msm_shared/qusb2_phy.c
+++ b/platform/msm_shared/qusb2_phy.c
@@ -49,6 +49,11 @@
/* Default tune value */
uint8_t tune2 = 0xB3;
+ /* Disable the ref clock before phy reset */
+#if GCC_RX2_USB2_CLKREF_EN
+ writel((readl(GCC_RX2_USB2_CLKREF_EN) & ~0x1), GCC_RX2_USB2_CLKREF_EN);
+ dmb();
+#endif
/* Block Reset */
val = readl(GCC_QUSB2_PHY_BCR) | BIT(0);
writel(val, GCC_QUSB2_PHY_BCR);
@@ -113,4 +118,16 @@
/* Enable PHY */
/* set CLAMP_N_EN and USB PHY is enabled*/
writel(0x22, QUSB2PHY_PORT_POWERDOWN);
+ udelay(150);
+
+ /* Check PLL status */
+ if (!(readl(QUSB2PHY_PLL_STATUS) & QUSB2PHY_PLL_LOCK))
+ {
+ dprintf(CRITICAL, "QUSB2PHY failed to lock: %d", readl(QUSB2PHY_PLL_STATUS));
+ }
+
+#if GCC_RX2_USB2_CLKREF_EN
+ writel((readl(GCC_RX2_USB2_CLKREF_EN) | 0x1), GCC_RX2_USB2_CLKREF_EN);
+ dmb();
+#endif
}
diff --git a/platform/msm_shared/reboot.c b/platform/msm_shared/reboot.c
index 8f53633..6d97b0c 100644
--- a/platform/msm_shared/reboot.c
+++ b/platform/msm_shared/reboot.c
@@ -71,12 +71,13 @@
uint8_t hard_restart_reason = 0;
/* Read reboot reason and scrub it
- * Bit-5, bit-6 and bit-7 of SOFT_RB_SPARE for hard reset reason
+ * Bit-2 to bit-7 of SOFT_RB_SPARE for hard reset reason
*/
hard_restart_reason = REG_READ(PON_SOFT_RB_SPARE);
- REG_WRITE(PON_SOFT_RB_SPARE, hard_restart_reason & 0x1f);
+ REG_WRITE(PON_SOFT_RB_SPARE, hard_restart_reason & 0x03);
- return hard_restart_reason;
+ /* Extract the bits 5 to 7 and return */
+ return hard_restart_reason & 0xFC;
}
/* Return true if it is triggered by alarm. */
diff --git a/project/msm8996.mk b/project/msm8996.mk
index aefc7c3..586922a 100644
--- a/project/msm8996.mk
+++ b/project/msm8996.mk
@@ -36,10 +36,17 @@
DEFINES += ABOOT_IGNORE_BOOT_HEADER_ADDRS=1
+DEFINES += ABOOT_FORCE_KERNEL_ADDR=0x80080000
+DEFINES += ABOOT_FORCE_RAMDISK_ADDR=0x82200000
+DEFINES += ABOOT_FORCE_TAGS_ADDR=0x82000000
+DEFINES += ABOOT_FORCE_KERNEL64_ADDR=0x80080000
+
DEFINES += USB_RESET_FROM_CLK=1
DEFINES += USE_BOOTDEV_CMDLINE=1
DEFINES += USE_RPMB_FOR_DEVINFO=1
DEFINES += ENABLE_WBC=1
+#Enable below flag to compile cmnlib64
+#DEFINES += ENABLE_CMNLIB64_LOADING=1
#Disable thumb mode
ENABLE_THUMB := false
diff --git a/target/msm8996/rules.mk b/target/msm8996/rules.mk
index 49bacca..cf294bf 100644
--- a/target/msm8996/rules.mk
+++ b/target/msm8996/rules.mk
@@ -15,6 +15,9 @@
SCRATCH_ADDR := 0x91C00000
SCRATCH_SIZE := 740
+KERNEL_ADDR := 0x80000000
+KERNEL_SIZE := 88
+
# LPAE supports only 32 virtual address, L1 pt size is 4
L1_PT_SZ := 4
L2_PT_SZ := 3
@@ -39,6 +42,8 @@
BASE_ADDR=$(BASE_ADDR) \
TAGS_ADDR=$(TAGS_ADDR) \
RAMDISK_ADDR=$(RAMDISK_ADDR) \
+ KERNEL_ADDR=$(KERNEL_ADDR) \
+ KERNEL_SIZE=$(KERNEL_SIZE) \
SCRATCH_ADDR=$(SCRATCH_ADDR) \
SCRATCH_SIZE=$(SCRATCH_SIZE) \
L1_PT_SZ=$(L1_PT_SZ) \