Merge "aboot: Fix issue with secure boot"
diff --git a/arch/arm/arch.c b/arch/arm/arch.c
index f17fa09..dc171b4 100644
--- a/arch/arm/arch.c
+++ b/arch/arm/arch.c
@@ -47,7 +47,6 @@
#if ARM_WITH_MMU
arm_mmu_init();
- platform_init_mmu_mappings();
#endif
/* turn the cache back on */
diff --git a/arch/arm/mmu.c b/arch/arm/mmu.c
index 4b51d50..cc74534 100644
--- a/arch/arm/mmu.c
+++ b/arch/arm/mmu.c
@@ -78,6 +78,8 @@
MMU_MEMORY_AP_READ_WRITE);
}
+ platform_init_mmu_mappings();
+
/* set up the translation table base */
arm_write_ttbr((uint32_t)tt);
diff --git a/platform/copper/acpuclock.c b/platform/copper/acpuclock.c
index 8299a7c..3911572 100644
--- a/platform/copper/acpuclock.c
+++ b/platform/copper/acpuclock.c
@@ -126,10 +126,7 @@
}
else if(freq == MMC_CLK_50MHZ)
{
- /* For now, not able to bump the clock to 50MHz
- * so use 20MHz for now.
- */
- ret = clk_get_set_enable(clk_name, 20000000, 1);
+ ret = clk_get_set_enable(clk_name, 50000000, 1);
}
else
{
diff --git a/platform/copper/include/platform/iomap.h b/platform/copper/include/platform/iomap.h
index c498bdc..d48c7c9 100644
--- a/platform/copper/include/platform/iomap.h
+++ b/platform/copper/include/platform/iomap.h
@@ -29,6 +29,9 @@
#ifndef _PLATFORM_MSMCOPPER_IOMAP_H_
#define _PLATFORM_MSMCOPPER_IOMAP_H_
+#define MSM_IOMAP_BASE 0xF9000000
+#define MSM_IOMAP_END 0xFEFFFFFF
+
#define SDRAM_START_ADDR 0x00000000
#define SDRAM_SEC_BANK_START_ADDR 0x10000000
diff --git a/platform/copper/platform.c b/platform/copper/platform.c
index 397bb84..6ccfe2d 100644
--- a/platform/copper/platform.c
+++ b/platform/copper/platform.c
@@ -34,7 +34,27 @@
#include <qgic.h>
#include <qtimer.h>
#include <platform/clock.h>
+#include <mmu.h>
+#include <arch/arm/mmu.h>
+#include <smem.h>
+#define MB (1024*1024)
+
+#define MSM_IOMAP_SIZE ((MSM_IOMAP_END - MSM_IOMAP_BASE)/MB)
+
+/* LK memory - cacheable, write through */
+#define LK_MEMORY (MMU_MEMORY_TYPE_NORMAL_WRITE_THROUGH | \
+ MMU_MEMORY_AP_READ_WRITE)
+
+/* Peripherals - non-shared device */
+#define IOMAP_MEMORY (MMU_MEMORY_TYPE_DEVICE_SHARED | \
+ MMU_MEMORY_AP_READ_WRITE | MMU_MEMORY_XN)
+
+mmu_section_t mmu_section_table[] = {
+/* Physical addr, Virtual addr, Size (in MB), Flags */
+ {MEMBASE, MEMBASE, (MEMSIZE / MB), LK_MEMORY},
+ {MSM_IOMAP_BASE, MSM_IOMAP_BASE, MSM_IOMAP_SIZE, IOMAP_MEMORY},
+};
void platform_early_init(void)
{
@@ -53,3 +73,48 @@
{
qtimer_uninit();
}
+
+/* Setup memory for this platform */
+void platform_init_mmu_mappings(void)
+{
+ struct smem_ram_ptable ram_ptable;
+ uint32_t i;
+ uint32_t sections;
+ uint32_t table_size = ARRAY_SIZE(mmu_section_table);
+
+ ASSERT(smem_ram_ptable_init(&ram_ptable));
+
+ /* Configure the MMU page entries for SDRAM and IMEM memory read
+ from the smem ram table*/
+ for(i = 0; i < ram_ptable.len; i++)
+ { if((ram_ptable.parts[i].category == SDRAM) ||
+ (ram_ptable.parts[i].category == IMEM))
+ {
+ /* Check to ensure that start address is 1MB aligned */
+ ASSERT((ram_ptable.parts[i].start & 0xFFFFF) == 0);
+
+ sections = (ram_ptable.parts[i].size) / MB;
+ while(sections--) {
+ arm_mmu_map_section(ram_ptable.parts[i].start +
+ sections * MB,
+ ram_ptable.parts[i].start +
+ sections * MB,
+ (MMU_MEMORY_TYPE_NORMAL_WRITE_THROUGH | \
+ MMU_MEMORY_AP_READ_WRITE | MMU_MEMORY_XN));
+ }
+ }
+ }
+ /* Configure the MMU page entries for memory read from the
+ mmu_section_table */
+ for (i = 0; i < table_size; i++) {
+ sections = mmu_section_table[i].num_of_sections;
+
+ while (sections--) {
+ arm_mmu_map_section(mmu_section_table[i].paddress +
+ sections * MB,
+ mmu_section_table[i].vaddress +
+ sections * MB,
+ mmu_section_table[i].flags);
+ }
+ }
+}
diff --git a/platform/msm8960/platform.c b/platform/msm8960/platform.c
index 74bedd8..9ad7459 100644
--- a/platform/msm8960/platform.c
+++ b/platform/msm8960/platform.c
@@ -80,7 +80,7 @@
/* Physical addr, Virtual addr, Size (in MB), Flags */
{MEMBASE, MEMBASE, (MEMSIZE / MB), LK_MEMORY},
{BASE_ADDR, BASE_ADDR, 44, KERNEL_MEMORY},
- {SCRATCH_ADDR, SCRATCH_ADDR, 128, SCRATCH_MEMORY},
+ {SCRATCH_ADDR, SCRATCH_ADDR, 768, SCRATCH_MEMORY},
{MSM_IOMAP_BASE, MSM_IOMAP_BASE, MSM_IOMAP_SIZE, IOMAP_MEMORY},
{MSM_IMEM_BASE, MSM_IMEM_BASE, 1, IMEM_MEMORY},
};
diff --git a/platform/msm_shared/bam.c b/platform/msm_shared/bam.c
index 5eef03a..8501fd2 100644
--- a/platform/msm_shared/bam.c
+++ b/platform/msm_shared/bam.c
@@ -33,6 +33,7 @@
#include <platform/interrupts.h>
#include <platform/iomap.h>
#include <platform/irqs.h>
+#include <pow2.h>
#define HLOS_EE_INDEX 0
@@ -206,6 +207,11 @@
/* Check if fifo start is 8-byte alligned */
ASSERT(!((uint32_t)bam->pipe[pipe_num].fifo.head & 0x7));
+ /* Check if fifo size is a power of 2.
+ * The circular fifo logic in lk expects this.
+ */
+ ASSERT(ispow2(bam->pipe[pipe_num].fifo.size));
+
bam->pipe[pipe_num].fifo.current = bam->pipe[pipe_num].fifo.head;
/* Set the descriptor buffer size. Must be a multiple of 8 */
@@ -274,6 +280,7 @@
/* Update the fifo peer offset */
val = (num_desc - 1) * BAM_DESC_SIZE;
val += bam->pipe[pipe_num].fifo.offset;
+ val &= (bam->pipe[pipe_num].fifo.size * BAM_DESC_SIZE - 1);
writel(val, BAM_P_EVNT_REGn(bam->pipe[pipe_num].pipe_num, bam->base));
}
@@ -285,7 +292,7 @@
* Note : S/W maintains the circular properties of the FIFO and updates
* the offsets accordingly.
*/
-unsigned bam_read_offset_update(struct bam_instance *bam, unsigned int pipe_num)
+void bam_read_offset_update(struct bam_instance *bam, unsigned int pipe_num)
{
uint32_t offset;
@@ -294,18 +301,11 @@
dprintf(INFO, "Offset value is %d \n", offset);
- if (offset == (uint16_t)(bam->pipe[pipe_num].fifo.size - 1) * BAM_DESC_SIZE )
- {
- bam->pipe[pipe_num].fifo.current = bam->pipe[pipe_num].fifo.head;
- offset = 0;
- }
- else
+ /* Save the next offset to be written to. */
bam->pipe[pipe_num].fifo.current = (struct bam_desc*)
((uint32_t)bam->pipe[pipe_num].fifo.head + offset);
bam->pipe[pipe_num].fifo.offset = offset + BAM_DESC_SIZE ;
-
- return offset;
}
/* Function to get the next desc address.
@@ -318,7 +318,6 @@
uint16_t offset;
offset = desc - fifo->head;
- offset /= BAM_DESC_SIZE;
if (offset == (fifo->size - 1))
return fifo->head;
@@ -330,18 +329,21 @@
* bam : BAM instance to be used.
* data_ptr : Memory address for data transfer.
* data_len : Length of the data_ptr.
+ * flags : Flags to be set on the last desc added.
*
+ * Note: This function also notifies the BAM about the added descriptors.
*/
int bam_add_desc(struct bam_instance *bam,
unsigned int pipe_num,
unsigned char *data_ptr,
- unsigned int data_len)
+ unsigned int data_len,
+ unsigned flags)
{
- struct bam_desc *desc;
- struct bam_desc *next = bam->pipe[pipe_num].fifo.current;
int bam_ret = BAM_RESULT_SUCCESS;
unsigned int len = data_len;
+ unsigned int desc_len;
unsigned int n = 0;
+ unsigned int desc_flags;
dprintf(INFO, "Data length for BAM transfer is %u\n", data_len);
@@ -352,15 +354,6 @@
goto bam_add_desc_error;
}
- /* Check if the FIFO is allocated for the pipe */
- if (!bam->pipe[pipe_num].initialized)
- {
- dprintf(CRITICAL, "Please allocate the FIFO for the BAM pipe %d\n",
- bam->pipe[pipe_num].pipe_num);
- bam_ret = BAM_RESULT_FAILURE;
- goto bam_add_desc_error;
- }
-
/* Check if we have enough space in FIFO */
if (len > (unsigned)bam->pipe[pipe_num].fifo.size * BAM_MAX_DESC_DATA_LEN)
{
@@ -371,40 +364,32 @@
while (len)
{
- desc = next;
+
/* There are only 16 bits to write data length.
* If more bits are needed, create more
* descriptors.
*/
if (len > BAM_MAX_DESC_DATA_LEN)
{
- desc->size = BAM_MAX_DESC_DATA_LEN;
+ desc_len = BAM_MAX_DESC_DATA_LEN;
len -= BAM_MAX_DESC_DATA_LEN;
+ desc_flags = 0;
}
else
{
- desc->size = len;
+ desc_len = len;
len = 0;
+ /* Set correct flags on the last desc. */
+ desc_flags = flags;
}
- /* Write descriptors */
- desc->addr = (uint32_t)data_ptr;
- desc->flags = 0;
- desc->reserved = 0;
+ /* Write descriptor */
+ bam_add_one_desc(bam, pipe_num, data_ptr, desc_len, desc_flags);
- next = fifo_getnext(&bam->pipe[pipe_num].fifo, desc);
data_ptr += BAM_MAX_DESC_DATA_LEN;
n++;
-
- dprintf(INFO,"Desc written: len = %u addr = %u\n", desc->size, desc->addr);
}
- if (bam->pipe[pipe_num].trans_type == BAM2SYS)
- /* Set interrupt bit for the last descriptor. */
- desc->flags |= BAM_DESC_INT_FLAG;
- else
- /* Set transaction end bit for the last descriptor. */
- desc->flags |= BAM_DESC_EOT_FLAG;
/* Create a read/write event to notify the periperal of the added desc. */
bam_sys_gen_event(bam, pipe_num, n);
@@ -414,6 +399,76 @@
return bam_ret;
}
+/* Function to add a BAM descriptor for a given fifo.
+ * bam : BAM instance to be used.
+ * data_ptr : Memory address for data transfer.
+ * data_len : Length of the data_ptr.
+ * flags : Flags to be set on the desc added.
+ *
+ * Note: This function does not notify the BAM about the added descriptor.
+ */
+int bam_add_one_desc(struct bam_instance *bam,
+ unsigned int pipe_num,
+ unsigned char* data_ptr,
+ uint32_t len,
+ uint8_t flags)
+{
+
+ struct bam_desc *desc = bam->pipe[pipe_num].fifo.current;
+ int bam_ret = BAM_RESULT_SUCCESS;
+
+ if (data_ptr == NULL || len == 0)
+ {
+ dprintf(CRITICAL, "Wrong params for BAM transfer \n");
+ bam_ret = BAM_RESULT_FAILURE;
+ goto bam_add_one_desc_error;
+ }
+
+ /* Check if the FIFO is allocated for the pipe */
+ if (!bam->pipe[pipe_num].initialized)
+ {
+ dprintf(CRITICAL, "Please allocate the FIFO for the BAM pipe %d\n",
+ bam->pipe[pipe_num].pipe_num);
+ bam_ret = BAM_RESULT_FAILURE;
+ goto bam_add_one_desc_error;
+ }
+
+ if ((flags & BAM_DESC_LOCK_FLAG) && (flags & BAM_DESC_UNLOCK_FLAG))
+ {
+ dprintf(CRITICAL, "Can't lock and unlock in the same desc\n");
+ bam_ret = BAM_RESULT_FAILURE;
+ goto bam_add_one_desc_error;
+ }
+
+ /* Setting EOT flag on a CMD desc is not valid */
+ if ((flags & BAM_DESC_EOT_FLAG) && (flags & BAM_DESC_CMD_FLAG))
+ {
+ dprintf(CRITICAL, "EOT flag set on the CMD desc\n");
+ bam_ret = BAM_RESULT_FAILURE;
+ goto bam_add_one_desc_error;
+ }
+
+ /* Check for the length of the desc. */
+ if (len > BAM_MAX_DESC_DATA_LEN)
+ {
+ dprintf(CRITICAL, "len of the desc exceeds max length"
+ " %d > %d\n", len, BAM_MAX_DESC_DATA_LEN);
+ bam_ret = BAM_RESULT_FAILURE;
+ goto bam_add_one_desc_error;
+ }
+
+ desc->flags = flags;
+ desc->addr = (uint32_t)data_ptr;
+ desc->size = (uint16_t)len;
+ desc->reserved = 0;
+
+ /* Update the FIFO to point to the head */
+ bam->pipe[pipe_num].fifo.current = fifo_getnext(&bam->pipe[pipe_num].fifo, desc);
+
+bam_add_one_desc_error:
+ return bam_ret;
+}
+
struct cmd_element* bam_add_cmd_element(struct cmd_element *ptr,
uint32_t reg_addr,
uint32_t value,
@@ -422,7 +477,7 @@
/* Write cmd type.
* Also, write the register address.
*/
- ptr->addr_n_cmd = (reg_addr << 8) | cmd_type;
+ ptr->addr_n_cmd = (reg_addr & ~(0xFF000000)) | (cmd_type << 24);
/* Do not mask any of the addr bits by default */
ptr->reg_mask = 0xFFFFFFFF;
@@ -433,62 +488,3 @@
/* Return the address to add the next element to */
return ptr + 1;
}
-
-/* Command descriptors are added one by one.
- * This is because each descriptor might have different
- * flag settings.
- */
-int bam_add_cmd_desc(struct bam_instance *bam,
- unsigned int pipe_num,
- unsigned char* data_ptr,
- uint32_t len,
- uint8_t flags)
-{
-
- struct bam_desc *desc = bam->pipe[pipe_num].fifo.current;
- struct bam_desc *next = bam->pipe[pipe_num].fifo.current;
- int bam_ret = BAM_RESULT_SUCCESS;
-
- if (data_ptr == NULL || len == 0)
- {
- dprintf(CRITICAL, "Wrong params for BAM transfer \n");
- bam_ret = BAM_RESULT_FAILURE;
- goto bam_add_cmd_desc_error;
- }
-
- /* Check if the FIFO is allocated for the pipe */
- if (!bam->pipe[pipe_num].initialized)
- {
- dprintf(CRITICAL, "Please allocate the FIFO for the BAM pipe %d\n",
- bam->pipe[pipe_num].pipe_num);
- bam_ret = BAM_RESULT_FAILURE;
- goto bam_add_cmd_desc_error;
- }
-
- if ((flags & BAM_DESC_LOCK_FLAG) && (flags & BAM_DESC_UNLOCK_FLAG))
- {
- dprintf(CRITICAL, "Can't lock and unlock in the same desc\n");
- bam_ret = BAM_RESULT_FAILURE;
- goto bam_add_cmd_desc_error;
- }
-
- /* Setting EOT flag on a CMD desc is not valid */
- if (flags & BAM_DESC_EOT_FLAG)
- {
- dprintf(CRITICAL, "EOT flag set on the CMD desc\n");
- bam_ret = BAM_RESULT_FAILURE;
- goto bam_add_cmd_desc_error;
- }
-
- /* Set the passed in flags along with the CMD flag. */
- desc->flags = flags | BAM_DESC_CMD_FLAG;
- desc->addr = data_ptr;
- desc->size = len;
- desc->reserved = 0;
-
- /* Update the FIFO to point to the head */
- bam->pipe[pipe_num].fifo.current = fifo_getnext(&bam->pipe[pipe_num].fifo, desc);
-
-bam_add_cmd_desc_error:
- return bam_ret;
-}
diff --git a/platform/msm_shared/include/bam.h b/platform/msm_shared/include/bam.h
index d5b587e..3338bef 100644
--- a/platform/msm_shared/include/bam.h
+++ b/platform/msm_shared/include/bam.h
@@ -229,6 +229,8 @@
void bam_init(struct bam_instance *bam);
void bam_sys_pipe_init(struct bam_instance *bam,
uint8_t pipe_num);
+int bam_pipe_fifo_init(struct bam_instance *bam,
+ uint8_t pipe_num);
struct cmd_element* bam_add_cmd_element(struct cmd_element *ptr,
uint32_t addr,
uint32_t data,
@@ -236,8 +238,9 @@
int bam_add_desc(struct bam_instance *bam,
unsigned int pipe_num,
unsigned char *data_ptr,
- unsigned int data_len);
-int bam_add_cmd_desc(struct bam_instance *bam,
+ unsigned int data_len,
+ unsigned flags);
+int bam_add_one_desc(struct bam_instance *bam,
unsigned int pipe_num,
unsigned char*,
uint32_t len,
@@ -248,6 +251,6 @@
int bam_wait_for_interrupt(struct bam_instance *bam,
uint8_t pipe_num,
enum p_int_type interrupt);
-unsigned bam_read_offset_update(struct bam_instance *bam, unsigned int pipe_num);
+void bam_read_offset_update(struct bam_instance *bam, unsigned int pipe_num);
#endif
diff --git a/platform/msm_shared/include/clock_lib2.h b/platform/msm_shared/include/clock_lib2.h
index 0b6dbae..0a82c51 100644
--- a/platform/msm_shared/include/clock_lib2.h
+++ b/platform/msm_shared/include/clock_lib2.h
@@ -52,7 +52,7 @@
.freq_hz = (f), \
.src_clk = &s##_clk_src.c, \
.m_val = (m), \
- .n_val = ~((n)-(m)), \
+ .n_val = ~((n)-(m)) * !!(n), \
.d_val = ~(n),\
.div_src_val = BVAL(4, 0, (int)(2*(div) - 1)) \
| BVAL(10, 8, s##_source_val), \
diff --git a/platform/msm_shared/mmc.c b/platform/msm_shared/mmc.c
index 803a1e2..0f70b53 100644
--- a/platform/msm_shared/mmc.c
+++ b/platform/msm_shared/mmc.c
@@ -2104,6 +2104,7 @@
{
unsigned int mmc_return = MMC_BOOT_E_SUCCESS;
unsigned int status;
+ uint8_t mmc_bus_width = 0;
/* Basic check */
if (host == NULL) {
@@ -2162,8 +2163,9 @@
}
/* enable wide bus */
+ mmc_bus_width = target_mmc_bus_width();
mmc_return =
- mmc_boot_set_bus_width(card, MMC_BOOT_BUS_WIDTH_4_BIT);
+ mmc_boot_set_bus_width(card, mmc_bus_width);
if (mmc_return != MMC_BOOT_E_SUCCESS) {
dprintf(CRITICAL,
"Error No.%d: Failure to set wide bus for Card(RCA:%x)\n",
diff --git a/target/init.c b/target/init.c
index 7d51ea9..fc5c34a 100644
--- a/target/init.c
+++ b/target/init.c
@@ -24,6 +24,7 @@
#include <debug.h>
#include <target.h>
#include <compiler.h>
+#include <mmc.h>
#define EXPAND(NAME) #NAME
#define TARGET(NAME) EXPAND(NAME)
@@ -117,3 +118,9 @@
__WEAK void target_usb_stop(void)
{
}
+
+/* Default target specific function for mmc bus width */
+__WEAK int target_mmc_bus_width()
+{
+ return MMC_BOOT_BUS_WIDTH_4_BIT;
+}
diff --git a/target/mdm9625/init.c b/target/mdm9625/init.c
index 696e479..e6bb189 100644
--- a/target/mdm9625/init.c
+++ b/target/mdm9625/init.c
@@ -67,19 +67,6 @@
/* Identify the current target */
void target_detect(struct board_data *board)
{
- switch(board->platform_hw)
- {
- case HW_PLATFORM_SURF:
- board->target = LINUX_MACHTYPE_9625_CDP;
- break;
-
- case HW_PLATFORM_MTP:
- board->target = LINUX_MACHTYPE_9625_MTP;
- break;
-
- default:
- board->target = LINUX_MACHTYPE_9625_CDP;
- }
}
/* Identify the baseband being used */
diff --git a/target/mdm9625/rules.mk b/target/mdm9625/rules.mk
index 1e23db4..ce1cc76 100644
--- a/target/mdm9625/rules.mk
+++ b/target/mdm9625/rules.mk
@@ -5,9 +5,9 @@
PLATFORM := mdm9x25
#TBD: these will change once mem map is defined.
-MEMBASE := 0x22200000
+MEMBASE := 0x20000000
MEMSIZE := 0x00100000 # 1MB
-SCRATCH_ADDR := 0x00000000
+SCRATCH_ADDR := 0x20200000
DEFINES += NO_KEYPAD_DRIVER=1
diff --git a/target/msm8960/atags.c b/target/msm8960/atags.c
index 160190d..8142890 100644
--- a/target/msm8960/atags.c
+++ b/target/msm8960/atags.c
@@ -37,6 +37,7 @@
#define SIZE_2M (2 * SIZE_1M)
#define SIZE_256M (256 * SIZE_1M)
#define SIZE_512M (512 * SIZE_1M)
+#define SIZE_768M (768 * SIZE_1M)
#define ATAG_MEM 0x54410002
@@ -208,5 +209,5 @@
unsigned target_get_max_flash_size(void)
{
- return (SIZE_512M);
+ return (SIZE_768M);
}
diff --git a/target/msm8960/init.c b/target/msm8960/init.c
index b7d1548..e1f67e1 100644
--- a/target/msm8960/init.c
+++ b/target/msm8960/init.c
@@ -466,3 +466,8 @@
apq8064_ext_3p3V_enable();
}
}
+
+int target_mmc_bus_width()
+{
+ return MMC_BOOT_BUS_WIDTH_8_BIT;
+}