pmic: pm8x41: Change to read correct register for PM660.

Change to read correct PON and WARM reset reason for PM660 PMIC.

Change-Id: I555f170a76b78cba532996dee9ffee13f865d03e
diff --git a/dev/pmic/pm8x41/include/pm8x41.h b/dev/pmic/pm8x41/include/pm8x41.h
index 2e0a270..5b1c20e 100644
--- a/dev/pmic/pm8x41/include/pm8x41.h
+++ b/dev/pmic/pm8x41/include/pm8x41.h
@@ -229,6 +229,7 @@
 int pm8x41_ldo_control(struct pm8x41_ldo *ldo, uint8_t enable);
 uint8_t pm8x41_get_pmic_rev();
 uint8_t pm8x41_get_pon_reason();
+uint8_t pm660_get_pon_reason();
 uint8_t pm8950_get_pon_reason();
 uint8_t pm8x41_get_pon_poff_reason1();
 uint8_t pm8x41_get_pon_poff_reason2();
@@ -237,6 +238,7 @@
 void pm8x41_enable_mpp(struct pm8x41_mpp *mpp, enum mpp_en_ctl enable);
 void pm8x41_enable_mvs(struct pm8x41_mvs *mvs, enum mvs_en_ctl enable);
 uint8_t pm8x41_get_is_cold_boot();
+uint8_t pm660_get_is_cold_boot();
 void pm8x41_diff_clock_ctrl(uint8_t enable);
 void pm8x41_clear_pmic_watchdog(void);
 void pm8x41_lnbb_clock_ctrl(uint8_t enable);
diff --git a/dev/pmic/pm8x41/include/pm8x41_hw.h b/dev/pmic/pm8x41/include/pm8x41_hw.h
index 6484a10..d213582 100644
--- a/dev/pmic/pm8x41/include/pm8x41_hw.h
+++ b/dev/pmic/pm8x41/include/pm8x41_hw.h
@@ -69,6 +69,8 @@
 
 /* PON Peripheral registers */
 #define PON_PON_REASON1                       0x808
+#define PM660_PON_REASON1                     0x8C0
+#define PM660_PON_WARMBOOT_STATUS1            0x8C2
 #define PON_WARMBOOT_STATUS1                  0x80A
 #define PON_WARMBOOT_STATUS2                  0x80B
 #define PON_POFF_REASON1                      0x80C
diff --git a/dev/pmic/pm8x41/pm8x41.c b/dev/pmic/pm8x41/pm8x41.c
index 51a0f96..0c389eb 100644
--- a/dev/pmic/pm8x41/pm8x41.c
+++ b/dev/pmic/pm8x41/pm8x41.c
@@ -581,6 +581,11 @@
 	return REG_READ(REVID_REVISION4);
 }
 
+uint8_t pm660_get_pon_reason()
+{
+	return REG_READ(PM660_PON_REASON1);
+}
+
 uint8_t pm8x41_get_pon_reason()
 {
 	return REG_READ(PON_PON_REASON1);
@@ -631,6 +636,15 @@
 	REG_WRITE(((mpp->base + MPP_MODE_CTL) + (mpp_slave_id << 16)), mpp->mode | (MPP_DIGITAL_OUTPUT << MPP_MODE_CTL_MODE_SHIFT));
 }
 
+uint8_t pm660_get_is_cold_boot()
+{
+	if (REG_READ(PM660_PON_WARMBOOT_STATUS1)) {
+		dprintf(INFO,"%s: Warm boot\n", __func__);
+		return 0;
+	}
+	return 1;
+}
+
 uint8_t pm8x41_get_is_cold_boot()
 {
 	if (REG_READ(PON_WARMBOOT_STATUS1) || REG_READ(PON_WARMBOOT_STATUS2)) {