Merge "dev: gcdb: add ssd2080m driver for skug"
diff --git a/dev/pmic/pm8x41/include/pm8x41.h b/dev/pmic/pm8x41/include/pm8x41.h
index 236aed7..dcd4549 100644
--- a/dev/pmic/pm8x41/include/pm8x41.h
+++ b/dev/pmic/pm8x41/include/pm8x41.h
@@ -203,4 +203,5 @@
void pm8x41_enable_mpp(struct pm8x41_mpp *mpp, enum mpp_en_ctl enable);
uint8_t pm8x41_get_is_cold_boot();
void pm8x41_diff_clock_ctrl(uint8_t enable);
+void pm8x41_clear_pmic_watchdog(void);
#endif
diff --git a/dev/pmic/pm8x41/include/pm8x41_hw.h b/dev/pmic/pm8x41/include/pm8x41_hw.h
index c8c83ce..9239ce7 100644
--- a/dev/pmic/pm8x41/include/pm8x41_hw.h
+++ b/dev/pmic/pm8x41/include/pm8x41_hw.h
@@ -72,6 +72,7 @@
#define PON_RESIN_N_RESET_S2_CTL 0x846 /* bit 7: S2_RESET_EN, bit 0:3 : RESET_TYPE */
#define PON_PS_HOLD_RESET_CTL 0x85A /* bit 7: S2_RESET_EN, bit 0:3 : RESET_TYPE */
#define PON_PS_HOLD_RESET_CTL2 0x85B
+#define PMIC_WD_RESET_S2_CTL2 0x857
/* PON Peripheral register bit values */
#define RESIN_ON_INT_BIT 1
diff --git a/dev/pmic/pm8x41/pm8x41.c b/dev/pmic/pm8x41/pm8x41.c
index 915cf52..91f1daa 100644
--- a/dev/pmic/pm8x41/pm8x41.c
+++ b/dev/pmic/pm8x41/pm8x41.c
@@ -401,3 +401,8 @@
REG_WRITE(DIFF_CLK1_EN_CTL, reg);
}
+
+void pm8x41_clear_pmic_watchdog(void)
+{
+ pm8x41_reg_write(PMIC_WD_RESET_S2_CTL2, 0x0);
+}
diff --git a/platform/apq8084/apq8084-clock.c b/platform/apq8084/apq8084-clock.c
index 432fbdb..c939bad 100644
--- a/platform/apq8084/apq8084-clock.c
+++ b/platform/apq8084/apq8084-clock.c
@@ -133,13 +133,13 @@
F_END
};
-static struct rcg_clk blsp1_uart2_apps_clk_src =
+static struct rcg_clk blsp2_uart2_apps_clk_src =
{
- .cmd_reg = (uint32_t *) BLSP1_UART2_APPS_CMD_RCGR,
- .cfg_reg = (uint32_t *) BLSP1_UART2_APPS_CFG_RCGR,
- .m_reg = (uint32_t *) BLSP1_UART2_APPS_M,
- .n_reg = (uint32_t *) BLSP1_UART2_APPS_N,
- .d_reg = (uint32_t *) BLSP1_UART2_APPS_D,
+ .cmd_reg = (uint32_t *) BLSP2_UART2_APPS_CMD_RCGR,
+ .cfg_reg = (uint32_t *) BLSP2_UART2_APPS_CFG_RCGR,
+ .m_reg = (uint32_t *) BLSP2_UART2_APPS_M,
+ .n_reg = (uint32_t *) BLSP2_UART2_APPS_N,
+ .d_reg = (uint32_t *) BLSP2_UART2_APPS_D,
.set_rate = clock_lib2_rcg_set_rate_mnd,
.freq_tbl = ftbl_gcc_blsp1_2_uart1_6_apps_clk,
@@ -151,13 +151,13 @@
},
};
-static struct branch_clk gcc_blsp1_uart2_apps_clk =
+static struct branch_clk gcc_blsp2_uart2_apps_clk =
{
- .cbcr_reg = (uint32_t *) BLSP1_UART2_APPS_CBCR,
- .parent = &blsp1_uart2_apps_clk_src.c,
+ .cbcr_reg = (uint32_t *) BLSP2_UART2_APPS_CBCR,
+ .parent = &blsp2_uart2_apps_clk_src.c,
.c = {
- .dbg_name = "gcc_blsp1_uart2_apps_clk",
+ .dbg_name = "gcc_blsp2_uart2_apps_clk",
.ops = &clk_ops_branch,
},
};
@@ -287,8 +287,8 @@
CLK_LOOKUP("sdc1_iface_clk", gcc_sdcc1_ahb_clk.c),
CLK_LOOKUP("sdc1_core_clk", gcc_sdcc1_apps_clk.c),
- CLK_LOOKUP("uart2_iface_clk", gcc_blsp1_ahb_clk.c),
- CLK_LOOKUP("uart2_core_clk", gcc_blsp1_uart2_apps_clk.c),
+ CLK_LOOKUP("uart7_iface_clk", gcc_blsp2_ahb_clk.c),
+ CLK_LOOKUP("uart7_core_clk", gcc_blsp2_uart2_apps_clk.c),
CLK_LOOKUP("usb_iface_clk", gcc_usb_hs_ahb_clk.c),
CLK_LOOKUP("usb_core_clk", gcc_usb_hs_system_clk.c),
diff --git a/platform/apq8084/include/platform/iomap.h b/platform/apq8084/include/platform/iomap.h
index 7e6e7d5..33e0090 100644
--- a/platform/apq8084/include/platform/iomap.h
+++ b/platform/apq8084/include/platform/iomap.h
@@ -65,6 +65,8 @@
#define BLSP1_UART4_BASE (PERIPH_SS_BASE + 0x00121000)
#define BLSP1_UART5_BASE (PERIPH_SS_BASE + 0x00122000)
+#define BLSP2_UART1_BASE (PERIPH_SS_BASE + 0x0015E000)
+
#define CLK_CTL_BASE 0xFC400000
/* GPLL */
@@ -75,12 +77,12 @@
/* UART */
#define BLSP1_AHB_CBCR (CLK_CTL_BASE + 0x5C4)
#define BLSP2_AHB_CBCR (CLK_CTL_BASE + 0x944)
-#define BLSP1_UART2_APPS_CBCR (CLK_CTL_BASE + 0x704)
-#define BLSP1_UART2_APPS_CMD_RCGR (CLK_CTL_BASE + 0x70C)
-#define BLSP1_UART2_APPS_CFG_RCGR (CLK_CTL_BASE + 0x710)
-#define BLSP1_UART2_APPS_M (CLK_CTL_BASE + 0x714)
-#define BLSP1_UART2_APPS_N (CLK_CTL_BASE + 0x718)
-#define BLSP1_UART2_APPS_D (CLK_CTL_BASE + 0x71C)
+#define BLSP2_UART2_APPS_CBCR (CLK_CTL_BASE + 0xA44)
+#define BLSP2_UART2_APPS_CMD_RCGR (CLK_CTL_BASE + 0xA4C)
+#define BLSP2_UART2_APPS_CFG_RCGR (CLK_CTL_BASE + 0xA50)
+#define BLSP2_UART2_APPS_M (CLK_CTL_BASE + 0xA54)
+#define BLSP2_UART2_APPS_N (CLK_CTL_BASE + 0xA58)
+#define BLSP2_UART2_APPS_D (CLK_CTL_BASE + 0xA5C)
/* USB */
#define USB_HS_BCR (CLK_CTL_BASE + 0x480)
diff --git a/platform/msm_shared/dev_tree.c b/platform/msm_shared/dev_tree.c
index 7ff5a82..01c0303 100644
--- a/platform/msm_shared/dev_tree.c
+++ b/platform/msm_shared/dev_tree.c
@@ -45,6 +45,7 @@
uint32_t size;
};
+static int platform_dt_match(struct dt_entry *cur_dt_entry, uint32_t target_variant_id, uint32_t subtype_mask);
extern int target_is_emmc_boot(void);
extern uint32_t target_dev_tree_mem(void *fdt, uint32_t memory_node_offset);
/* TODO: This function needs to be moved to target layer to check violations
@@ -52,23 +53,32 @@
*/
extern int check_aboot_addr_range_overlap(uint32_t start, uint32_t size);
-struct msm_id
-{
- uint32_t platform_id;
- uint32_t hardware_id;
- uint32_t soc_rev;
-};
-
/* Returns soc version if platform id and hardware id matches
otherwise return 0xFFFFFFFF */
#define INVALID_SOC_REV_ID 0XFFFFFFFF
static uint32_t dev_tree_compatible(void *dtb)
{
int root_offset;
- const void *prop;
- char model[128];
- struct msm_id msm_id;
+ const void *prop = NULL;
+ const char *plat_prop = NULL;
+ const char *board_prop = NULL;
+ char *model = NULL;
+ struct dt_entry cur_dt_entry;
+ struct dt_entry *dt_entry_v2 = NULL;
+ struct board_id *board_data = NULL;
+ struct plat_id *platform_data = NULL;
int len;
+ int len_board_id;
+ int len_plat_id;
+ int min_plat_id_len = 0;
+ uint32_t target_variant_id;
+ uint32_t dtb_ver;
+ uint32_t num_entries = 0;
+ uint32_t i, j, k;
+ uint32_t found = 0;
+ uint32_t msm_data_count;
+ uint32_t board_data_count;
+ uint32_t soc_rev;
root_offset = fdt_path_offset(dtb, "/");
if (root_offset < 0)
@@ -76,49 +86,199 @@
prop = fdt_getprop(dtb, root_offset, "model", &len);
if (prop && len > 0) {
- memcpy(model, prop, MIN((int)sizeof(model), len));
- model[sizeof(model) - 1] = '\0';
+ model = (char *) malloc(sizeof(char) * len);
+ ASSERT(model);
+ strlcpy(model, prop, len);
} else {
model[0] = '\0';
}
- prop = fdt_getprop(dtb, root_offset, "qcom,msm-id", &len);
- if (!prop || len <= 0) {
+ /* Find the board-id prop from DTB , if board-id is present then
+ * the DTB is version 2 */
+ board_prop = (const char *)fdt_getprop(dtb, root_offset, "qcom,board-id", &len_board_id);
+ if (board_prop)
+ {
+ dtb_ver = DEV_TREE_VERSION_V2;
+ min_plat_id_len = PLAT_ID_SIZE;
+ }
+ else
+ {
+ dtb_ver = DEV_TREE_VERSION_V1;
+ min_plat_id_len = DT_ENTRY_V1_SIZE;
+ }
+
+ /* Get the msm-id prop from DTB */
+ plat_prop = (const char *)fdt_getprop(dtb, root_offset, "qcom,msm-id", &len_plat_id);
+ if (!plat_prop || len_plat_id <= 0) {
dprintf(INFO, "qcom,msm-id entry not found\n");
return false;
- } else if (len < (int)sizeof(struct msm_id)) {
- dprintf(INFO, "qcom,msm-id entry size mismatch (%d != %d)\n",
- len, sizeof(struct msm_id));
+ } else if (len_plat_id % min_plat_id_len) {
+ dprintf(INFO, "qcom,msm-id in device tree is (%d) not a multiple of (%d)\n",
+ len_plat_id, min_plat_id_len);
return false;
}
- msm_id.platform_id = fdt32_to_cpu(((const struct msm_id *)prop)->platform_id);
- msm_id.hardware_id = fdt32_to_cpu(((const struct msm_id *)prop)->hardware_id);
- msm_id.soc_rev = fdt32_to_cpu(((const struct msm_id *)prop)->soc_rev);
- dprintf(INFO, "Found an appended flattened device tree (%s - %d %d 0x%x)\n",
- *model ? model : "unknown",
- msm_id.platform_id, msm_id.hardware_id, msm_id.soc_rev);
+ /*
+ * If DTB version is '1' look for <x y z> pair in the DTB
+ * x: platform_id
+ * y: variant_id
+ * z: SOC rev
+ */
+ if (dtb_ver == DEV_TREE_VERSION_V1)
+ {
+ while (len_plat_id)
+ {
+ cur_dt_entry.platform_id = fdt32_to_cpu(((const struct dt_entry_v1 *)plat_prop)->platform_id);
+ cur_dt_entry.variant_id = fdt32_to_cpu(((const struct dt_entry_v1 *)plat_prop)->variant_id);
+ cur_dt_entry.soc_rev = fdt32_to_cpu(((const struct dt_entry_v1 *)plat_prop)->soc_rev);
+ cur_dt_entry.board_hw_subtype = board_hardware_subtype();
- if (msm_id.platform_id != board_platform_id() ||
- msm_id.hardware_id != board_hardware_id()) {
- dprintf(INFO, "Device tree's msm_id doesn't match the board: <%d %d 0x%x> != <%d %d 0x%x>\n",
- msm_id.platform_id,
- msm_id.hardware_id,
- msm_id.soc_rev,
- board_platform_id(),
- board_hardware_id(),
- board_soc_version());
- return INVALID_SOC_REV_ID;
+ target_variant_id = board_hardware_id();
+
+ dprintf(SPEW, "Found an appended flattened device tree (%s - %u %u 0x%x)\n",
+ *model ? model : "unknown",
+ cur_dt_entry.platform_id, cur_dt_entry.variant_id, cur_dt_entry.soc_rev);
+
+ if (platform_dt_match(&cur_dt_entry, target_variant_id, 0) == 1)
+ {
+ dprintf(SPEW, "Device tree's msm_id doesn't match the board: <%u %u 0x%x> != <%u %u 0x%x>\n",
+ cur_dt_entry.platform_id,
+ cur_dt_entry.variant_id,
+ cur_dt_entry.soc_rev,
+ board_platform_id(),
+ board_hardware_id(),
+ board_soc_version());
+ plat_prop += DT_ENTRY_V1_SIZE;
+ len_plat_id -= DT_ENTRY_V1_SIZE;
+ continue;
+ }
+ else
+ {
+ found = 1;
+ break;
+ }
+ }
+ }
+ /*
+ * If DTB Version is '2' then we have split DTB with board & msm data
+ * populated saperately in board-id & msm-id prop respectively.
+ * Extract the data & prepare a look up table
+ */
+ else if (dtb_ver == DEV_TREE_VERSION_V2)
+ {
+ board_data_count = (len_board_id / BOARD_ID_SIZE);
+ msm_data_count = (len_plat_id / PLAT_ID_SIZE);
+
+ /* If we are using dtb v2.0, then we have split board & msm data in the DTB */
+ board_data = (struct board_id *) malloc(sizeof(struct board_id) * (len_board_id / BOARD_ID_SIZE));
+ ASSERT(board_data);
+ platform_data = (struct plat_id *) malloc(sizeof(struct plat_id) * (len_plat_id / PLAT_ID_SIZE));
+ ASSERT(platform_data);
+ i = 0;
+
+ /* Extract board data from DTB */
+ for(i = 0 ; i < board_data_count; i++)
+ {
+ board_data[i].variant_id = fdt32_to_cpu(((struct board_id *)board_prop)->variant_id);
+ board_data[i].platform_subtype = fdt32_to_cpu(((struct board_id *)board_prop)->platform_subtype);
+ len_board_id -= sizeof(struct board_id);
+ board_prop += sizeof(struct board_id);
+ }
+
+ /* Extract platform data from DTB */
+ for(i = 0 ; i < msm_data_count; i++)
+ {
+ platform_data[i].platform_id = fdt32_to_cpu(((struct plat_id *)plat_prop)->platform_id);
+ platform_data[i].soc_rev = fdt32_to_cpu(((struct plat_id *)plat_prop)->soc_rev);
+ len_plat_id -= sizeof(struct plat_id);
+ plat_prop += sizeof(struct plat_id);
+ }
+
+ /* We need to merge board & platform data into dt entry structure */
+ num_entries = msm_data_count * board_data_count;
+ dt_entry_v2 = (struct dt_entry*) malloc(sizeof(struct dt_entry) * num_entries);
+ ASSERT(dt_entry_v2);
+
+ /* If we have '<X>; <Y>; <Z>' as platform data & '<A>; <B>; <C>' as board data.
+ * Then dt entry should look like
+ * <X ,A >;<X, B>;<X, C>;
+ * <Y ,A >;<Y, B>;<Y, C>;
+ * <Z ,A >;<Z, B>;<Z, C>;
+ */
+ i = 0;
+ k = 0;
+ for (i = 0; i < msm_data_count; i++)
+ {
+ for (j = 0; j < board_data_count; j++)
+ {
+ dt_entry_v2[k].platform_id = platform_data[i].platform_id;
+ dt_entry_v2[k].soc_rev = platform_data[i].soc_rev;
+ dt_entry_v2[k].variant_id = board_data[j].variant_id;
+ dt_entry_v2[k].board_hw_subtype = board_data[j].platform_subtype;
+ k++;
+ }
+ }
+
+ /* Now find the matching entry in the merged list */
+ if (board_hardware_id() == HW_PLATFORM_QRD)
+ target_variant_id = board_target_id();
+ else
+ target_variant_id = board_hardware_id() | ((board_hardware_subtype() & 0xff) << 24);
+
+ for (i=0 ;i < num_entries; i++)
+ {
+ dprintf(SPEW, "Found an appended flattened device tree (%s - %u %u %u 0x%x)\n",
+ *model ? model : "unknown",
+ dt_entry_v2[i].platform_id, dt_entry_v2[i].variant_id, dt_entry_v2[i].board_hw_subtype, dt_entry_v2[i].soc_rev);
+
+ if (platform_dt_match(&dt_entry_v2[i], target_variant_id, 0xff) == 1)
+ {
+ dprintf(SPEW, "Device tree's msm_id doesn't match the board: <%u %u %u 0x%x> != <%u %u %u 0x%x>\n",
+ dt_entry_v2[i].platform_id,
+ dt_entry_v2[i].variant_id,
+ dt_entry_v2[i].soc_rev,
+ dt_entry_v2[i].board_hw_subtype,
+ board_platform_id(),
+ board_hardware_id(),
+ board_hardware_subtype(),
+ board_soc_version());
+ continue;
+ }
+ else
+ {
+ /* If found a match, return the cur_dt_entry */
+ found = 1;
+ cur_dt_entry = dt_entry_v2[i];
+ break;
+ }
+ }
}
- dprintf(INFO, "Device tree's msm_id matches the board: <%d %d 0x%x> == <%d %d 0x%x>\n",
- msm_id.platform_id,
- msm_id.hardware_id,
- msm_id.soc_rev,
+ if (!found)
+ {
+ soc_rev = INVALID_SOC_REV_ID;
+ goto end;
+ }
+ else
+ soc_rev = cur_dt_entry.soc_rev;
+
+ dprintf(INFO, "Device tree's msm_id matches the board: <%u %u %u 0x%x> == <%u %u %u 0x%x>\n",
+ cur_dt_entry.platform_id,
+ cur_dt_entry.variant_id,
+ cur_dt_entry.board_hw_subtype,
+ cur_dt_entry.soc_rev,
board_platform_id(),
board_hardware_id(),
+ board_hardware_subtype(),
board_soc_version());
- return msm_id.soc_rev;
+
+end:
+ free(board_data);
+ free(platform_data);
+ free(dt_entry_v2);
+ free(model);
+
+ return soc_rev;
}
/*
diff --git a/platform/msm_shared/include/dev_tree.h b/platform/msm_shared/include/dev_tree.h
index b88a47d..85aa40d 100644
--- a/platform/msm_shared/include/dev_tree.h
+++ b/platform/msm_shared/include/dev_tree.h
@@ -43,6 +43,18 @@
#define DTB_PAD_SIZE 1024
+/*
+ * For DTB V1: The DTB entries would be of the format
+ * qcom,msm-id = <msm8974, CDP, rev_1>; (3 * sizeof(uint32_t))
+ * For DTB V2: The DTB entries would be of the format
+ * qcom,msm-id = <msm8974, rev_1>; (2 * sizeof(uint32_t))
+ * qcom,board-id = <CDP, subtype_ID>; (2 * sizeof(uint32_t))
+ * The macros below are defined based on these.
+ */
+#define DT_ENTRY_V1_SIZE 0xC
+#define PLAT_ID_SIZE 0x8
+#define BOARD_ID_SIZE 0x8
+
struct dt_entry
{
uint32_t platform_id;
@@ -60,6 +72,18 @@
uint32_t num_entries;
};
+struct plat_id
+{
+ uint32_t platform_id;
+ uint32_t soc_rev;
+};
+
+struct board_id
+{
+ uint32_t variant_id;
+ uint32_t platform_subtype;
+};
+
enum dt_err_codes
{
DT_OP_SUCCESS,
diff --git a/platform/msm_shared/smem.h b/platform/msm_shared/smem.h
index 4838b6f..0f032dd 100755
--- a/platform/msm_shared/smem.h
+++ b/platform/msm_shared/smem.h
@@ -346,7 +346,9 @@
HW_PLATFORM_RUMI = 15,
HW_PLATFORM_VIRTIO = 16,
HW_PLATFORM_BTS = 19,
+ HW_PLATFORM_RCM = 21,
HW_PLATFORM_DMA = 22,
+ HW_PLATFORM_STP = 23,
HW_PLATFORM_32BITS = 0x7FFFFFFF,
};
diff --git a/target/apq8084/init.c b/target/apq8084/init.c
index 3aaa70f..3a66d38 100644
--- a/target/apq8084/init.c
+++ b/target/apq8084/init.c
@@ -57,8 +57,33 @@
#define FASTBOOT_MODE 0x77665500
-static void set_sdc_power_ctrl(void);
+enum cdp_subtype
+{
+ CDP_SUBTYPE_SMB349 = 0,
+ CDP_SUBTYPE_9x25_SMB349,
+ CDP_SUBTYPE_9x25_SMB1357,
+ CDP_SUBTYPE_9x35,
+ CDP_SUBTYPE_SMB1357
+};
+enum mtp_subtype
+{
+ MTP_SUBTYPE_SMB349 = 0,
+ MTP_SUBTYPE_9x25_SMB349,
+ MTP_SUBTYPE_9x25_SMB1357,
+ MTP_SUBTYPE_9x35,
+};
+
+enum rcm_subtype
+{
+ RCM_SUBTYPE_SMB349 = 0,
+ RCM_SUBTYPE_9x25_SMB349,
+ RCM_SUBTYPE_9x25_SMB1357,
+ RCM_SUBTYPE_9x35,
+ RCM_SUBTYPE_SMB1357,
+};
+
+static void set_sdc_power_ctrl(void);
static uint32_t mmc_pwrctl_base[] =
{ MSM_SDC1_BASE, MSM_SDC2_BASE };
@@ -75,7 +100,7 @@
void target_early_init(void)
{
#if WITH_DEBUG_UART
- uart_dm_init(2, 0, BLSP1_UART1_BASE);
+ uart_dm_init(7, 0, BLSP2_UART1_BASE);
#endif
}
@@ -116,6 +141,11 @@
keys_post_event(KEY_VOLUMEUP, 1);
}
+void target_uninit(void)
+{
+ mmc_put_card_to_sleep(dev);
+}
+
/* Do target specific usb initialization */
void target_usb_init(void)
{
@@ -229,37 +259,105 @@
board->target = LINUX_MACHTYPE_UNKNOWN;
}
+void set_cdp_baseband(struct board_data *board)
+{
+
+ uint32_t platform_subtype;
+ platform_subtype = board->platform_subtype;
+
+ switch(platform_subtype) {
+ case CDP_SUBTYPE_9x25_SMB349:
+ case CDP_SUBTYPE_9x25_SMB1357:
+ case CDP_SUBTYPE_9x35:
+ board->baseband = BASEBAND_MDM;
+ break;
+ case CDP_SUBTYPE_SMB349:
+ case CDP_SUBTYPE_SMB1357:
+ board->baseband = BASEBAND_APQ;
+ break;
+ default:
+ dprintf(CRITICAL, "CDP platform subtype :%u is not supported\n",
+ platform_subtype);
+ ASSERT(0);
+ };
+
+}
+
+void set_mtp_baseband(struct board_data *board)
+{
+
+ uint32_t platform_subtype;
+ platform_subtype = board->platform_subtype;
+
+ switch(platform_subtype) {
+ case MTP_SUBTYPE_9x25_SMB349:
+ case MTP_SUBTYPE_9x25_SMB1357:
+ case MTP_SUBTYPE_9x35:
+ board->baseband = BASEBAND_MDM;
+ break;
+ case MTP_SUBTYPE_SMB349:
+ board->baseband = BASEBAND_APQ;
+ break;
+ default:
+ dprintf(CRITICAL, "MTP platform subtype :%u is not supported\n",
+ platform_subtype);
+ ASSERT(0);
+ };
+}
+
+void set_rcm_baseband(struct board_data *board)
+{
+ uint32_t platform_subtype;
+ platform_subtype = board->platform_subtype;
+
+ switch(platform_subtype) {
+ case RCM_SUBTYPE_9x25_SMB349:
+ case RCM_SUBTYPE_9x25_SMB1357:
+ case RCM_SUBTYPE_9x35:
+ board->baseband = BASEBAND_MDM;
+ break;
+ case RCM_SUBTYPE_SMB349:
+ case RCM_SUBTYPE_SMB1357:
+ board->baseband = BASEBAND_APQ;
+ break;
+ default:
+ dprintf(CRITICAL, "RCM platform subtype :%u is not supported\n",
+ platform_subtype);
+ ASSERT(0);
+ };
+}
+
+
+
/* Detect the modem type */
void target_baseband_detect(struct board_data *board)
{
uint32_t platform;
uint32_t platform_subtype;
+ uint32_t platform_hardware;
platform = board->platform;
- platform_subtype = board->platform_subtype;
- /*
- * Look for platform subtype if present, else
- * check for platform type to decide on the
- * baseband type
- */
- switch(platform_subtype) {
- case HW_PLATFORM_SUBTYPE_UNKNOWN:
+ platform_hardware = board->platform_hw;
+
+ switch(platform_hardware) {
+ case HW_PLATFORM_SURF:
+ set_cdp_baseband(board);
break;
-
- default:
- dprintf(CRITICAL, "Platform Subtype : %u is not supported\n",platform_subtype);
- ASSERT(0);
- };
-
- switch(platform) {
- case APQ8084:
+ case HW_PLATFORM_MTP:
+ set_mtp_baseband(board);
+ break;
+ case HW_PLATFORM_RCM:
+ set_rcm_baseband(board);
+ break;
+ case HW_PLATFORM_LIQUID:
board->baseband = BASEBAND_APQ;
break;
default:
- dprintf(CRITICAL, "Platform type: %u is not supported\n",platform);
+ dprintf(CRITICAL, "Platform :%u is not supported\n",
+ platform_hardware);
ASSERT(0);
- }
+ };
}
unsigned target_baseband()
diff --git a/target/msm8226/init.c b/target/msm8226/init.c
index d33aa95..cc97909 100644
--- a/target/msm8226/init.c
+++ b/target/msm8226/init.c
@@ -462,6 +462,8 @@
dload_util_write_cookie(mode == NORMAL_DLOAD ?
DLOAD_MODE_ADDR : EMERGENCY_DLOAD_MODE_ADDR, mode);
+ pm8x41_clear_pmic_watchdog();
+
return 0;
}
diff --git a/target/msm8610/include/target/display.h b/target/msm8610/include/target/display.h
index 9f9f609..c6e93c4 100644
--- a/target/msm8610/include/target/display.h
+++ b/target/msm8610/include/target/display.h
@@ -102,7 +102,7 @@
#define msm8610_DSI_FEATURE_ENABLE 0
-#define MIPI_FB_ADDR 0x0D200000
+#define MIPI_FB_ADDR 0x03200000
#define MIPI_HSYNC_PULSE_WIDTH 8
#define MIPI_HSYNC_BACK_PORCH_DCLK 40