Merge "dev: qpnp_wled: Enable WLED PSM for AMOLED panels."
diff --git a/app/aboot/aboot.c b/app/aboot/aboot.c
old mode 100644
new mode 100755
index fab78a5..227b2fc
--- a/app/aboot/aboot.c
+++ b/app/aboot/aboot.c
@@ -1032,6 +1032,7 @@
return ret;
}
buf = (char *) memalign(CACHE_LINE, ROUNDUP(page_size, CACHE_LINE));
+ mmc_set_lun(partition_get_lun(index));
ASSERT(buf);
if (mmc_read(offset, (uint32_t *)buf, page_size))
{
@@ -1295,7 +1296,7 @@
}
#if VERIFIED_BOOT
- if(boot_verify_get_state() == ORANGE)
+ if((boot_verify_get_state() == ORANGE) && (!boot_into_ffbm))
{
#if FBCON_DISPLAY_MSG
display_bootverify_menu(DISPLAY_MENU_ORANGE);
@@ -1700,6 +1701,17 @@
return -1;
}
+ if(dt_entry.offset > (UINT_MAX - dt_entry.size)) {
+ dprintf(CRITICAL, "ERROR: Device tree contents are Invalid\n");
+ return -1;
+ }
+
+ /* Ensure we are not overshooting dt_size with the dt_entry selected */
+ if ((dt_entry.offset + dt_entry.size) > dt_size) {
+ dprintf(CRITICAL, "ERROR: Device tree contents are Invalid\n");
+ return -1;
+ }
+
best_match_dt_addr = (unsigned char *)table + dt_entry.offset;
dtb_size = dt_entry.size;
memmove((void *)hdr->tags_addr, (char *)best_match_dt_addr, dtb_size);
@@ -1968,6 +1980,9 @@
ptn_size = partition_get_size(index);
offset = ptn_size - blocksize;
+ /* Set Lun for partition */
+ mmc_set_lun(partition_get_lun(index));
+
if (mmc_read(ptn + offset, (void *)buf, blocksize))
{
dprintf(CRITICAL, "Reading MMC failed\n");
@@ -2002,6 +2017,7 @@
ptn = partition_get_offset(index);
ptn_size = partition_get_size(index);
offset = ptn_size - blocksize;
+ mmc_set_lun(partition_get_lun(index));
if (mmc_read(ptn + offset, (void *)buf, blocksize))
{
@@ -2417,6 +2433,7 @@
// Initialize boot state before trying to verify boot.img
#if VERIFIED_BOOT
boot_verifier_init();
+#endif
/* Handle overflow if the input image size is greater than
* boot image buffer can hold
*/
@@ -2425,7 +2442,6 @@
fastboot_fail("booimage: size is greater than boot image buffer can hold");
goto boot_failed;
}
-#endif
/* Verify the boot image
* device & page_size are initialized in aboot_init
diff --git a/app/aboot/mdtp_ui.c b/app/aboot/mdtp_ui.c
index ed14e65..72e4302 100644
--- a/app/aboot/mdtp_ui.c
+++ b/app/aboot/mdtp_ui.c
@@ -35,6 +35,8 @@
#include <string.h>
#include <display_menu.h>
#include <qtimer.h>
+#include <pm8x41.h>
+#include <platform.h>
#include "mdtp.h"
#include "mdtp_defs.h"
#include "mdtp_fs.h"
@@ -51,6 +53,7 @@
#define MDTP_MAX_IMAGE_SIZE (1183000) //size in bytes, includes some extra bytes since we round up to block size in read
#define RGB888_BLACK (0x000000)
#define BITS_PER_BYTE (8)
+#define POWER_KEY_LONG_PRESS (4000) // 4 seconds in milliseconds
#define CENTER_IMAGE_ON_X_AXIS(image_width,screen_width) (((screen_width)-(image_width))/2)
@@ -498,6 +501,7 @@
static void display_get_pin_interface(char *entered_pin, uint32_t pin_length)
{
uint32_t previous_position = 0, current_position = 0;
+ time_t pwrkey_press_timer = 0;
display_initial_screen(pin_length);
display_enter_pin();
@@ -512,6 +516,27 @@
while (1)
{
+ // Check if the power key is being pressed
+ if(pm8x41_get_pwrkey_is_pressed())
+ {
+ // Check if it is the first power key press event
+ if (pwrkey_press_timer == 0)
+ {
+ // Init reference time to first power key press event detected
+ pwrkey_press_timer = current_time();
+ }
+ // If the power key is being pressed long enough, shutdown the device
+ if ((current_time() - pwrkey_press_timer) >= POWER_KEY_LONG_PRESS){
+ dprintf(INFO, "Power key pressed - shutting down\n");
+ shutdown_device();
+ }
+ }
+ else
+ {
+ // Power key isn't being pressed, reset power key press reference time
+ pwrkey_press_timer = 0;
+ }
+
if (target_volume_up())
{
// current position is the OK button
diff --git a/app/tests/kauth_test.c b/app/tests/kauth_test.c
index e92922e..a4c8d01 100644
--- a/app/tests/kauth_test.c
+++ b/app/tests/kauth_test.c
@@ -73,6 +73,7 @@
#if !VERIFIED_BOOT
index = partition_get_index("system");
ptn = partition_get_offset(index);
+ mmc_set_lun(partition_get_lun(index));
if(!ptn)
{
diff --git a/dev/qpnp_haptic/qpnp_haptic.c b/dev/qpnp_haptic/qpnp_haptic.c
index 51de2e5..a4e3820 100644
--- a/dev/qpnp_haptic/qpnp_haptic.c
+++ b/dev/qpnp_haptic/qpnp_haptic.c
@@ -87,6 +87,9 @@
{
struct qpnp_hap vib_config = {0};
+ if(!target_is_pmi_enabled())
+ return;
+
get_vibration_type(&vib_config);
/* Configure the ACTUATOR TYPE register as ERM*/
pmic_spmi_reg_mask_write(QPNP_HAP_ACT_TYPE_REG,
@@ -149,6 +152,9 @@
/* Turn off vibrator */
void pm_vib_turn_off(void)
{
+ if(!target_is_pmi_enabled())
+ return;
+
/* Disable control register */
pmic_spmi_reg_mask_write(QPNP_HAP_EN_CTL_REG,
QPNP_HAP_PLAY_MASK, QPNP_HAP_PLAY_DIS);
diff --git a/dev/qpnp_wled/qpnp_wled.c b/dev/qpnp_wled/qpnp_wled.c
index 10a61b5..6161458 100644
--- a/dev/qpnp_wled/qpnp_wled.c
+++ b/dev/qpnp_wled/qpnp_wled.c
@@ -33,6 +33,7 @@
#include <qpnp_wled.h>
#include <pm8x41_wled.h>
#include <qtimer.h>
+#include <target.h>
static int qpnp_wled_avdd_target_voltages[NUM_SUPPORTED_AVDD_VOLTAGES] = {
7900, 7600, 7300, 6400, 6100, 5800,
@@ -600,6 +601,9 @@
int rc;
struct qpnp_wled *wled;
+ if(!target_is_pmi_enabled())
+ return ERR_NOT_FOUND;
+
wled = malloc(sizeof(struct qpnp_wled));
if (!wled)
return ERR_NO_MEMORY;
diff --git a/include/platform.h b/include/platform.h
index 2eaa95b..e29b006 100644
--- a/include/platform.h
+++ b/include/platform.h
@@ -85,5 +85,8 @@
void get_bootloader_version(unsigned char *buf);
void get_baseband_version(unsigned char *buf);
bool is_device_locked();
-bool platform_is_mdmcalifornium();
+bool platform_is_mdm9650();
+bool platform_is_sdxhedgehog();
+uint64_t platform_get_ddr_start();
+bool platform_is_glink_enabled();
#endif
diff --git a/include/target.h b/include/target.h
index d0d830d..a9a1eea 100644
--- a/include/target.h
+++ b/include/target.h
@@ -93,7 +93,9 @@
struct qmp_reg *target_get_qmp_settings();
int target_get_qmp_regsize();
+uint32_t target_ddr_cfg_reg();
+bool target_is_pmi_enabled(void);
#if PON_VIB_SUPPORT
void get_vibration_type();
#endif
diff --git a/platform/init.c b/platform/init.c
index 8280ffb..f429527 100644
--- a/platform/init.c
+++ b/platform/init.c
@@ -162,3 +162,14 @@
{
return SIGNATURE_SIZE;
}
+
+/* Check if glink is supported or not */
+__WEAK bool platform_is_glink_enabled()
+{
+#if GLINK_SUPPORT
+ return 1;
+#else
+ return 0;
+#endif
+}
+
diff --git a/platform/mdm9640/acpuclock.c b/platform/mdm9640/acpuclock.c
index d927fa6..74f86c9 100644
--- a/platform/mdm9640/acpuclock.c
+++ b/platform/mdm9640/acpuclock.c
@@ -106,15 +106,20 @@
clock_usb30_gdsc_enable();
- ret = clk_get_set_enable("usb30_master_clk", 125000000, 1);
+ if (platform_is_sdxhedgehog())
+ ret = clk_get_set_enable("usb30_master_clk_sdxhedgehog", 200000000, 1);
+ else
+ ret = clk_get_set_enable("usb30_master_clk", 125000000, 1);
if(ret)
{
dprintf(CRITICAL, "failed to set usb30_master_clk. ret = %d\n", ret);
ASSERT(0);
}
- if (platform_is_mdmcalifornium())
- ret = clk_get_set_enable("usb30_pipe_clk_mdmcalifornium", 0, 1);
+ if (platform_is_mdm9650())
+ ret = clk_get_set_enable("usb30_pipe_clk_mdm9650", 0, 1);
+ else if (platform_is_sdxhedgehog())
+ ret = clk_get_set_enable("usb30_pipe_clk_sdxhedgehog", 0, 1);
else
ret = clk_get_set_enable("usb30_pipe_clk", 19200000, 1);
@@ -131,7 +136,10 @@
ASSERT(0);
}
- ret = clk_get_set_enable("usb30_mock_utmi_clk", 60000000, true);
+ if (platform_is_sdxhedgehog())
+ ret = clk_get_set_enable("usb30_mock_utmi_clk_sdxhedgehog", 19200000, 1);
+ else
+ ret = clk_get_set_enable("usb30_mock_utmi_clk", 60000000, true);
if(ret)
{
dprintf(CRITICAL, "failed to set usb30_mock_utmi_clk ret = %d\n", ret);
@@ -175,7 +183,10 @@
int ret = 0;
char clk_name[64];
- snprintf(clk_name, sizeof(clk_name), "sdc%u_core_clk", interface);
+ if(platform_is_sdxhedgehog())
+ snprintf(clk_name, sizeof(clk_name), "sdc%u_core_clk_sdxhedgehog", interface);
+ else
+ snprintf(clk_name, sizeof(clk_name), "sdc%u_core_clk", interface);
if(freq == MMC_CLK_400KHZ)
{
@@ -210,7 +221,7 @@
{
int ret =0;
- if (platform_is_mdmcalifornium())
+ if (platform_is_mdm9650())
ret = clk_get_set_enable("usb30_pipe_clk", 0, true);
else
ret = clk_get_set_enable("usb30_pipe_clk", 125000000, true);
@@ -222,6 +233,9 @@
}
}
+/*
+ * This is the clock reset function for USB3
+ */
void clock_reset_usb_phy()
{
int ret;
@@ -237,8 +251,14 @@
phy_reset_clk = clk_get("usb30_phy_reset");
ASSERT(phy_reset_clk);
- pipe_reset_clk = clk_get("usb30_pipe_clk");
- ASSERT(pipe_reset_clk);
+ if(platform_is_sdxhedgehog()){
+ pipe_reset_clk = clk_get("usb30_pipe_clk_sdxhedgehog");
+ ASSERT(pipe_reset_clk);
+ }
+ else{
+ pipe_reset_clk = clk_get("usb30_pipe_clk");
+ ASSERT(pipe_reset_clk);
+ }
/* ASSERT */
ret = clk_reset(master_clk, CLK_RESET_ASSERT);
@@ -296,7 +316,7 @@
int ret;
char clk_name[64];
- if (platform_is_mdmcalifornium())
+ if (platform_is_mdm9650())
{
if (instance == 1)
rpm_send_data(&CE1_CLK[GENERIC_ENABLE][0], 24, RPM_REQUEST_TYPE);
@@ -357,7 +377,7 @@
struct clk *src_clk;
char clk_name[64];
- if (platform_is_mdmcalifornium())
+ if (platform_is_mdm9650())
{
if (instance == 1)
rpm_send_data(&CE1_CLK[GENERIC_DISABLE][0], 24, RPM_REQUEST_TYPE);
diff --git a/platform/mdm9640/include/platform/iomap.h b/platform/mdm9640/include/platform/iomap.h
index a55687c..6981256 100644
--- a/platform/mdm9640/include/platform/iomap.h
+++ b/platform/mdm9640/include/platform/iomap.h
@@ -219,4 +219,11 @@
/* Register for finding out if single ended or differential clock enablement */
#define TCSR_PHY_CLK_SCHEME_SEL 0x01956044
+/* RPM MSG RAM */
+#define RPM_SS_MSG_RAM_START_ADDRESS_BASE_PHYS 0x00060000
+#define RPM_SS_MSG_RAM_START_ADDRESS_BASE RPM_SS_MSG_RAM_START_ADDRESS_BASE_PHYS
+#define RPM_SS_MSG_RAM_START_ADDRESS_BASE_SIZE 0x00006000
+/* notify RPM via IPC interrupt*/
+#define APCS_HLOS_IPC_INTERRUPT_0 APCS_ALIAS0_IPC_INTERRUPT
+
#endif
diff --git a/platform/mdm9640/include/platform/irqs.h b/platform/mdm9640/include/platform/irqs.h
index a9e8fc5..b1d958b 100644
--- a/platform/mdm9640/include/platform/irqs.h
+++ b/platform/mdm9640/include/platform/irqs.h
@@ -47,6 +47,7 @@
#define SDCC1_PWRCTL_IRQ (GIC_SPI_START + 138)
+#define GLINK_IPC_IRQ (GIC_SPI_START + 168)
/* Retrofit universal macro names */
#define INT_USB_HS USB1_HS_IRQ
diff --git a/platform/mdm9640/mdm9640-clock.c b/platform/mdm9640/mdm9640-clock.c
index 8e26bcf..bc47cac 100644
--- a/platform/mdm9640/mdm9640-clock.c
+++ b/platform/mdm9640/mdm9640-clock.c
@@ -147,6 +147,46 @@
},
};
+static struct clk_freq_tbl ftbl_gcc_sdcc1_2_apps_clk_sdxhedgehog[] =
+{
+ F( 144000, cxo, 16, 3, 25),
+ F( 400000, cxo, 12, 1, 4),
+ F( 20000000, gpll0, 15, 1, 2),
+ F( 25000000, gpll0, 12, 1, 2),
+ F( 50000000, gpll0, 12, 0, 0),
+ F( 100000000, gpll0, 6, 0, 0),
+ F_END
+};
+
+static struct rcg_clk sdcc1_apps_clk_src_sdxhedgehog =
+{
+ .cmd_reg = (uint32_t *) SDCC1_CMD_RCGR,
+ .cfg_reg = (uint32_t *) SDCC1_CFG_RCGR,
+ .m_reg = (uint32_t *) SDCC1_M,
+ .n_reg = (uint32_t *) SDCC1_N,
+ .d_reg = (uint32_t *) SDCC1_D,
+
+ .set_rate = clock_lib2_rcg_set_rate_mnd,
+ .freq_tbl = ftbl_gcc_sdcc1_2_apps_clk_sdxhedgehog,
+ .current_freq = &rcg_dummy_freq,
+
+ .c = {
+ .dbg_name = "sdc1_clk",
+ .ops = &clk_ops_rcg_mnd,
+ },
+};
+
+static struct branch_clk gcc_sdcc1_apps_clk_sdxhedgehog =
+{
+ .cbcr_reg = (uint32_t *) SDCC1_APPS_CBCR,
+ .parent = &sdcc1_apps_clk_src_sdxhedgehog.c,
+
+ .c = {
+ .dbg_name = "gcc_sdcc1_apps_clk",
+ .ops = &clk_ops_branch,
+ },
+};
+
static struct branch_clk gcc_sdcc1_apps_clk =
{
.cbcr_reg = (uint32_t *) SDCC1_APPS_CBCR,
@@ -276,6 +316,34 @@
},
};
+static struct clk_freq_tbl ftbl_gcc_usb30_master_clk_sdxhedgehog[] =
+{
+ F(30000000, gpll0, 10, 0, 0),
+ F(60000000, gpll0, 5, 0, 0),
+ F(120000000, gpll0, 5, 0, 0),
+ F(171430000, gpll0, 3.5, 0, 0),
+ F(200000000, gpll0, 3, 0, 0),
+ F_END
+};
+
+static struct rcg_clk usb30_master_clk_src_sdxhedgehog =
+{
+ .cmd_reg = (uint32_t *) GCC_USB30_MASTER_CMD_RCGR,
+ .cfg_reg = (uint32_t *) GCC_USB30_MASTER_CFG_RCGR,
+ .m_reg = (uint32_t *) GCC_USB30_MASTER_M,
+ .n_reg = (uint32_t *) GCC_USB30_MASTER_N,
+ .d_reg = (uint32_t *) GCC_USB30_MASTER_D,
+
+ .set_rate = clock_lib2_rcg_set_rate_mnd,
+ .freq_tbl = ftbl_gcc_usb30_master_clk_sdxhedgehog,
+ .current_freq = &rcg_dummy_freq,
+
+ .c = {
+ .dbg_name = "usb30_master_clk_src_sdxhedgehog",
+ .ops = &clk_ops_rcg,
+ },
+};
+
static struct branch_clk gcc_usb30_master_clk =
{
.cbcr_reg = (uint32_t *) GCC_USB30_MASTER_CBCR,
@@ -288,6 +356,18 @@
},
};
+static struct branch_clk gcc_usb30_master_clk_sdxhedgehog =
+{
+ .cbcr_reg = (uint32_t *) GCC_USB30_MASTER_CBCR,
+ .bcr_reg = (uint32_t *) USB_30_BCR,
+ .parent = &usb30_master_clk_src_sdxhedgehog.c,
+
+ .c = {
+ .dbg_name = "gcc_usb30_master_clk_sdxhedgehog",
+ .ops = &clk_ops_branch,
+ },
+};
+
static struct clk_freq_tbl ftbl_gcc_usb30_pipe_clk[] = {
F( 19200000, cxo, 1, 0, 0),
F_EXT_SRC( 125000000, usb30_pipe, 1, 0, 0),
@@ -319,15 +399,27 @@
},
};
-
-static struct branch_clk gcc_usb30_pipe_clk_mdmcalifornium = {
+static struct branch_clk gcc_usb30_pipe_clk_sdxhedgehog = {
.bcr_reg = (uint32_t *) USB3_PIPE_BCR,
.cbcr_reg = (uint32_t *) USB3_PIPE_CBCR,
.has_sibling = 1,
.halt_check = 0,
.c = {
- .dbg_name = "usb30_pipe_clk_mdmcalifornium",
+ .dbg_name = "usb30_pipe_clk_sdxhedgehog",
+ .ops = &clk_ops_branch,
+ },
+};
+
+
+static struct branch_clk gcc_usb30_pipe_clk_mdm9650 = {
+ .bcr_reg = (uint32_t *) USB3_PIPE_BCR,
+ .cbcr_reg = (uint32_t *) USB3_PIPE_CBCR,
+ .has_sibling = 1,
+ .halt_check = 0,
+
+ .c = {
+ .dbg_name = "usb30_pipe_clk_mdm9650",
.ops = &clk_ops_branch,
},
};
@@ -451,6 +543,24 @@
},
};
+static struct clk_freq_tbl ftbl_gcc_usb30_mock_utmi_clk_src_sdxhedgehog[] = {
+ F( 19200000, cxo, 1, 0, 0),
+ F_END
+};
+
+static struct rcg_clk usb30_mock_utmi_clk_src_sdxhedgehog = {
+ .cmd_reg = (uint32_t *) USB30_MOCK_UTMI_CMD_RCGR,
+ .cfg_reg = (uint32_t *) USB30_MOCK_UTMI_CFG_RCGR,
+ .set_rate = clock_lib2_rcg_set_rate_hid,
+ .freq_tbl = ftbl_gcc_usb30_mock_utmi_clk_src_sdxhedgehog,
+ .current_freq = &rcg_dummy_freq,
+
+ .c = {
+ .dbg_name = "usb30_mock_utmi_clk_src_sdxhedgehog",
+ .ops = &clk_ops_rcg,
+ },
+};
+
static struct branch_clk gcc_usb30_mock_utmi_clk = {
.cbcr_reg = (uint32_t *) USB30_MOCK_UTMI_CBCR,
.has_sibling = 0,
@@ -462,6 +572,17 @@
},
};
+static struct branch_clk gcc_usb30_mock_utmi_clk_sdxhedgehog = {
+ .cbcr_reg = (uint32_t *) USB30_MOCK_UTMI_CBCR,
+ .has_sibling = 0,
+ .parent = &usb30_mock_utmi_clk_src_sdxhedgehog.c,
+
+ .c = {
+ .dbg_name = "usb30_mock_utmi_clk_sdxhedgehog",
+ .ops = &clk_ops_branch,
+ },
+};
+
static struct branch_clk gcc_usb30_sleep_clk = {
.cbcr_reg = (uint32_t *) USB30_SLEEP_CBCR,
.has_sibling = 1,
@@ -478,20 +599,24 @@
{
CLK_LOOKUP("sdc1_iface_clk", gcc_sdcc1_ahb_clk.c),
CLK_LOOKUP("sdc1_core_clk", gcc_sdcc1_apps_clk.c),
+ CLK_LOOKUP("sdc1_core_clk_sdxhedgehog", gcc_sdcc1_apps_clk_sdxhedgehog.c),
CLK_LOOKUP("uart3_iface_clk", gcc_blsp1_ahb_clk.c),
CLK_LOOKUP("uart3_core_clk", gcc_blsp1_uart3_apps_clk.c),
CLK_LOOKUP("usb30_iface_clk", gcc_sys_noc_usb30_axi_clk.c),
CLK_LOOKUP("usb30_master_clk", gcc_usb30_master_clk.c),
+ CLK_LOOKUP("usb30_master_clk_sdxhedgehog", gcc_usb30_master_clk_sdxhedgehog.c),
CLK_LOOKUP("usb30_pipe_clk", gcc_usb30_pipe_clk.c),
- CLK_LOOKUP("usb30_pipe_clk_mdmcalifornium", gcc_usb30_pipe_clk_mdmcalifornium.c),
+ CLK_LOOKUP("usb30_pipe_clk_mdm9650", gcc_usb30_pipe_clk_mdm9650.c),
+ CLK_LOOKUP("usb30_pipe_clk_sdxhedgehog", gcc_usb30_pipe_clk_sdxhedgehog.c),
CLK_LOOKUP("usb30_aux_clk", gcc_usb30_aux_clk.c),
CLK_LOOKUP("usb2b_phy_sleep_clk", gcc_usb2a_phy_sleep_clk.c),
CLK_LOOKUP("usb30_phy_reset", gcc_usb30_phy_reset.c),
CLK_LOOKUP("usb30_mock_utmi_clk", gcc_usb30_mock_utmi_clk.c),
+ CLK_LOOKUP("usb30_mock_utmi_clk_sdxhedgehog", gcc_usb30_mock_utmi_clk_sdxhedgehog.c),
CLK_LOOKUP("usb_phy_cfg_ahb_clk", gcc_usb_phy_cfg_ahb_clk.c),
CLK_LOOKUP("usb30_sleep_clk", gcc_usb30_sleep_clk.c),
CLK_LOOKUP("ce1_ahb_clk", gcc_ce1_ahb_clk.c),
diff --git a/platform/mdm9640/platform.c b/platform/mdm9640/platform.c
index f69053c..fb312cf 100644
--- a/platform/mdm9640/platform.c
+++ b/platform/mdm9640/platform.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2017, The Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
@@ -69,7 +69,6 @@
{MEMBASE, MEMBASE, MEMSIZE / MB, LK_MEMORY},
{MSM_IOMAP_BASE, MSM_IOMAP_BASE, MSM_IOMAP_SIZE, IOMAP_MEMORY},
{SCRATCH_REGION1, SCRATCH_REGION1, SCRATCH_REGION1_SIZE / MB, SCRATCH_MEMORY},
- {SCRATCH_REGION2, SCRATCH_REGION2, SCRATCH_REGION2_SIZE / MB, SCRATCH_MEMORY},
{KERNEL_REGION, KERNEL_REGION, KERNEL_REGION_SIZE / MB, SCRATCH_MEMORY},
};
@@ -157,7 +156,7 @@
}
-bool platform_is_mdmcalifornium()
+bool platform_is_mdm9650()
{
uint32_t platform_id = board_platform_id();
bool ret;
@@ -177,11 +176,29 @@
return ret;
}
+bool platform_is_sdxhedgehog()
+{
+ uint32_t platform_id = board_platform_id();
+ bool ret;
+
+ switch(platform_id)
+ {
+ case SDXHEDGEHOG1:
+ case SDXHEDGEHOG2:
+ ret = true;
+ break;
+ default:
+ ret = false;
+ };
+
+ return ret;
+}
+
uint32_t platform_boot_config()
{
uint32_t boot_config;
- if (platform_is_mdmcalifornium())
+ if (platform_is_mdm9650() || platform_is_sdxhedgehog())
boot_config = BOOT_CONFIG_REG_V2;
/* Else the platform is 9x45 */
else if (board_soc_version() >= 0x20000)
@@ -198,3 +215,10 @@
readl(USB3_PHY_REVISION_ID1) << 8 | readl(USB3_PHY_REVISION_ID0);
}
+bool platform_is_glink_enabled()
+{
+ if (platform_is_sdxhedgehog())
+ return 1;
+ else
+ return 0;
+}
diff --git a/platform/msm8952/include/platform/iomap.h b/platform/msm8952/include/platform/iomap.h
index 5b9bab8..6f4b28f 100644
--- a/platform/msm8952/include/platform/iomap.h
+++ b/platform/msm8952/include/platform/iomap.h
@@ -164,6 +164,7 @@
* and size in MB
*/
#define RPMB_SND_RCV_BUF 0xA0000000
+#define RPMB_SND_RCV_BUF_512 0x9FE00000
#define RPMB_SND_RCV_BUF_SZ 0x1
/* QSEECOM: Secure app region notification */
diff --git a/platform/msm8952/platform.c b/platform/msm8952/platform.c
index ab85001..77b8f8a 100644
--- a/platform/msm8952/platform.c
+++ b/platform/msm8952/platform.c
@@ -66,11 +66,22 @@
{ MSM_IOMAP_BASE, MSM_IOMAP_BASE, MSM_IOMAP_SIZE, IOMAP_MEMORY},
{ APPS_SS_BASE, APPS_SS_BASE, APPS_SS_SIZE, IOMAP_MEMORY},
{ MSM_SHARED_IMEM_BASE, MSM_SHARED_IMEM_BASE, 1, COMMON_MEMORY},
- { SCRATCH_ADDR, SCRATCH_ADDR, 511, SCRATCH_MEMORY},
+ { SCRATCH_ADDR, SCRATCH_ADDR, SCRATCH_SIZE, SCRATCH_MEMORY},
{ MIPI_FB_ADDR, MIPI_FB_ADDR, 20, COMMON_MEMORY},
{ RPMB_SND_RCV_BUF, RPMB_SND_RCV_BUF, RPMB_SND_RCV_BUF_SZ, IOMAP_MEMORY},
};
+static mmu_section_t mmu_section_table_512[] = {
+/* Physical addr, Virtual addr, Size (in MB), Flags */
+ { MEMBASE, MEMBASE, (MEMSIZE / MB), LK_MEMORY},
+ { MSM_IOMAP_BASE, MSM_IOMAP_BASE, MSM_IOMAP_SIZE, IOMAP_MEMORY},
+ { APPS_SS_BASE, APPS_SS_BASE, APPS_SS_SIZE, IOMAP_MEMORY},
+ { MSM_SHARED_IMEM_BASE, MSM_SHARED_IMEM_BASE, 1, COMMON_MEMORY},
+ { SCRATCH_ADDR_512, SCRATCH_ADDR_512, SCRATCH_SIZE_512, SCRATCH_MEMORY},
+ { MIPI_FB_ADDR, MIPI_FB_ADDR, 20, COMMON_MEMORY},
+ { RPMB_SND_RCV_BUF_512, RPMB_SND_RCV_BUF_512, RPMB_SND_RCV_BUF_SZ, IOMAP_MEMORY},
+};
+
void platform_early_init(void)
{
board_init();
@@ -111,9 +122,10 @@
{
uint32_t i;
uint32_t sections;
- uint32_t table_size = ARRAY_SIZE(mmu_section_table);
+ uint32_t table_size;
uint32_t ddr_start = get_ddr_start();
uint32_t smem_addr = platform_get_smem_base_addr();
+ mmu_section_t *table_addr;
/*Mapping the ddr start address for loading the kernel about 90 MB*/
sections = 90;
@@ -128,19 +140,32 @@
/* Configure the MMU page entries for memory read from the
mmu_section_table */
+ if(smem_get_ddr_size() > 0x20000000)
+ {
+ table_addr = mmu_section_table;
+ table_size = ARRAY_SIZE(mmu_section_table);
+ }
+ else
+ {
+ table_addr = mmu_section_table_512;
+ table_size = ARRAY_SIZE(mmu_section_table_512);
+ }
+
for (i = 0; i < table_size; i++)
{
- sections = mmu_section_table[i].num_of_sections;
+ sections = table_addr->num_of_sections;
while (sections--)
{
- arm_mmu_map_section(mmu_section_table[i].paddress +
+ arm_mmu_map_section(table_addr->paddress +
sections * MB,
- mmu_section_table[i].vaddress +
+ table_addr->vaddress +
sections * MB,
- mmu_section_table[i].flags);
+ table_addr->flags);
}
+ table_addr++;
}
+
}
addr_t platform_get_virt_to_phys_mapping(addr_t virt_addr)
diff --git a/platform/msm8996/include/platform/iomap.h b/platform/msm8996/include/platform/iomap.h
index 3a3b12b..bda214f 100644
--- a/platform/msm8996/include/platform/iomap.h
+++ b/platform/msm8996/include/platform/iomap.h
@@ -242,7 +242,7 @@
* as device memory, define the start address
* and size in MB
*/
-#define RPMB_SND_RCV_BUF 0x91C00000
+#define RPMB_SND_RCV_BUF 0x92100000
#define RPMB_SND_RCV_BUF_SZ 0x2
#define TCSR_BOOT_MISC_DETECT 0x007B3000
@@ -681,4 +681,10 @@
#define LPASS_LPAIF_RDDMA_BUFF_LEN0 0x0910D008
#define LPASS_LPAIF_RDDMA_PER_LEN0 0x0910D010
#define LPASS_LPAIF_DEBUG_CTL 0x0910000C
+
+#define DDR_START platform_get_ddr_start()
+#define ABOOT_FORCE_KERNEL_ADDR (DDR_START + 0x8000)
+#define ABOOT_FORCE_RAMDISK_ADDR (DDR_START + 0x2200000)
+#define ABOOT_FORCE_TAGS_ADDR (DDR_START + 0x2000000)
+#define ABOOT_FORCE_KERNEL64_ADDR (DDR_START + 0x80000)
#endif
diff --git a/platform/msm8996/platform.c b/platform/msm8996/platform.c
index 0542cdc..8ef3df2 100644
--- a/platform/msm8996/platform.c
+++ b/platform/msm8996/platform.c
@@ -68,7 +68,7 @@
/* Physical addr, Virtual addr, Mapping type , Size (in MB), Flags */
{ 0x00000000, 0x00000000, MMU_L2_NS_SECTION_MAPPING, 512, IOMAP_MEMORY},
{ MEMBASE, MEMBASE, MMU_L2_NS_SECTION_MAPPING, (MEMSIZE / MB), LK_MEMORY},
- { KERNEL_ADDR, KERNEL_ADDR, MMU_L2_NS_SECTION_MAPPING, KERNEL_SIZE, SCRATCH_MEMORY},
+ { MIPI_FB_ADDR, MIPI_FB_ADDR, MMU_L2_NS_SECTION_MAPPING, 40, LK_MEMORY},
{ SCRATCH_ADDR, SCRATCH_ADDR, MMU_L2_NS_SECTION_MAPPING, SCRATCH_SIZE, SCRATCH_MEMORY},
{ MSM_SHARED_BASE, MSM_SHARED_BASE, MMU_L2_NS_SECTION_MAPPING, MSM_SHARED_SIZE, COMMON_MEMORY},
{ RPMB_SND_RCV_BUF, RPMB_SND_RCV_BUF, MMU_L2_NS_SECTION_MAPPING, RPMB_SND_RCV_BUF_SZ, IOMAP_MEMORY},
@@ -115,6 +115,30 @@
{
int i;
int table_sz = ARRAY_SIZE(default_mmu_section_table);
+ mmu_section_t kernel_mmu_section_table;
+ uint64_t ddr_size = smem_get_ddr_size();
+
+ switch(ddr_size)
+ {
+ case MEM_4GB:
+ case MEM_3GB:
+ ddr_start = 0x80000000;
+ break;
+ case MEM_6GB:
+ ddr_start = 0x40000000;
+ break;
+ default:
+ dprintf(CRITICAL, "Unsupported ddr\n");
+ ASSERT(0);
+ };
+
+ kernel_mmu_section_table.paddress = ddr_start;
+ kernel_mmu_section_table.vaddress = ddr_start;
+ kernel_mmu_section_table.type = MMU_L2_NS_SECTION_MAPPING;
+ kernel_mmu_section_table.size = 88;
+ kernel_mmu_section_table.flags = SCRATCH_MEMORY;
+
+ arm_mmu_map_entry(&kernel_mmu_section_table);
/* Map default memory needed for lk , scratch, rpmb & iomap */
for (i = 0 ; i < table_sz; i++)
diff --git a/platform/msm_shared/bam.c b/platform/msm_shared/bam.c
index ef39321..6a2205e 100644
--- a/platform/msm_shared/bam.c
+++ b/platform/msm_shared/bam.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012,2015 The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012,2016 The Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
@@ -280,7 +280,7 @@
/* Function to add BAM descriptors for a given fifo.
* bam : BAM instance to be used.
- * data_ptr : Memory address for data transfer.
+ * data_ptr : Physical memory address for data transfer.
* data_len : Length of the data_ptr.
* flags : Flags to be set on the last desc added.
*
diff --git a/platform/msm_shared/boot_verifier.c b/platform/msm_shared/boot_verifier.c
index 7d22eb9..90cbfeb 100644
--- a/platform/msm_shared/boot_verifier.c
+++ b/platform/msm_shared/boot_verifier.c
@@ -341,6 +341,7 @@
}
verify_image_with_sig_error:
+ boot_verify_send_event(BOOTIMG_VERIFICATION_FAIL);
verify_image_with_sig_done:
return ret;
}
diff --git a/platform/msm_shared/crypto5_eng.c b/platform/msm_shared/crypto5_eng.c
index 0861cc8..933d30b 100644
--- a/platform/msm_shared/crypto5_eng.c
+++ b/platform/msm_shared/crypto5_eng.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2015, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2016, The Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
@@ -186,7 +186,7 @@
ret = bam_add_one_desc(&dev->bam,
CRYPTO_WRITE_PIPE_INDEX,
- (unsigned char*)start,
+ (unsigned char*)PA((addr_t)start),
ce_size,
BAM_DESC_CMD_FLAG | flags);
@@ -487,13 +487,12 @@
if(buffer)
{
arch_clean_invalidate_cache_range((addr_t) buffer, total_bytes_to_write);
-
- bam_status = ADD_WRITE_DESC(&dev->bam, buffer, total_bytes_to_write, wr_flags);
+ bam_status = ADD_WRITE_DESC(&dev->bam, (unsigned char*)PA((addr_t)buffer), total_bytes_to_write, wr_flags);
}
else
{
arch_clean_invalidate_cache_range((addr_t) data_ptr, total_bytes_to_write);
- bam_status = ADD_WRITE_DESC(&dev->bam, data_ptr, total_bytes_to_write, wr_flags);
+ bam_status = ADD_WRITE_DESC(&dev->bam, (unsigned char*)PA((addr_t)data_ptr), total_bytes_to_write, wr_flags);
}
if (bam_status)
diff --git a/platform/msm_shared/include/mmc_sdhci.h b/platform/msm_shared/include/mmc_sdhci.h
index 5461b49..c9d558c 100644
--- a/platform/msm_shared/include/mmc_sdhci.h
+++ b/platform/msm_shared/include/mmc_sdhci.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2015,2017, The Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
@@ -121,7 +121,7 @@
#define RST_N_FUNC_ENABLE BIT(0)
/* RPMB Related */
-#define RPMB_PART_MIN_SIZE (128 * 2014)
+#define RPMB_PART_MIN_SIZE (128 * 1024)
#define RPMB_SIZE_MULT 168
#define REL_WR_SEC_C 222
#define PARTITION_ACCESS_MASK 0x7
diff --git a/platform/msm_shared/include/mmu.h b/platform/msm_shared/include/mmu.h
index 9154066..f6579a4 100644
--- a/platform/msm_shared/include/mmu.h
+++ b/platform/msm_shared/include/mmu.h
@@ -32,6 +32,7 @@
#include <sys/types.h>
#include <arch/arm/mmu.h>
+#define MEM_6GB 0x180000000
#define MEM_4GB 0x100000000
#define MEM_3GB 0xC0000000
diff --git a/platform/msm_shared/include/qusb2_phy.h b/platform/msm_shared/include/qusb2_phy.h
index 1739d42..d446add 100644
--- a/platform/msm_shared/include/qusb2_phy.h
+++ b/platform/msm_shared/include/qusb2_phy.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2014-2017, The Linux Foundation. All rights reserved.
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
@@ -51,4 +51,19 @@
#define QUSB2PHY_PLL_STATUS (QUSB2_PHY_BASE + 0x00000038)
+/* QUSB2 PHY SDXHEDGEHOG */
+#define QUSB2PHY_PLL_ANALOG_CONTROLS_TWO_SDXHEDGEHOG (QUSB2_PHY_BASE + 0x4)
+#define QUSB2PHY_PLL_DIGITAL_TIMERS_TWO_SDXHEDGEHOG (QUSB2_PHY_BASE + 0xb4)
+#define QUSB2PHY_PLL_CLOCK_INVERTERS_SDXHEDGEHOG (QUSB2_PHY_BASE + 0x18c)
+#define QUSB2PHY_PLL_CMODE_SDXHEDGEHOG (QUSB2_PHY_BASE + 0x02c)
+#define QUSB2PHY_PLL_LOCK_DELAY_SDXHEDGEHOG (QUSB2_PHY_BASE + 0x90)
+#define QUSB2PHY_TUNE1_SDXHEDGEHOG (QUSB2_PHY_BASE + 0x23c)
+#define QUSB2PHY_TUNE2_SDXHEDGEHOG (QUSB2_PHY_BASE + 0x240)
+#define QUSB2PHY_IMP_CTRL1_SDXHEDGEHOG (QUSB2_PHY_BASE + 0x21c)
+#define QUSB2PHY_PWR_CTRL1_SDXHEDGEHOG (QUSB2_PHY_BASE + 0x210)
+#define QUSB2PHY_DEBUG_CTRL2_SDXHEDGEHOG (QUSB2_PHY_BASE + 0x278)
+#define QUSB2PHY_DEBUG_STAT5_SDXHEDGEHOG (QUSB2_PHY_BASE + 0x298)
+
+#define USB30_GENERAL_CFG_PIPE 0x08af8808
+
#endif
diff --git a/platform/msm_shared/mmc_sdhci.c b/platform/msm_shared/mmc_sdhci.c
index 12fb661..68ce54b 100644
--- a/platform/msm_shared/mmc_sdhci.c
+++ b/platform/msm_shared/mmc_sdhci.c
@@ -686,6 +686,9 @@
memset(card->ext_csd, 0, sizeof(card->ext_csd));
+ /* invalidate any cached buf data (controller updates main memory) */
+ arch_invalidate_cache_range((addr_t) card->ext_csd, 512);
+
memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
/* CMD8 */
@@ -770,10 +773,11 @@
uint32_t value = ((drv_type << 4) | MMC_HS200_TIMING);
if (MMC_CARD_MMC(card)) {
- if (card->ext_csd[MMC_EXT_MMC_DRV_STRENGTH] & (1 << drv_type))
+ if (card->ext_csd[MMC_EXT_MMC_DRV_STRENGTH] & (1 << drv_type)){
ret = mmc_switch_cmd(host, card, MMC_ACCESS_WRITE, MMC_EXT_MMC_HS_TIMING, value);
- if (!ret)
- drv_type_changed = true;
+ if (!ret)
+ drv_type_changed = true;
+ }
}
return drv_type_changed;
}
diff --git a/platform/msm_shared/qpic_nand.c b/platform/msm_shared/qpic_nand.c
index 3fec647..47d6d3a 100644
--- a/platform/msm_shared/qpic_nand.c
+++ b/platform/msm_shared/qpic_nand.c
@@ -1,7 +1,7 @@
/*
* Copyright (c) 2008, Google Inc.
* All rights reserved.
- * Copyright (c) 2009-2015, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2009-2016, The Linux Foundation. All rights reserved.
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
@@ -78,6 +78,7 @@
{0x1590aa98, 0x76, 0xFFFFFFFF, 0x0, 0x10000000, 0, 2048, 0x00020000, 0x80, 1},
{0x2690A32C, 0x64, 0xFFFFFFFF, 0x0, 0x20000000, 0, 4096, 0x00040000, 0xE0, 1},
{0x2690AC98, 0x81676, 0xFFFFFFFF, 0x0, 0x20000000, 0, 4096, 0x00040000, 0xE0, 1},
+ {0x1580a1c2, 0x02, 0xFFFFFFFF, 0xFF, 0x08000000, 0, 2048, 0x00020000, 0x40, 0},
/* Note: Width flag is 0 for 8 bit Flash and 1 for 16 bit flash */
};
@@ -141,7 +142,7 @@
/* Enqueue the desc for the above command */
bam_add_one_desc(&bam,
CMD_PIPE_INDEX,
- (unsigned char*)cmd_list_ptr,
+ (unsigned char*)PA((addr_t)cmd_list_ptr),
BAM_CE_SIZE,
BAM_DESC_CMD_FLAG | BAM_DESC_INT_FLAG | flags);
@@ -158,7 +159,7 @@
/* Enqueue the desc for the above command */
bam_add_one_desc(&bam,
CMD_PIPE_INDEX,
- (unsigned char*)cmd_list_ptr,
+ (unsigned char*)PA((addr_t)cmd_list_ptr),
BAM_CE_SIZE,
BAM_DESC_CMD_FLAG | BAM_DESC_INT_FLAG);
@@ -225,7 +226,7 @@
/* Prepare the cmd desc for the above commands */
bam_add_one_desc(&bam,
CMD_PIPE_INDEX,
- (unsigned char*)cmd_list_ptr_start,
+ (unsigned char*)PA((addr_t)cmd_list_ptr_start),
PA((uint32_t)cmd_list_ptr - (uint32_t)cmd_list_ptr_start),
BAM_DESC_LOCK_FLAG | BAM_DESC_INT_FLAG |
BAM_DESC_NWD_FLAG | BAM_DESC_CMD_FLAG);
@@ -428,7 +429,7 @@
/* Enqueue the desc for the above commands */
bam_add_one_desc(&bam,
CMD_PIPE_INDEX,
- (unsigned char*)cmd_list_ptr_start,
+ (unsigned char*)PA((addr_t)cmd_list_ptr_start),
PA((addr_t)(uint32_t)cmd_list_ptr - (uint32_t)cmd_list_ptr_start),
desc_flags);
@@ -479,7 +480,7 @@
/* Enqueue the desc for the above commands */
bam_add_one_desc(&bam,
CMD_PIPE_INDEX,
- (unsigned char*)cmd_list_ptr_start,
+ (unsigned char*)PA((addr_t)cmd_list_ptr_start),
PA((uint32_t)cmd_list_ptr - (uint32_t)cmd_list_ptr_start),
BAM_DESC_UNLOCK_FLAG | BAM_DESC_CMD_FLAG| BAM_DESC_INT_FLAG);
@@ -825,7 +826,7 @@
/* Enqueue the desc for the above commands */
bam_add_one_desc(&bam,
CMD_PIPE_INDEX,
- (unsigned char*)cmd_list_ptr_start,
+ (unsigned char*)PA((addr_t)cmd_list_ptr_start),
PA((uint32_t)cmd_list_ptr - (uint32_t)cmd_list_ptr_start),
desc_flags);
@@ -963,7 +964,7 @@
/* Enqueue the desc for the above commands */
bam_add_one_desc(&bam,
CMD_PIPE_INDEX,
- (unsigned char*)cmd_list_ptr_start,
+ (unsigned char*)PA((addr_t)cmd_list_ptr_start),
PA((uint32_t)cmd_list_ptr - (uint32_t)cmd_list_ptr_start),
BAM_DESC_NWD_FLAG | BAM_DESC_CMD_FLAG | BAM_DESC_INT_FLAG | BAM_DESC_LOCK_FLAG);
@@ -987,7 +988,7 @@
/* Enqueue the desc for the NAND_FLASH_STATUS read command */
bam_add_one_desc(&bam,
CMD_PIPE_INDEX,
- (unsigned char*)cmd_list_read_ptr_start,
+ (unsigned char*)PA((addr_t)cmd_list_read_ptr_start),
PA((uint32_t)cmd_list_read_ptr - (uint32_t)cmd_list_read_ptr_start),
BAM_DESC_CMD_FLAG) ;
@@ -996,7 +997,7 @@
/* Enqueue the desc for NAND_FLASH_STATUS and NAND_READ_STATUS write commands */
bam_add_one_desc(&bam,
CMD_PIPE_INDEX,
- (unsigned char*)cmd_list_ptr_start,
+ (unsigned char*)PA((addr_t)cmd_list_ptr_start),
PA((uint32_t)cmd_list_ptr - (uint32_t)cmd_list_ptr_start),
BAM_DESC_INT_FLAG | BAM_DESC_CMD_FLAG) ;
num_desc = 2;
@@ -1057,7 +1058,7 @@
/* Enqueue the desc for the above commands */
bam_add_one_desc(&bam,
CMD_PIPE_INDEX,
- (unsigned char*)cmd_list_ptr_start,
+ (unsigned char*)PA((addr_t)cmd_list_ptr_start),
PA((uint32_t)cmd_list_ptr - (uint32_t)cmd_list_ptr_start),
BAM_DESC_CMD_FLAG | BAM_DESC_LOCK_FLAG);
@@ -1075,7 +1076,7 @@
/* Enqueue the desc for the above commands */
bam_add_one_desc(&bam,
CMD_PIPE_INDEX,
- (unsigned char*)cmd_list_ptr_start,
+ (unsigned char*)PA((addr_t)cmd_list_ptr_start),
PA((uint32_t)cmd_list_ptr - (uint32_t)cmd_list_ptr_start),
BAM_DESC_NWD_FLAG | BAM_DESC_CMD_FLAG);
@@ -1087,7 +1088,7 @@
/* Enqueue the desc for the NAND_FLASH_STATUS read command */
bam_add_one_desc(&bam,
CMD_PIPE_INDEX,
- (unsigned char*)cmd_list_read_ptr_start,
+ (unsigned char*)PA((addr_t)cmd_list_read_ptr_start),
PA((uint32_t)cmd_list_read_ptr - (uint32_t)cmd_list_read_ptr_start),
BAM_DESC_CMD_FLAG);
@@ -1100,7 +1101,7 @@
/* Enqueue the desc for NAND_FLASH_STATUS and NAND_READ_STATUS write commands */
bam_add_one_desc(&bam,
CMD_PIPE_INDEX,
- (unsigned char*)cmd_list_ptr_start,
+ (unsigned char*)PA((addr_t)cmd_list_ptr_start),
PA((uint32_t)cmd_list_ptr - (uint32_t)cmd_list_ptr_start),
int_flag | BAM_DESC_CMD_FLAG);
num_desc += 2;
@@ -1532,7 +1533,7 @@
/* Enqueue the desc for the above commands */
bam_add_one_desc(&bam,
CMD_PIPE_INDEX,
- (unsigned char*)cmd_list_ptr_start,
+ (unsigned char*)PA((addr_t)cmd_list_ptr_start),
PA((uint32_t)cmd_list_ptr - (uint32_t)cmd_list_ptr_start),
BAM_DESC_NWD_FLAG | BAM_DESC_CMD_FLAG | flags);
num_cmd_desc++;
@@ -1735,7 +1736,7 @@
/* Enqueue the desc for the above commands */
bam_add_one_desc(&bam,
CMD_PIPE_INDEX,
- (unsigned char*)cmd_list_ptr_start,
+ (unsigned char*)PA((addr_t)cmd_list_ptr_start),
PA((uint32_t)cmd_list_ptr - (uint32_t)cmd_list_ptr_start),
BAM_DESC_NWD_FLAG | BAM_DESC_CMD_FLAG);
num_cmd_desc++;
diff --git a/platform/msm_shared/qusb2_phy.c b/platform/msm_shared/qusb2_phy.c
index 32beb52..14aa425 100644
--- a/platform/msm_shared/qusb2_phy.c
+++ b/platform/msm_shared/qusb2_phy.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2014-2016, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2014-2017, The Linux Foundation. All rights reserved.
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
@@ -49,7 +49,7 @@
return 0;
}
-__WEAK int platform_is_mdmcalifornium()
+__WEAK int platform_is_mdm9650()
{
return 0;
}
@@ -59,6 +59,11 @@
return 0;
}
+__WEAK int platform_is_sdxhedgehog()
+{
+ return 0;
+}
+
void qusb2_phy_reset(void)
{
uint32_t val;
@@ -66,6 +71,7 @@
uint8_t tune2 = 0xB3;
int retry = 100;
int se_clock = 1;
+ int status_reg = 0;
/* Disable the ref clock before phy reset */
#if GCC_RX2_USB2_CLKREF_EN
@@ -83,9 +89,19 @@
dmb();
/* set CLAMP_N_EN and stay with disabled USB PHY */
- writel(0x23, QUSB2PHY_PORT_POWERDOWN);
+ if(platform_is_sdxhedgehog())
+ writel(0x23, QUSB2PHY_PWR_CTRL1_SDXHEDGEHOG);
+ else
+ writel(0x23, QUSB2PHY_PORT_POWERDOWN);
- if (platform_is_msm8996() || platform_is_mdmcalifornium() || platform_is_msm8953())
+ /* TCSR register bit 0 indicates whether single ended clock
+ * or differential clock configuration is enabled. Based on the
+ * configuration set the PLL_TEST register.
+ */
+#if TCSR_PHY_CLK_SCHEME_SEL
+ se_clock = readl(TCSR_PHY_CLK_SCHEME_SEL) & 0x1;
+#endif
+ if (platform_is_msm8996() || platform_is_mdm9650() || platform_is_msm8953())
{
if(platform_is_msm8996sg())
writel(0xD0, QUSB2PHY_PORT_TUNE1);
@@ -115,6 +131,23 @@
writel(0x9F, QUSB2PHY_PLL_AUTOPGM_CTL1);
writel(0x00, QUSB2PHY_PLL_PWR_CTL);
}
+ else if (platform_is_sdxhedgehog())
+ {
+ /* HPG init sequence 0x13 for CML and 0x03 for CMOS */
+ if (se_clock)
+ writel(0x03, QUSB2PHY_PLL_ANALOG_CONTROLS_TWO_SDXHEDGEHOG);
+ else
+ writel(0x13, QUSB2PHY_PLL_ANALOG_CONTROLS_TWO_SDXHEDGEHOG);
+
+ writel(0x7C, QUSB2PHY_PLL_CLOCK_INVERTERS_SDXHEDGEHOG);
+ writel(0x80, QUSB2PHY_PLL_CMODE_SDXHEDGEHOG);
+ writel(0x0a, QUSB2PHY_PLL_LOCK_DELAY_SDXHEDGEHOG);
+ writel(0x19, QUSB2PHY_PLL_DIGITAL_TIMERS_TWO_SDXHEDGEHOG);
+ writel(0xa5, QUSB2PHY_TUNE1_SDXHEDGEHOG);
+ writel(0x09, QUSB2PHY_TUNE2_SDXHEDGEHOG);
+ writel(0x00, QUSB2PHY_IMP_CTRL1_SDXHEDGEHOG);
+ writel(0x22, QUSB2PHY_PWR_CTRL1_SDXHEDGEHOG);
+ }
else
{
/* Set HS impedance to 42ohms */
@@ -133,23 +166,26 @@
/* Enable ULPI mode */
if (platform_is_msm8994())
writel(0x0, QUSB2PHY_PORT_UTMI_CTRL2);
- /* set CLAMP_N_EN and USB PHY is enabled*/
- writel(0x22, QUSB2PHY_PORT_POWERDOWN);
- udelay(150);
- /* TCSR register bit 0 indicates whether single ended clock
- * or differential clock configuration is enabled. Based on the
- * configuration set the PLL_TEST register.
- */
-#if TCSR_PHY_CLK_SCHEME_SEL
- se_clock = readl(TCSR_PHY_CLK_SCHEME_SEL) & 0x1;
-#endif
+ /* set CLAMP_N_EN and USB PHY is enabled*/
+ if (platform_is_sdxhedgehog()){
+ writel(0x22, QUSB2PHY_PWR_CTRL1_SDXHEDGEHOG);
+ writel(0x04, QUSB2PHY_DEBUG_CTRL2_SDXHEDGEHOG);
+ udelay(88);
+ }
+ else{
+ writel(0x22, QUSB2PHY_PORT_POWERDOWN);
+ udelay(150);
+ }
+
/* By default consider differential clock configuration and if TCSR
* register bit 0 is not set then use single ended setting
*/
if (se_clock)
{
- writel(0x80, QUSB2PHY_PLL_TEST);
+ /* PLL TEST is not valid for sdxhedgehog */
+ if(!platform_is_sdxhedgehog())
+ writel(0x80, QUSB2PHY_PLL_TEST);
}
else
{
@@ -162,7 +198,14 @@
udelay(100);
/* Check PLL status */
- while (!(readl(QUSB2PHY_PLL_STATUS) & QUSB2PHY_PLL_LOCK))
+ if (platform_is_sdxhedgehog()){
+ status_reg = QUSB2PHY_DEBUG_STAT5_SDXHEDGEHOG;
+ }
+ else{
+ status_reg = QUSB2PHY_PLL_STATUS;
+ }
+
+ while (!(readl(status_reg) & QUSB2PHY_PLL_LOCK))
{
retry--;
if (!retry)
diff --git a/platform/msm_shared/rpm-ipc.c b/platform/msm_shared/rpm-ipc.c
index 2bd3c51..a8649db 100644
--- a/platform/msm_shared/rpm-ipc.c
+++ b/platform/msm_shared/rpm-ipc.c
@@ -30,11 +30,22 @@
#include <arch/defines.h>
#include <stdint.h>
#include <sys/types.h>
+#include <platform.h>
#include <rpm-ipc.h>
#include <rpm-glink.h>
#include <rpm-smd.h>
#include <string.h>
+__WEAK glink_err_type rpm_glink_send_data(uint32_t *data, uint32_t len, msg_type type)
+{
+ return GLINK_STATUS_API_NOT_SUPPORTED;
+}
+
+__WEAK int rpm_smd_send_data(uint32_t *data, uint32_t len, msg_type type)
+{
+ return -1;
+}
+
void fill_kvp_object(kvp_data **kdata, uint32_t *data, uint32_t len)
{
*kdata = (kvp_data *) memalign(CACHE_LINE, ROUNDUP(len, CACHE_LINE));
@@ -52,11 +63,13 @@
int rpm_send_data(uint32_t *data, uint32_t len, msg_type type)
{
int ret = 0;
-#ifdef GLINK_SUPPORT
- ret = rpm_glink_send_data(data, len, type);
-#else
- ret = rpm_smd_send_data(data, len, type);
-#endif
+
+ /* Runtime select to call glink or smd */
+ if (platform_is_glink_enabled())
+ ret = rpm_glink_send_data(data, len, type);
+ else
+ ret = rpm_smd_send_data(data, len, type);
+
return ret;
}
diff --git a/platform/msm_shared/rpmb/rpmb.c b/platform/msm_shared/rpmb/rpmb.c
index 984f580..41177ed 100644
--- a/platform/msm_shared/rpmb/rpmb.c
+++ b/platform/msm_shared/rpmb/rpmb.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2015,2017, The Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
@@ -66,10 +66,16 @@
((mmc_dev->card.ext_csd[MMC_EXT_CSD_EN_RPMB_REL_WR] & BIT(4)) == 0))
{
dprintf(SPEW, "EMMC Version >= 5.1 EN_RPMB_REL_WR = 0\n");
- // according to emmc version 5.1 and above if EN_RPMB_REL_WR in extended
- // csd is not set the maximum number of frames that can be reliably written
- // to emmc would be 2
- info.rel_wr_count = 2;
+ /*
+ * Some eMMC vendors violate eMMC 5.0 spec and set
+ * REL_WR_SEC_C register to 0x10 to indicate the
+ * ability of RPMB throughput improvement thus lead
+ * to failure when TZ module write data to RPMB
+ * partition. So check bit[4] of EXT_CSD[166] and
+ * if it is not set then change value of REL_WR_SEC_C
+ * to 0x1 directly ignoring value of EXT_CSD[222].
+ */
+ info.rel_wr_count = 1;
}
else
{
diff --git a/platform/msm_shared/rules.mk b/platform/msm_shared/rules.mk
index 7a9e688..e18a014 100755
--- a/platform/msm_shared/rules.mk
+++ b/platform/msm_shared/rules.mk
@@ -62,7 +62,6 @@
ifeq ($(ENABLE_GLINK_SUPPORT),1)
OBJS += \
- $(LOCAL_DIR)/rpm-ipc.o \
$(LOCAL_DIR)/glink/glink_api.o \
$(LOCAL_DIR)/glink/glink_core_if.o \
$(LOCAL_DIR)/glink/glink_core_internal.o \
@@ -76,6 +75,11 @@
$(LOCAL_DIR)/rpm-glink.o
endif
+ifneq ($(ENABLE_SMD_SUPPORT),1)
+OBJS += \
+ $(LOCAL_DIR)/rpm-ipc.o
+endif
+
ifeq ($(PLATFORM),msm8x60)
OBJS += $(LOCAL_DIR)/mipi_dsi.o \
$(LOCAL_DIR)/i2c_qup.o \
diff --git a/platform/msm_shared/scm.c b/platform/msm_shared/scm.c
index d5653b5..a0c3958 100644
--- a/platform/msm_shared/scm.c
+++ b/platform/msm_shared/scm.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2016, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2017, The Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
@@ -55,6 +55,15 @@
SCM_MASK_IRQS | \
((n) & 0xf))
+#define SECBOOT_FUSE_BIT 0
+#define SECBOOT_FUSE_SHK_BIT 1
+#define SECBOOT_FUSE_DEBUG_DISABLED_BIT 2
+#define SECBOOT_FUSE_ANTI_ROLLBACK_BIT 3
+#define SECBOOT_FUSE_FEC_ENABLED_BIT 4
+#define SECBOOT_FUSE_RPMB_ENABLED_BIT 5
+#define SECBOOT_FUSE_DEBUG_RE_ENABLED_BIT 6
+#define CHECK_BIT(var, pos) ((var) & (1 << (pos)))
+
/* SCM interface as per ARM spec present? */
bool scm_arm_support;
static bool scm_initialized;
@@ -1085,6 +1094,13 @@
// Memory passed to TZ should be algined to cache line
BUF_DMA_ALIGN(rand_buf, sizeof(uintptr_t));
+ // r_len must be less than or equal to sizeof(rand_buf) to avoid memory corruption.
+ if (r_len > sizeof(rand_buf))
+ {
+ dprintf(CRITICAL, "r_len is larger than sizeof(randbuf).");
+ return -1;
+ }
+
if (!is_scm_armv8_support())
{
data.out_buf = (uint8_t*) rand_buf;
@@ -1117,7 +1133,7 @@
}
//Copy back into the return buffer
- *rbuf = *rand_buf;
+ memscpy(rbuf, r_len, rand_buf, sizeof(rand_buf));
return ret;
}
@@ -1244,7 +1260,7 @@
return 0;
}
-static bool secure_boot_enabled = true;
+static bool secure_boot_enabled = false;
static bool wdog_debug_fuse_disabled = true;
void scm_check_boot_fuses()
@@ -1265,14 +1281,16 @@
resp[0] = scm_ret.x1;
}
-
- /* Parse Bit 0 and Bit 2 of the response */
- if(!ret) {
- /* Bit 0 - SECBOOT_ENABLE_CHECK */
- if(resp[0] & 0x1)
- secure_boot_enabled = false;
+ if (!ret) {
+ /* Check for secure device: Bit#0 = 0, Bit#1 = 0 Bit#2 = 0 , Bit#5 = 0 , Bit#6 = 1 */
+ if (!CHECK_BIT(resp[0], SECBOOT_FUSE_BIT) && !CHECK_BIT(resp[0], SECBOOT_FUSE_SHK_BIT) &&
+ !CHECK_BIT(resp[0], SECBOOT_FUSE_DEBUG_DISABLED_BIT) &&
+ !CHECK_BIT(resp[0], SECBOOT_FUSE_RPMB_ENABLED_BIT) &&
+ CHECK_BIT(resp[0], SECBOOT_FUSE_DEBUG_RE_ENABLED_BIT)) {
+ secure_boot_enabled = true;
+ }
/* Bit 2 - DEBUG_DISABLE_CHECK */
- if(resp[0] & 0x4)
+ if (CHECK_BIT(resp[0], SECBOOT_FUSE_DEBUG_DISABLED_BIT))
wdog_debug_fuse_disabled = false;
} else
dprintf(CRITICAL, "scm call to check secure boot fuses failed\n");
diff --git a/platform/msm_shared/sdhci_msm.c b/platform/msm_shared/sdhci_msm.c
index 1d4229a..3f6d460 100644
--- a/platform/msm_shared/sdhci_msm.c
+++ b/platform/msm_shared/sdhci_msm.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2017, The Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
@@ -556,7 +556,7 @@
DBG("\n CM_DLL_SDC4 Calibration Start\n");
/*1.Write the DDR config value to SDCC_HC_REG_DDR_CONFIG register*/
- REG_WRITE32(host, target_ddr_cfg_val(), SDCC_HC_REG_DDR_CONFIG);
+ REG_WRITE32(host, target_ddr_cfg_val(), target_ddr_cfg_reg());
/*2. Write DDR_CAL_EN to '1' */
REG_WRITE32(host, (REG_READ32(host, SDCC_HC_REG_DLL_CONFIG_2) | DDR_CAL_EN), SDCC_HC_REG_DLL_CONFIG_2);
@@ -812,11 +812,12 @@
/* Change the driver type & rerun tuning */
while(++drv_type <= MX_DRV_SUPPORTED_HS200)
{
- drv_type_changed = mmc_set_drv_type(host, card, drv_type);
- if (drv_type_changed)
- {
+ /* Marking driver type changed if we try to change it */
+ if(!drv_type_changed)
+ drv_type_changed = true;
+
+ if (mmc_set_drv_type(host, card, drv_type))
goto retry_tuning;
- }
}
}
diff --git a/platform/msm_shared/smem.c b/platform/msm_shared/smem.c
index 9ef0c18..47f7c29 100644
--- a/platform/msm_shared/smem.c
+++ b/platform/msm_shared/smem.c
@@ -50,6 +50,7 @@
[HW_PLATFORM_LIQUID] = "Liquid",
[HW_PLATFORM_DRAGON] = "Dragon",
[HW_PLATFORM_QRD] = "QRD",
+ [HW_PLATFORM_IPC] = "IPC",
[HW_PLATFORM_HRD] = "HRD",
[HW_PLATFORM_DTV] = "DTV",
[HW_PLATFORM_STP] = "STP",
diff --git a/platform/msm_shared/smem.h b/platform/msm_shared/smem.h
index e8af142..257fcb1 100644
--- a/platform/msm_shared/smem.h
+++ b/platform/msm_shared/smem.h
@@ -2,7 +2,7 @@
* Copyright (c) 2009, Google Inc.
* All rights reserved.
*
- * Copyright (c) 2009-2016, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2009-2017, The Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -459,6 +459,10 @@
MSM8996AU = 310,
APQ8096AU = 311,
APQ8096SG = 312,
+ SDXHEDGEHOG1 = 314,
+ SDXHEDGEHOG2 = 333,
+ MSM8909W = 300,
+ APQ8009W = 301
};
enum platform {
@@ -473,6 +477,7 @@
HW_PLATFORM_LIQUID = 9,
HW_PLATFORM_DRAGON = 10,
HW_PLATFORM_QRD = 11,
+ HW_PLATFORM_IPC = 12,
HW_PLATFORM_HRD = 13,
HW_PLATFORM_DTV = 14,
HW_PLATFORM_RUMI = 15,
@@ -493,12 +498,17 @@
HW_PLATFORM_SUBTYPE_CSFB = 1,
HW_PLATFORM_SUBTYPE_SVLTE1 = 2,
HW_PLATFORM_SUBTYPE_IOT = 2,
+ HW_PLATFORM_SUBTYPE_SNAP = 2,
+ HW_PLATFORM_SUBTYPE_SNAP_NOPMI = 3,
HW_PLATFORM_SUBTYPE_SVLTE2A = 3,
HW_PLATFORM_SUBTYPE_SGLTE = 6,
HW_PLATFORM_SUBTYPE_DSDA = 7,
HW_PLATFORM_SUBTYPE_DSDA2 = 8,
HW_PLATFORM_SUBTYPE_SGLTE2 = 9,
+ HW_PLATFORM_SUBTYPE_SWOC_TP_CIRC = 12,
HW_PLATFORM_SUBTYPE_POLARIS = 64,
+ HW_PLATFORM_SUBTYPE_SWOC_WEAR = 9,
+ HW_PLATFORM_SUBTYPE_SWOC_NOWGR_CIRC = 13,
HW_PLATFORM_SUBTYPE_32BITS = 0x7FFFFFFF
};
diff --git a/platform/msm_shared/usb30_udc.c b/platform/msm_shared/usb30_udc.c
index a2923f1..1e378bf 100644
--- a/platform/msm_shared/usb30_udc.c
+++ b/platform/msm_shared/usb30_udc.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2017, The Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
@@ -230,10 +230,6 @@
/* section 4.4.2: Initialization and configuration sequences */
- /* 1. UTMI Mux configuration */
- if (dev_info->t_usb_if->mux_config)
- dev_info->t_usb_if->mux_config();
-
/* 2. Put controller in reset */
dwc_reset(dwc, 1);
@@ -243,6 +239,10 @@
/* 3. Reset PHY */
phy_reset(wrapper, dev_info);
+ /* 3.1 UTMI Mux configuration */
+ if (dev_info->t_usb_if->mux_config)
+ dev_info->t_usb_if->mux_config();
+
/* 4. SS phy config */
if (!use_hsonly_mode())
usb_wrapper_ss_phy_configure(wrapper);
diff --git a/project/mdm9640.mk b/project/mdm9640.mk
index d72ee16..997f92c 100644
--- a/project/mdm9640.mk
+++ b/project/mdm9640.mk
@@ -50,6 +50,11 @@
DEFINES += SMD_SUPPORT=1
endif
+ENABLE_GLINK_SUPPORT := 1
+ifeq ($(ENABLE_GLINK_SUPPORT),1)
+DEFINES += GLINK_SUPPORT=1
+endif
+
# Reset USB clock from target code
DEFINES += USB_RESET_FROM_CLK=1
diff --git a/project/msm8952.mk b/project/msm8952.mk
index d7d74b9..b118e8f 100644
--- a/project/msm8952.mk
+++ b/project/msm8952.mk
@@ -23,9 +23,13 @@
ENABLE_SECAPP_LOADER := 1
ENABLE_RPMB_SUPPORT := 1
#enable fbcon display menu
+ifneq (,$(findstring DISPLAY_SPLASH_SCREEN,$(DEFINES)))
ENABLE_FBCON_DISPLAY_MSG := 1
-endif
-endif
+else
+ENABLE_FBCON_DISPLAY_MSG := 0
+endif #DISPLAY_SPLASH_SCREEN END
+endif #ENABLE_VBOOT_MOTA_SUPPORT END
+endif #VERIFIED_BOOT
@@ -99,6 +103,10 @@
DEFINES += WDOG_SUPPORT=1
endif
+ifeq ($(APPEND_CMDLINE),1)
+DEFINES += _APPEND_CMDLINE=1
+endif
+
#SCM call before entering DLOAD mode
DEFINES += PLATFORM_USE_SCM_DLOAD=1
diff --git a/project/msm8996.mk b/project/msm8996.mk
index de818bb..2147ba6 100644
--- a/project/msm8996.mk
+++ b/project/msm8996.mk
@@ -37,11 +37,6 @@
DEFINES += ABOOT_IGNORE_BOOT_HEADER_ADDRS=1
-DEFINES += ABOOT_FORCE_KERNEL_ADDR=0x80080000
-DEFINES += ABOOT_FORCE_RAMDISK_ADDR=0x82200000
-DEFINES += ABOOT_FORCE_TAGS_ADDR=0x82000000
-DEFINES += ABOOT_FORCE_KERNEL64_ADDR=0x80080000
-
DEFINES += USB_RESET_FROM_CLK=1
DEFINES += USE_BOOTDEV_CMDLINE=1
DEFINES += ENABLE_WBC=1
diff --git a/target/init.c b/target/init.c
index d5cfa92..ff2869b 100644
--- a/target/init.c
+++ b/target/init.c
@@ -242,12 +242,44 @@
{
}
+__WEAK bool target_is_pmi_enabled(void)
+{
+ return 1;
+}
+
/* Default CFG delay value */
__WEAK uint32_t target_ddr_cfg_val()
{
return DDR_CONFIG_VAL;
}
+/* Default CFG register value */
+uint32_t target_ddr_cfg_reg()
+{
+ uint32_t platform = board_platform_id();
+ uint32_t ret = SDCC_HC_REG_DDR_CONFIG;
+
+ switch(platform)
+ {
+ case MSM8937:
+ case MSM8940:
+ case APQ8037:
+ case MSM8917:
+ case MSM8920:
+ case MSM8217:
+ case MSM8617:
+ case APQ8017:
+ case MSM8953:
+ case APQ8053:
+ /* SDCC HC DDR CONFIG has shifted by 4 bytes for these platform */
+ ret += 4;
+ break;
+ default:
+ break;
+ }
+ return ret;
+}
+
#if PON_VIB_SUPPORT
void get_vibration_type(struct qpnp_hap *config)
{
@@ -331,8 +363,11 @@
case PMIC_IS_PMI8950:
case PMIC_IS_PMI8994:
case PMIC_IS_PMI8996:
- value = REG_READ(PMIC_SLAVE_ID|
- BAT_IF_BAT_PRES_STATUS);
+ if(target_is_pmi_enabled())
+ {
+ value = REG_READ(PMIC_SLAVE_ID|
+ BAT_IF_BAT_PRES_STATUS);
+ }
break;
default:
dprintf(CRITICAL, "ERROR: Couldn't get the pmic type\n");
@@ -364,10 +399,13 @@
case PMIC_IS_PMI8950:
case PMIC_IS_PMI8994:
case PMIC_IS_PMI8996:
- if (!pm_fg_usr_get_vbat(1, &vbat)) {
- vbat = vbat*1000; //uv
- } else {
- dprintf(CRITICAL, "ERROR: Get battery voltage failed!!!\n");
+ if(target_is_pmi_enabled())
+ {
+ if (!pm_fg_usr_get_vbat(1, &vbat)) {
+ vbat = vbat*1000; //uv
+ } else {
+ dprintf(CRITICAL, "ERROR: Get battery voltage failed!!!\n");
+ }
}
break;
default:
diff --git a/target/mdm9607/init.c b/target/mdm9607/init.c
index b59b7b9..4145588 100644
--- a/target/mdm9607/init.c
+++ b/target/mdm9607/init.c
@@ -257,6 +257,11 @@
int system_ptn_index = -1;
uint32_t buflen = strlen(UBI_CMDLINE) + strlen(" root=ubi0:rootfs ubi.mtd=") + sizeof(int) + 1; /* 1 byte for null character*/
+ if (!cmdline || !part ) {
+ dprintf(CRITICAL, "WARN: Invalid input param\n");
+ return -1;
+ }
+
*buf = (char *)malloc(buflen);
if(!(*buf)) {
dprintf(CRITICAL,"Unable to allocate memory for boot params\n");
diff --git a/target/mdm9640/init.c b/target/mdm9640/init.c
index 2429cb9..6eabed2 100644
--- a/target/mdm9640/init.c
+++ b/target/mdm9640/init.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2014-2016, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2014-2017, The Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
@@ -56,6 +56,7 @@
#include <boot_device.h>
#include <qmp_phy.h>
#include <crypto5_wrapper.h>
+#include <rpm-glink.h>
extern void smem_ptable_init(void);
extern void smem_add_modem_partitions(struct ptable *flash_ptable);
@@ -150,7 +151,15 @@
pmic_info_populate();
spmi_init(PMIC_ARB_CHANNEL_NUM, PMIC_ARB_OWNER_ID);
- rpm_smd_init();
+ if(!platform_is_sdxhedgehog())
+ {
+ rpm_smd_init();
+ }
+ else
+ {
+ /* Initialize Glink */
+ rpm_glink_init();
+ }
if (platform_boot_dev_isemmc()) {
target_sdc_init();
@@ -205,7 +214,7 @@
{
uint8_t reset_type = 0;
- if (platform_is_mdmcalifornium())
+ if (platform_is_mdm9650() || platform_is_sdxhedgehog())
{
/* Clear the boot partition select cookie to indicate
* its a normal reset and avoid going to download mode */
@@ -220,9 +229,9 @@
else
reset_type = PON_PSHOLD_HARD_RESET;
- if (platform_is_mdmcalifornium())
+ if (platform_is_mdm9650() || platform_is_sdxhedgehog())
{
- /* PMD9655 is the PMIC used for MDMcalifornium */
+ /* PMD9655 is the PMIC used for MDM9650 */
pm8x41_reset_configure(reset_type);
} else {
/* Configure PMIC for warm reset */
@@ -419,16 +428,51 @@
if (crypto_initialized())
crypto_eng_cleanup();
- rpm_smd_uninit();
+ if(!platform_is_sdxhedgehog())
+ {
+ rpm_smd_uninit();
+ }
+ else
+ {
+ /* Tear down glink channels */
+ rpm_glink_uninit();
+ }
+}
+void target_mux_configure(void)
+{
+ uint32_t val;
+ //USB30_GENERAL_CFG_PIPE_UTMI_CLK_DIS
+ val = readl(USB30_GENERAL_CFG_PIPE);
+ val = val | 0x100;
+ writel(val, USB30_GENERAL_CFG_PIPE);
+ udelay(100);
+
+ //USB30_GENERAL_CFG_PIPE_UTMI_CLK_SEL
+ val = readl(USB30_GENERAL_CFG_PIPE);
+ val = val | 0x1;
+ writel(val, USB30_GENERAL_CFG_PIPE);
+ udelay(100);
+
+ //USB30_GENERAL_CFG_PIPE3_PHYSTATUS_SW
+ val = readl(USB30_GENERAL_CFG_PIPE);
+ val = val | 0x8;
+ writel(val, USB30_GENERAL_CFG_PIPE);
+ udelay(100);
+
+ //USB30_GENERAL_CFG_PIPE_UTMI_CLK_ENABLE
+ val = readl(USB30_GENERAL_CFG_PIPE);
+ val = val & 0xfffffeff;
+ writel(val, USB30_GENERAL_CFG_PIPE);
+ udelay(100);
}
void target_usb_phy_reset(void)
{
- /* Reset sequence for californium is different from 9x40, use the reset sequence
+ /* Reset sequence for 9650 is different from 9x40, use the reset sequence
* from clock driver
*/
- if (platform_is_mdmcalifornium())
- clock_reset_usb_phy();
+ if (platform_is_mdm9650() || platform_is_sdxhedgehog())
+ clock_reset_usb_phy(); // This is the reset function for USB3
else
usb30_qmp_phy_reset();
@@ -443,7 +487,12 @@
ASSERT(t_usb_iface);
t_usb_iface->mux_config = NULL;
- t_usb_iface->phy_init = usb30_qmp_phy_init;
+ if (platform_is_sdxhedgehog()){
+ t_usb_iface->mux_config = target_mux_configure;
+ t_usb_iface->phy_init = NULL;
+ }
+ else
+ t_usb_iface->phy_init = usb30_qmp_phy_init;
t_usb_iface->phy_reset = target_usb_phy_reset;
t_usb_iface->clock_init = clock_usb30_init;
t_usb_iface->vbus_override = 1;
@@ -453,7 +502,7 @@
uint32_t target_override_pll()
{
- if (platform_is_mdmcalifornium())
+ if (platform_is_mdm9650() || platform_is_sdxhedgehog())
return 0;
else
return 1;
@@ -464,7 +513,7 @@
return board_hlos_subtype();
}
-/* QMP settings are different from californium when compared to v2.0/v1.0 hardware.
+/* QMP settings are different from 9650 when compared to v2.0/v1.0 hardware.
* Use the QMP settings from target code to keep the common driver clean
*/
struct qmp_reg qmp_settings[] =
@@ -560,7 +609,7 @@
struct qmp_reg *target_get_qmp_settings()
{
- if (platform_is_mdmcalifornium())
+ if (platform_is_mdm9650() || platform_is_sdxhedgehog())
return qmp_settings;
else
return NULL;
@@ -568,7 +617,7 @@
int target_get_qmp_regsize()
{
- if (platform_is_mdmcalifornium())
+ if (platform_is_mdm9650() || platform_is_sdxhedgehog())
return ARRAY_SIZE(qmp_settings);
else
return 0;
diff --git a/target/mdm9640/keypad.c b/target/mdm9640/keypad.c
index 2f637f1..a95375d 100644
--- a/target/mdm9640/keypad.c
+++ b/target/mdm9640/keypad.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, 2016, The Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
@@ -45,7 +45,7 @@
{
int ret;
- if (platform_is_mdmcalifornium())
+ if (platform_is_mdm9650() || platform_is_sdxhedgehog())
ret = pm8x41_resin_status();
else
{
diff --git a/target/mdm9640/meminfo.c b/target/mdm9640/meminfo.c
index 7516b42..d71630c 100644
--- a/target/mdm9640/meminfo.c
+++ b/target/mdm9640/meminfo.c
@@ -77,10 +77,10 @@
void *target_get_scratch_address(void)
{
- return ((void *) VA((addr_t)SCRATCH_REGION2));
+ return ((void *) VA((addr_t)SCRATCH_REGION1));
}
unsigned target_get_max_flash_size(void)
{
- return (SCRATCH_REGION2_SIZE);
+ return (SCRATCH_REGION1_SIZE);
}
diff --git a/target/msm8909/init.c b/target/msm8909/init.c
index 8318ca3..56aecd9 100644
--- a/target/msm8909/init.c
+++ b/target/msm8909/init.c
@@ -427,7 +427,8 @@
case APQ8009:
if ((board->platform_hw == HW_PLATFORM_MTP) &&
- (board->platform_subtype == HW_SUBTYPE_APQ_NOWGR))
+ ((board->platform_subtype == HW_SUBTYPE_APQ_NOWGR) ||
+ (board->platform_subtype == HW_PLATFORM_SUBTYPE_SWOC_NOWGR_CIRC)))
board->baseband = BASEBAND_APQ_NOWGR;
else
board->baseband = BASEBAND_APQ;
diff --git a/target/msm8952/init.c b/target/msm8952/init.c
index 77d685c..6dd3a75 100644
--- a/target/msm8952/init.c
+++ b/target/msm8952/init.c
@@ -84,6 +84,8 @@
#define RECOVERY_MODE 0x77665502
#define PON_SOFT_RB_SPARE 0x88F
+#define EXT4_CMDLINE " rootfstype=ext4 root=/dev/mmcblk0p"
+
#define CE1_INSTANCE 1
#define CE_EE 1
#define CE_FIFO_SIZE 64
@@ -292,21 +294,25 @@
spmi_init(PMIC_ARB_CHANNEL_NUM, PMIC_ARB_OWNER_ID);
- if(platform_is_msm8937() || platform_is_msm8917())
+ if(target_is_pmi_enabled())
{
- uint8_t pmi_rev = 0;
- uint32_t pmi_type = 0;
-
- pmi_type = board_pmic_target(1) & 0xffff;
- if(pmi_type == PMIC_IS_PMI8950)
+ if(platform_is_msm8937() || platform_is_msm8917())
{
- /* read pmic spare register for rev */
- pmi_rev = pmi8950_get_pmi_subtype();
- if(pmi_rev)
- board_pmi_target_set(1,pmi_rev);
+ uint8_t pmi_rev = 0;
+ uint32_t pmi_type = 0;
+
+ pmi_type = board_pmic_target(1) & 0xffff;
+ if(pmi_type == PMIC_IS_PMI8950)
+ {
+ /* read pmic spare register for rev */
+ pmi_rev = pmi8950_get_pmi_subtype();
+ if(pmi_rev)
+ board_pmi_target_set(1,pmi_rev);
+ }
}
}
+
target_keystatus();
target_sdc_init();
@@ -317,12 +323,14 @@
}
#if LONG_PRESS_POWER_ON
- shutdown_detect();
+ if(target_is_pmi_enabled())
+ shutdown_detect();
#endif
#if PON_VIB_SUPPORT
/* turn on vibrator to indicate that phone is booting up to end user */
- vib_timed_turn_on(VIBRATE_TIME);
+ if(target_is_pmi_enabled())
+ vib_timed_turn_on(VIBRATE_TIME);
#endif
if (target_use_signed_kernel())
@@ -492,7 +500,11 @@
else
reset_type = PON_PSHOLD_HARD_RESET;
- pm8994_reset_configure(reset_type);
+ if(target_is_pmi_enabled())
+ pm8994_reset_configure(reset_type);
+ else
+ pm8x41_reset_configure(reset_type);
+
ret = scm_halt_pmic_arbiter();
if (ret)
@@ -527,8 +539,12 @@
{
uint8_t pon_reason = pm8x41_get_pon_reason();
uint8_t is_cold_boot = pm8x41_get_is_cold_boot();
- bool usb_present_sts = !(USBIN_UV_RT_STS &
- pm8x41_reg_read(SMBCHG_USB_RT_STS));
+ bool usb_present_sts = 1; /* don't care by default */
+
+ if(target_is_pmi_enabled())
+ usb_present_sts = (!(USBIN_UV_RT_STS &
+ pm8x41_reg_read(SMBCHG_USB_RT_STS)));
+
dprintf(INFO, "%s : pon_reason is:0x%x cold_boot:%d usb_sts:%d\n", __func__,
pon_reason, is_cold_boot, usb_present_sts);
/* In case of fastboot reboot,adb reboot or if we see the power key
@@ -548,7 +564,8 @@
void target_uninit(void)
{
#if PON_VIB_SUPPORT
- turn_off_vib_early();
+ if(target_is_pmi_enabled())
+ turn_off_vib_early();
#endif
mmc_put_card_to_sleep(dev);
sdhci_mode_disable(&dev->host);
@@ -741,6 +758,53 @@
crypto_init_params(&ce_params);
}
+bool target_is_pmi_enabled(void)
+{
+ if(platform_is_msm8917() &&
+ (board_hardware_subtype() == HW_PLATFORM_SUBTYPE_SNAP_NOPMI))
+ return 0;
+ else
+ return 1;
+}
+
+#if _APPEND_CMDLINE
+int get_target_boot_params(const char *cmdline, const char *part, char **buf)
+{
+ int system_ptn_index = -1;
+ uint32_t buflen;
+ int ret = -1;
+
+ if (!cmdline || !part ) {
+ dprintf(CRITICAL, "WARN: Invalid input param\n");
+ return -1;
+ }
+
+ if (!strstr(cmdline, "root=/dev/ram")) /* This check is to handle kdev boot */
+ {
+ if (target_is_emmc_boot()) {
+ buflen = strlen(EXT4_CMDLINE) + sizeof(int) +1;
+ *buf = (char *)malloc(buflen);
+ if(!(*buf)) {
+ dprintf(CRITICAL,"Unable to allocate memory for boot params\n");
+ return -1;
+ }
+ /* Below is for emmc boot */
+ system_ptn_index = partition_get_index(part) + 1; /* Adding +1 as offsets for eMMC start at 1 and NAND at 0 */
+ if (system_ptn_index < 0) {
+ dprintf(CRITICAL,
+ "WARN: Cannot get partition index for %s\n", part);
+ free(*buf);
+ return -1;
+ }
+ snprintf(*buf, buflen, EXT4_CMDLINE"%d", system_ptn_index);
+ ret = 0;
+ }
+ }
+ /*in success case buf will be freed in the calling function of this*/
+ return ret;
+}
+#endif
+
uint32_t target_get_pmic()
{
return PMIC_IS_PMI8950;
diff --git a/target/msm8952/meminfo.c b/target/msm8952/meminfo.c
index bb23004..7d32c85 100644
--- a/target/msm8952/meminfo.c
+++ b/target/msm8952/meminfo.c
@@ -76,10 +76,16 @@
void *target_get_scratch_address(void)
{
- return ((void *)SCRATCH_ADDR);
+ if(smem_get_ddr_size() > 0x20000000)
+ return ((void *)SCRATCH_ADDR);
+ else
+ return ((void *)SCRATCH_ADDR_512);
}
unsigned target_get_max_flash_size(void)
{
- return (511 * 1024 * 1024);
+ if(smem_get_ddr_size() > 0x20000000)
+ return (SCRATCH_SIZE * 1024 * 1024);
+ else
+ return (SCRATCH_SIZE_512 * 1024 * 1024);
}
diff --git a/target/msm8952/rules.mk b/target/msm8952/rules.mk
index e6ecd1b..d50f8d9 100644
--- a/target/msm8952/rules.mk
+++ b/target/msm8952/rules.mk
@@ -13,6 +13,10 @@
BASE_ADDR := 0x80000000
SCRATCH_ADDR := 0xA0100000
+SCRATCH_ADDR_512 := 0x91400000
+
+SCRATCH_SIZE := 511
+SCRATCH_SIZE_512 := 234
DEFINES += DISPLAY_SPLASH_SCREEN=1
DEFINES += DISPLAY_TYPE_MIPI=1
@@ -36,7 +40,11 @@
MEMSIZE=$(MEMSIZE) \
MEMBASE=$(MEMBASE) \
BASE_ADDR=$(BASE_ADDR) \
- SCRATCH_ADDR=$(SCRATCH_ADDR)
+ SCRATCH_ADDR=$(SCRATCH_ADDR) \
+ SCRATCH_ADDR_512=$(SCRATCH_ADDR_512) \
+ SCRATCH_SIZE=$(SCRATCH_SIZE) \
+ SCRATCH_SIZE_512=$(SCRATCH_SIZE_512)
+
OBJS += \
diff --git a/target/msm8952/target_display.c b/target/msm8952/target_display.c
index bcbf1be..ee001bc 100644
--- a/target/msm8952/target_display.c
+++ b/target/msm8952/target_display.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -51,6 +51,13 @@
#include "include/display_resource.h"
#include "gcdb_display.h"
+#define TRULY_720P_VID_PANEL "truly_720p_video"
+#define TRULY_720P_CMD_PANEL "truly_720p_cmd"
+
+#define HDMI_ADV_PANEL_STRING "1:dsi:0:qcom,mdss_dsi_adv7533_1080p:1:none:cfg:single_dsi"
+#define TRULY_VID_PANEL_STRING "1:dsi:0:qcom,mdss_dsi_truly_720p_video:1:none:cfg:single_dsi"
+#define TRULY_CMD_PANEL_STRING "1:dsi:0:qcom,mdss_dsi_truly_720p_cmd:1:none:cfg:single_dsi"
+
/*---------------------------------------------------------------------------*/
/* GPIO configuration */
/*---------------------------------------------------------------------------*/
@@ -569,7 +576,55 @@
bool target_display_panel_node(char *pbuf, uint16_t buf_size)
{
- return gcdb_display_cmdline_arg(pbuf, buf_size);
+ int prefix_string_len = strlen(DISPLAY_CMDLINE_PREFIX);
+ bool ret = true;
+ struct oem_panel_data oem = mdss_dsi_get_oem_data();
+ uint32_t platform_subtype = board_hardware_subtype();
+
+ /* default to hdmi for apq iot */
+ if ((HW_PLATFORM_SUBTYPE_SNAP == platform_subtype) ||
+ (HW_PLATFORM_SUBTYPE_SNAP_NOPMI == platform_subtype)) {
+ if (!strcmp(oem.panel, "")) {
+ if (buf_size < (prefix_string_len +
+ strlen(HDMI_ADV_PANEL_STRING))) {
+ dprintf(CRITICAL, "HDMI command line argument \
+ is greater than buffer size\n");
+ return false;
+ }
+ strlcpy(pbuf, DISPLAY_CMDLINE_PREFIX, buf_size);
+ buf_size -= prefix_string_len;
+ pbuf += prefix_string_len;
+ strlcpy(pbuf, HDMI_ADV_PANEL_STRING, buf_size);
+ } else if (!strcmp(oem.panel, TRULY_720P_VID_PANEL)) {
+ if (buf_size < (prefix_string_len +
+ strlen(TRULY_VID_PANEL_STRING))) {
+ dprintf(CRITICAL, "TRULY VIDEO command line \
+ argument is greater than \
+ buffer size\n");
+ return false;
+ }
+ strlcpy(pbuf, DISPLAY_CMDLINE_PREFIX, buf_size);
+ buf_size -= prefix_string_len;
+ pbuf += prefix_string_len;
+ strlcpy(pbuf, TRULY_VID_PANEL_STRING, buf_size);
+ } else if (!strcmp(oem.panel, TRULY_720P_CMD_PANEL)) {
+ if (buf_size < (prefix_string_len +
+ strlen(TRULY_CMD_PANEL_STRING))) {
+ dprintf(CRITICAL, "TRULY CMD command line argument \
+ argument is greater than \
+ buffer size\n");
+ return false;
+ }
+ strlcpy(pbuf, DISPLAY_CMDLINE_PREFIX, buf_size);
+ buf_size -= prefix_string_len;
+ pbuf += prefix_string_len;
+ strlcpy(pbuf, TRULY_CMD_PANEL_STRING, buf_size);
+ }
+ } else {
+ ret = gcdb_display_cmdline_arg(pbuf, buf_size);
+ }
+
+ return ret;
}
void target_display_init(const char *panel_name)
@@ -577,6 +632,7 @@
struct oem_panel_data oem;
int32_t ret = 0;
uint32_t panel_loop = 0;
+ uint32_t platform_subtype = board_hardware_subtype();
set_panel_cmd_string(panel_name);
oem = mdss_dsi_get_oem_data();
@@ -590,6 +646,13 @@
return;
}
+ if ((HW_PLATFORM_SUBTYPE_SNAP == platform_subtype) ||
+ (HW_PLATFORM_SUBTYPE_SNAP_NOPMI == platform_subtype)) {
+ dprintf(INFO, "%s: Platform subtype %d\n",
+ __func__, platform_subtype);
+ return;
+ }
+
do {
target_force_cont_splash_disable(false);
ret = gcdb_display_init(oem.panel, MDP_REV_50, (void *)MIPI_FB_ADDR);
diff --git a/target/msm8996/init.c b/target/msm8996/init.c
index dc3186d..539d98d 100644
--- a/target/msm8996/init.c
+++ b/target/msm8996/init.c
@@ -44,6 +44,7 @@
#include <regulator.h>
#include <dev/keys.h>
#include <pm8x41.h>
+#include <pm8x41_hw.h>
#include <crypto5_wrapper.h>
#include <clock.h>
#include <partition_parser.h>
@@ -87,6 +88,13 @@
#define PMIC_ARB_CHANNEL_NUM 0
#define PMIC_ARB_OWNER_ID 0
+#define SMBCHG_USB_RT_STS 0x21310
+#define SMBCHG_DC_RT_STS 0x21410
+#define USBIN_UV_RT_STS BIT(0)
+#define USBIN_OV_RT_STS BIT(1)
+#define DCIN_UV_RT_STS BIT(0)
+#define DCIN_OV_RT_STS BIT(1)
+
enum
{
FUSION_I2S_MTP = 1,
@@ -255,8 +263,18 @@
uint32_t target_is_pwrkey_pon_reason()
{
uint8_t pon_reason = pm8950_get_pon_reason();
+
if (pm8x41_get_is_cold_boot() && ((pon_reason == KPDPWR_N) || (pon_reason == (KPDPWR_N|PON1))))
return 1;
+ else if (pon_reason == PON1)
+ {
+ /* DC charger is present or USB charger is present */
+ if (((USBIN_UV_RT_STS | USBIN_OV_RT_STS) & pm8x41_reg_read(SMBCHG_USB_RT_STS)) == 0 ||
+ ((DCIN_UV_RT_STS | DCIN_OV_RT_STS) & pm8x41_reg_read(SMBCHG_DC_RT_STS)) == 0)
+ return 0;
+ else
+ return 1;
+ }
else
return 0;
}
@@ -370,7 +388,8 @@
case HW_PLATFORM_MTP:
case HW_PLATFORM_FLUID:
case HW_PLATFORM_QRD:
- pm_appsbl_chg_check_weak_battery_status(1);
+ if(target_is_pmi_enabled())
+ pm_appsbl_chg_check_weak_battery_status(1);
break;
default:
/* Charging not supported */
diff --git a/target/msm8996/oem_panel.c b/target/msm8996/oem_panel.c
index 4cc81d1..6de8047 100644
--- a/target/msm8996/oem_panel.c
+++ b/target/msm8996/oem_panel.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -60,6 +60,8 @@
#include "include/panel_adv7533_1080p60.h"
#include "include/panel_adv7533_720p60.h"
#include "include/panel_hx8379a_truly_fwvga_video.h"
+#include "include/panel_truly_1080p_video.h"
+#include "include/panel_truly_1080p_cmd.h"
/*---------------------------------------------------------------------------*/
/* static panel selection variable */
@@ -77,6 +79,8 @@
ADV7533_1080P_VIDEO_PANEL,
ADV7533_720P_VIDEO_PANEL,
TRULY_FWVGA_VIDEO_PANEL,
+ TRULY_1080P_VIDEO_PANEL,
+ TRULY_1080P_CMD_PANEL,
UNKNOWN_PANEL
};
@@ -97,12 +101,15 @@
{"adv7533_1080p_video", ADV7533_1080P_VIDEO_PANEL},
{"adv7533_720p_video", ADV7533_720P_VIDEO_PANEL},
{"truly_fwvga_video", TRULY_FWVGA_VIDEO_PANEL},
+ {"truly_1080p_video", TRULY_1080P_VIDEO_PANEL},
+ {"truly_1080p_cmd", TRULY_1080P_CMD_PANEL},
};
#define TARGET_ADV7533_MAIN_INST_0 (0x3D)
#define TARGET_ADV7533_CEC_DSI_INST_0 (0x3E)
static uint32_t panel_id;
+#define TRULY_1080P_PANEL_ON_DELAY 40
int oem_panel_rotation()
{
@@ -117,6 +124,9 @@
} else if (panel_id == R69007_WQXGA_CMD_PANEL) {
/* needs extra delay to avoid unexpected artifacts */
mdelay(R69007_WQXGA_CMD_PANEL_ON_DELAY);
+ } else if (panel_id == TRULY_1080P_CMD_PANEL ||
+ panel_id == TRULY_1080P_VIDEO_PANEL) {
+ mdelay(TRULY_1080P_PANEL_ON_DELAY);
}
return NO_ERROR;
@@ -135,6 +145,63 @@
struct oem_panel_data *oem_data = mdss_dsi_get_oem_data_ptr();
switch (panel_id) {
+ case TRULY_1080P_VIDEO_PANEL:
+ pan_type = PANEL_TYPE_DSI;
+ panelstruct->paneldata = &truly_1080p_video_panel_data;
+ panelstruct->paneldata->panel_with_enable_gpio = 0;
+ panelstruct->panelres = &truly_1080p_video_panel_res;
+ panelstruct->color = &truly_1080p_video_color;
+ panelstruct->videopanel = &truly_1080p_video_video_panel;
+ panelstruct->commandpanel = &truly_1080p_video_command_panel;
+ panelstruct->state = &truly_1080p_video_state;
+ panelstruct->laneconfig = &truly_1080p_video_lane_config;
+ panelstruct->paneltiminginfo
+ = &truly_1080p_video_timing_info;
+ panelstruct->panelresetseq
+ = &truly_1080p_video_panel_reset_seq;
+ panelstruct->backlightinfo = &truly_1080p_video_backlight;
+ pinfo->mipi.panel_on_cmds
+ = truly_1080p_video_on_command;
+ pinfo->mipi.num_of_panel_on_cmds
+ = TRULY_1080P_VIDEO_ON_COMMAND;
+ pinfo->mipi.panel_off_cmds
+ = truly_1080p_video_off_command;
+ pinfo->mipi.num_of_panel_off_cmds
+ = TRULY_1080P_VIDEO_OFF_COMMAND;
+ memcpy(phy_db->timing,
+ truly_1080p_14nm_video_timings,
+ MAX_TIMING_CONFIG * sizeof(uint32_t));
+ pinfo->dfps.panel_dfps = truly_1080p_video_dfps;
+ pinfo->mipi.signature = TRULY_1080P_VIDEO_SIGNATURE;
+ break;
+ case TRULY_1080P_CMD_PANEL:
+ pan_type = PANEL_TYPE_DSI;
+ panelstruct->paneldata = &truly_1080p_cmd_panel_data;
+ panelstruct->paneldata->panel_with_enable_gpio = 0;
+ panelstruct->panelres = &truly_1080p_cmd_panel_res;
+ panelstruct->color = &truly_1080p_cmd_color;
+ panelstruct->videopanel = &truly_1080p_cmd_video_panel;
+ panelstruct->commandpanel = &truly_1080p_cmd_command_panel;
+ panelstruct->state = &truly_1080p_cmd_state;
+ panelstruct->laneconfig = &truly_1080p_cmd_lane_config;
+ panelstruct->paneltiminginfo
+ = &truly_1080p_cmd_timing_info;
+ panelstruct->panelresetseq
+ = &truly_1080p_cmd_panel_reset_seq;
+ panelstruct->backlightinfo = &truly_1080p_cmd_backlight;
+ pinfo->mipi.panel_on_cmds
+ = truly_1080p_cmd_on_command;
+ pinfo->mipi.num_of_panel_on_cmds
+ = TRULY_1080P_CMD_ON_COMMAND;
+ pinfo->mipi.panel_off_cmds
+ = truly_1080p_cmd_off_command;
+ pinfo->mipi.num_of_panel_off_cmds
+ = TRULY_1080P_CMD_OFF_COMMAND;
+ memcpy(phy_db->timing,
+ truly_1080p_14nm_cmd_timings,
+ MAX_TIMING_CONFIG * sizeof(uint32_t));
+ pinfo->mipi.signature = TRULY_1080P_CMD_SIGNATURE;
+ break;
case SHARP_WQXGA_DUALDSI_VIDEO_PANEL:
pan_type = PANEL_TYPE_DSI;
pinfo->lcd_reg_en = 0;
diff --git a/target/msm8996/rules.mk b/target/msm8996/rules.mk
index a261eb5..a9d5093 100644
--- a/target/msm8996/rules.mk
+++ b/target/msm8996/rules.mk
@@ -8,13 +8,13 @@
PLATFORM := msm8996
-MEMBASE := 0x91800000 # SDRAM
+MEMBASE := 0x91D00000 # SDRAM
MEMSIZE := 0x00400000 # 4MB
BASE_ADDR := 0x0000000
-SCRATCH_ADDR := 0x91E00000
-SCRATCH_SIZE := 738
+SCRATCH_ADDR := 0x92300000
+SCRATCH_SIZE := 733
KERNEL_ADDR := 0x80000000
KERNEL_SIZE := 88
@@ -51,8 +51,6 @@
BASE_ADDR=$(BASE_ADDR) \
TAGS_ADDR=$(TAGS_ADDR) \
RAMDISK_ADDR=$(RAMDISK_ADDR) \
- KERNEL_ADDR=$(KERNEL_ADDR) \
- KERNEL_SIZE=$(KERNEL_SIZE) \
SCRATCH_ADDR=$(SCRATCH_ADDR) \
SCRATCH_SIZE=$(SCRATCH_SIZE) \
L1_PT_SZ=$(L1_PT_SZ) \