| /* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions are met: |
| * * Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * * Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * * Neither the name of The Linux Foundation nor |
| * the names of its contributors may be used to endorse or promote |
| * products derived from this software without specific prior written |
| * permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| * IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
| * NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR |
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| * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; |
| * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, |
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| * |
| */ |
| |
| #ifndef __IRQS_MDM9640_H |
| #define __IRQS_MDM9640_H |
| |
| /* TBD: The numbers need to be reviewed */ |
| |
| /* 0-15: STI/SGI (software triggered/generated interrupts) |
| * 16-31: PPI (private peripheral interrupts) |
| * 32+: SPI (shared peripheral interrupts) |
| */ |
| |
| #define GIC_PPI_START 16 |
| #define GIC_SPI_START 32 |
| |
| #define INT_QTMR_FRM_0_PHYSICAL_TIMER_EXP (GIC_SPI_START + 7) |
| |
| #define USB1_HS_IRQ (GIC_SPI_START + 134) |
| |
| #define USB30_EE1_IRQ (GIC_SPI_START + 131) |
| |
| #define SDCC1_PWRCTL_IRQ (GIC_SPI_START + 138) |
| |
| #define GLINK_IPC_IRQ (GIC_SPI_START + 168) |
| /* Retrofit universal macro names */ |
| #define INT_USB_HS USB1_HS_IRQ |
| |
| #define EE0_KRAIT_HLOS_SPMI_PERIPH_IRQ (GIC_SPI_START + 190) |
| |
| #define NR_MSM_IRQS 256 |
| #define NR_GPIO_IRQS 173 |
| #define NR_BOARD_IRQS 0 |
| |
| #define NR_IRQS (NR_MSM_IRQS + NR_GPIO_IRQS + \ |
| NR_BOARD_IRQS) |
| #define SMD_IRQ (GIC_SPI_START + 168) |
| #endif /* __IRQS_9640_H */ |