Merge change I5dcc8279
* changes:
[platform/msm7x30]: Fix the Debug timer clock divider value according to hardware version.
diff --git a/platform/msm7x30/include/platform/iomap.h b/platform/msm7x30/include/platform/iomap.h
index a0bdb43..fd107b3 100644
--- a/platform/msm7x30/include/platform/iomap.h
+++ b/platform/msm7x30/include/platform/iomap.h
@@ -44,8 +44,9 @@
#define MSM_GCC_BASE 0xC0182000
#if defined(PLATFORM_MSM7X30)
-#define MSM_SHARED_BASE 0x00100000
+#define MSM_SHARED_BASE 0x00100000
+#define HW_REVISION_NUMBER 0xABC00270
#else
-#define MSM_SHARED_BASE 0x01F00000
+#define MSM_SHARED_BASE 0x01F00000
#endif
#endif
diff --git a/platform/msm_shared/timer.c b/platform/msm_shared/timer.c
index 31cc6ff..b249b23 100644
--- a/platform/msm_shared/timer.c
+++ b/platform/msm_shared/timer.c
@@ -60,6 +60,7 @@
#define DGT_ENABLE_CLR_ON_MATCH_EN 2
#define DGT_ENABLE_EN 1
#define DGT_CLEAR DGT_REG(0x000C)
+#define DGT_CLK_CTL DGT_REG(0x0010)
#else
#define GPT_REG(off) (MSM_GPT_BASE + (off))
@@ -98,6 +99,14 @@
platform_timer_callback callback,
void *arg, time_t interval)
{
+#ifdef PLATFORM_MSM7X30
+ unsigned val = 0;
+ unsigned mask = (0x1 << 28);
+ //Check for the hardware revision
+ val = readl(HW_REVISION_NUMBER);
+ if(val & mask)
+ writel(1, DGT_CLK_CTL);
+#endif
enter_critical_section();
timer_callback = callback;