target: msm8952: Add display support for msm8952 target
Add display support in LK with continuous splash screen
for msm8952 target with GCDB and DSI auto PLL.
Change-Id: Iacba58a8f80ac903d6a1f8189f0963a3995eb6bd
diff --git a/target/msm8952/init.c b/target/msm8952/init.c
index 3e6afd9..6a96351 100644
--- a/target/msm8952/init.c
+++ b/target/msm8952/init.c
@@ -55,6 +55,8 @@
#include <sdhci_msm.h>
#include <clock.h>
+#include "target/display.h"
+
#if LONG_PRESS_POWER_ON
#include <shutdown_detect.h>
#endif
@@ -434,6 +436,31 @@
ulpi_write(ULPI_MISC_A_VBUSVLDEXTSEL | ULPI_MISC_A_VBUSVLDEXT, ULPI_MISC_A_CLEAR);
}
+static uint8_t splash_override;
+/* Returns 1 if target supports continuous splash screen. */
+int target_cont_splash_screen()
+{
+ uint8_t splash_screen = 0;
+ if (!splash_override) {
+ switch (board_hardware_id()) {
+ case HW_PLATFORM_MTP:
+ case HW_PLATFORM_SURF:
+ splash_screen = 1;
+ break;
+ default:
+ splash_screen = 0;
+ break;
+ }
+ dprintf(SPEW, "Target_cont_splash=%d\n", splash_screen);
+ }
+ return splash_screen;
+}
+
+void target_force_cont_splash_disable(uint8_t override)
+{
+ splash_override = override;
+}
+
/* Do any target specific intialization needed before entering fastboot mode */
void target_fastboot_init(void)
{
diff --git a/target/msm8952/oem_panel.c b/target/msm8952/oem_panel.c
new file mode 100644
index 0000000..b47f2e3
--- /dev/null
+++ b/target/msm8952/oem_panel.c
@@ -0,0 +1,186 @@
+/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <debug.h>
+#include <string.h>
+#include <err.h>
+#include <smem.h>
+#include <msm_panel.h>
+#include <board.h>
+#include <mipi_dsi.h>
+#include <target/display.h>
+
+#include "include/panel.h"
+#include "panel_display.h"
+
+/*---------------------------------------------------------------------------*/
+/* GCDB Panel Database */
+/*---------------------------------------------------------------------------*/
+#include "include/panel_truly_1080p_video.h"
+
+/*---------------------------------------------------------------------------*/
+/* static panel selection variable */
+/*---------------------------------------------------------------------------*/
+enum {
+ TRULY_1080P_VIDEO_PANEL,
+ UNKNOWN_PANEL
+};
+
+uint32_t panel_regulator_settings[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+};
+
+/*
+ * The list of panels that are supported on this target.
+ * Any panel in this list can be selected using fastboot oem command.
+ */
+static struct panel_list supp_panels[] = {
+ {"truly_1080p_video", TRULY_1080P_VIDEO_PANEL},
+};
+
+static uint32_t panel_id;
+
+int oem_panel_rotation()
+{
+ return NO_ERROR;
+}
+
+int oem_panel_on()
+{
+ /*
+ *OEM can keep their panel specific on instructions in this
+ *function
+ */
+ return NO_ERROR;
+}
+
+int oem_panel_off()
+{
+ /* OEM can keep their panel specific off instructions
+ * in this function
+ */
+ return NO_ERROR;
+}
+
+static int init_panel_data(struct panel_struct *panelstruct,
+ struct msm_panel_info *pinfo,
+ struct mdss_dsi_phy_ctrl *phy_db)
+{
+ int pan_type = PANEL_TYPE_DSI;
+
+ switch (panel_id) {
+ case TRULY_1080P_VIDEO_PANEL:
+ panelstruct->paneldata = &truly_1080p_video_panel_data;
+ panelstruct->paneldata->panel_with_enable_gpio = 1;
+ panelstruct->panelres = &truly_1080p_video_panel_res;
+ panelstruct->color = &truly_1080p_video_color;
+ panelstruct->videopanel = &truly_1080p_video_video_panel;
+ panelstruct->commandpanel = &truly_1080p_video_command_panel;
+ panelstruct->state = &truly_1080p_video_state;
+ panelstruct->laneconfig = &truly_1080p_video_lane_config;
+ panelstruct->paneltiminginfo
+ = &truly_1080p_video_timing_info;
+ panelstruct->panelresetseq
+ = &truly_1080p_video_panel_reset_seq;
+ panelstruct->backlightinfo = &truly_1080p_video_backlight;
+ pinfo->mipi.panel_on_cmds
+ = truly_1080p_video_on_command;
+ pinfo->mipi.num_of_panel_on_cmds
+ = TRULY_1080P_VIDEO_ON_COMMAND;
+ pinfo->mipi.panel_off_cmds
+ = truly_1080p_video_off_command;
+ pinfo->mipi.num_of_panel_off_cmds
+ = TRULY_1080P_VIDEO_OFF_COMMAND;
+ memcpy(phy_db->timing,
+ truly_1080p_video_timings, TIMING_SIZE);
+ pinfo->mipi.signature = TRULY_1080P_VIDEO_SIGNATURE;
+ break;
+ case UNKNOWN_PANEL:
+ default:
+ memset(panelstruct, 0, sizeof(struct panel_struct));
+ memset(pinfo->mipi.panel_on_cmds, 0,
+ sizeof(struct mipi_dsi_cmd));
+ pinfo->mipi.num_of_panel_on_cmds = 0;
+ memset(pinfo->mipi.panel_off_cmds, 0,
+ sizeof(struct mipi_dsi_cmd));
+ pinfo->mipi.num_of_panel_off_cmds = 0;
+ memset(phy_db->timing, 0, TIMING_SIZE);
+ pan_type = PANEL_TYPE_UNKNOWN;
+ break;
+ }
+ return pan_type;
+}
+
+int oem_panel_select(const char *panel_name, struct panel_struct *panelstruct,
+ struct msm_panel_info *pinfo,
+ struct mdss_dsi_phy_ctrl *phy_db)
+{
+ uint32_t hw_id = board_hardware_id();
+ int32_t panel_override_id;
+
+ if (panel_name) {
+ panel_override_id = panel_name_to_id(supp_panels,
+ ARRAY_SIZE(supp_panels), panel_name);
+
+ if (panel_override_id < 0) {
+ dprintf(CRITICAL, "Not able to search the panel:%s\n",
+ panel_name + strspn(panel_name, " "));
+ } else if (panel_override_id < UNKNOWN_PANEL) {
+ /* panel override using fastboot oem command */
+ panel_id = panel_override_id;
+
+ dprintf(INFO, "OEM panel override:%s\n",
+ panel_name + strspn(panel_name, " "));
+ goto panel_init;
+ }
+ }
+
+ switch (hw_id) {
+ case HW_PLATFORM_MTP:
+ panel_id = TRULY_1080P_VIDEO_PANEL;
+ break;
+ case HW_PLATFORM_SURF:
+ panel_id = TRULY_1080P_VIDEO_PANEL;
+ break;
+ default:
+ dprintf(CRITICAL, "Display not enabled for %d HW type\n",
+ hw_id);
+ return PANEL_TYPE_UNKNOWN;
+ }
+
+panel_init:
+ /*
+ * Update all data structures after 'panel_init' label. Only panel
+ * selection is supposed to happen before that.
+ */
+ memcpy(panel_regulator_settings,
+ dcdc_regulator_settings, REGULATOR_SIZE);
+ pinfo->pipe_type = MDSS_MDP_PIPE_TYPE_RGB;
+ return init_panel_data(panelstruct, pinfo, phy_db);
+}
diff --git a/target/msm8952/rules.mk b/target/msm8952/rules.mk
index 86cc7fc..cbec585 100644
--- a/target/msm8952/rules.mk
+++ b/target/msm8952/rules.mk
@@ -11,6 +11,7 @@
BASE_ADDR := 0x80000000
SCRATCH_ADDR := 0x90000000
+DEFINES += DISPLAY_SPLASH_SCREEN=1
DEFINES += DISPLAY_TYPE_MIPI=1
DEFINES += DISPLAY_TYPE_DSI6G=1
@@ -19,7 +20,8 @@
lib/ptable \
dev/pmic/pm8x41 \
lib/libfdt \
- dev/qpnp_wled
+ dev/qpnp_wled \
+ dev/gcdb/display
DEFINES += \
MEMSIZE=$(MEMSIZE) \
@@ -30,7 +32,9 @@
OBJS += \
$(LOCAL_DIR)/init.o \
- $(LOCAL_DIR)/meminfo.o
+ $(LOCAL_DIR)/meminfo.o \
+ $(LOCAL_DIR)/target_display.o \
+ $(LOCAL_DIR)/oem_panel.o
ifeq ($(ENABLE_SMD_SUPPORT),1)
OBJS += \
$(LOCAL_DIR)/regulator.o
diff --git a/target/msm8952/target_display.c b/target/msm8952/target_display.c
new file mode 100644
index 0000000..23976fd
--- /dev/null
+++ b/target/msm8952/target_display.c
@@ -0,0 +1,415 @@
+/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <debug.h>
+#include <string.h>
+#include <smem.h>
+#include <err.h>
+#include <msm_panel.h>
+#include <mipi_dsi.h>
+#include <pm8x41.h>
+#include <pm8x41_wled.h>
+#include <qpnp_wled.h>
+#include <board.h>
+#include <mdp5.h>
+#include <scm.h>
+#include <regulator.h>
+#include <platform/clock.h>
+#include <platform/gpio.h>
+#include <platform/iomap.h>
+#include <target/display.h>
+#include <qtimer.h>
+
+#include "include/panel.h"
+#include "include/display_resource.h"
+#include "gcdb_display.h"
+
+/*---------------------------------------------------------------------------*/
+/* GPIO configuration */
+/*---------------------------------------------------------------------------*/
+static struct gpio_pin reset_gpio = {
+ "msmgpio", 0, 3, 1, 0, 1
+};
+
+static struct gpio_pin enable_gpio = {
+ "msmgpio", 90, 3, 1, 0, 1
+};
+
+static struct gpio_pin bkl_gpio = {
+ "msmgpio", 91, 3, 1, 0, 1
+};
+
+#define VCO_DELAY_USEC 1000
+#define GPIO_STATE_LOW 0
+#define GPIO_STATE_HIGH 2
+#define RESET_GPIO_SEQ_LEN 3
+#define PMIC_WLED_SLAVE_ID 3
+
+static void mdss_dsi_uniphy_pll_sw_reset_8952(uint32_t pll_base)
+{
+ writel(0x01, pll_base + 0x0068); /* PLL TEST CFG */
+ mdelay(1);
+ writel(0x00, pll_base + 0x0068); /* PLL TEST CFG */
+ mdelay(1);
+}
+
+static void dsi_pll_toggle_lock_detect_8952(uint32_t pll_base)
+{
+ writel(0x04, pll_base + 0x0064); /* LKDetect CFG2 */
+ udelay(1);
+ writel(0x05, pll_base + 0x0064); /* LKDetect CFG2 */
+ udelay(512);
+}
+
+static void dsi_pll_sw_reset_8952(uint32_t pll_base)
+{
+ writel(0x01, pll_base + 0x0068); /* PLL TEST CFG */
+ udelay(1);
+ writel(0x00, pll_base + 0x0068); /* PLL TEST CFG */
+}
+
+static uint32_t gf_1_dsi_pll_enable_sequence_8952(uint32_t pll_base)
+{
+ uint32_t rc;
+
+ dsi_pll_sw_reset_8952(pll_base);
+
+ /*
+ * Add hardware recommended delays between register writes for
+ * the updates to take effect. These delays are necessary for the
+ * PLL to successfully lock
+ */
+ writel(0x14, pll_base + 0x0070); /* CAL CFG1*/
+ writel(0x01, pll_base + 0x0020); /* GLB CFG */
+ writel(0x05, pll_base + 0x0020); /* GLB CFG */
+ udelay(3);
+ writel(0x0f, pll_base + 0x0020); /* GLB CFG */
+ udelay(500);
+
+ dsi_pll_toggle_lock_detect_8952(pll_base);
+ rc = readl(pll_base + 0x00c0) & 0x01;
+
+ return rc;
+}
+
+static uint32_t gf_2_dsi_pll_enable_sequence_8952(uint32_t pll_base)
+{
+ uint32_t rc;
+
+ dsi_pll_sw_reset_8952(pll_base);
+
+ /*
+ * Add hardware recommended delays between register writes for
+ * the updates to take effect. These delays are necessary for the
+ * PLL to successfully lock
+ */
+ writel(0x04, pll_base + 0x0070); /* CAL CFG1*/
+ writel(0x01, pll_base + 0x0020); /* GLB CFG */
+ writel(0x05, pll_base + 0x0020); /* GLB CFG */
+ udelay(3);
+ writel(0x0f, pll_base + 0x0020); /* GLB CFG */
+ udelay(500);
+
+ dsi_pll_toggle_lock_detect_8952(pll_base);
+ rc = readl(pll_base + 0x00c0) & 0x01;
+
+ return rc;
+}
+
+static uint32_t tsmc_dsi_pll_enable_sequence_8952(uint32_t pll_base)
+{
+ uint32_t rc;
+
+ dsi_pll_sw_reset_8952(pll_base);
+ /*
+ * Add hardware recommended delays between register writes for
+ * the updates to take effect. These delays are necessary for the
+ * PLL to successfully lock
+ */
+
+ writel(0x34, pll_base + 0x0070); /* CAL CFG1*/
+ writel(0x01, pll_base + 0x0020); /* GLB CFG */
+ writel(0x05, pll_base + 0x0020); /* GLB CFG */
+ writel(0x0f, pll_base + 0x0020); /* GLB CFG */
+ udelay(500);
+
+ dsi_pll_toggle_lock_detect_8952(pll_base);
+ rc = readl(pll_base + 0x00c0) & 0x01;
+
+ return rc;
+}
+
+
+static uint32_t dsi_pll_enable_seq_8952(uint32_t pll_base)
+{
+ uint32_t pll_locked = 0;
+ uint32_t counter = 0;
+
+ do {
+ pll_locked = tsmc_dsi_pll_enable_sequence_8952(pll_base);
+
+ dprintf(SPEW, "TSMC pll locked status is %d\n", pll_locked);
+ ++counter;
+ } while (!pll_locked && (counter < 3));
+
+ if(!pll_locked) {
+ counter = 0;
+ do {
+ pll_locked = gf_1_dsi_pll_enable_sequence_8952(pll_base);
+
+ dprintf(SPEW, "GF P1 pll locked status is %d\n", pll_locked);
+ ++counter;
+ } while (!pll_locked && (counter < 3));
+ }
+
+ if(!pll_locked) {
+ counter = 0;
+ do {
+ pll_locked = gf_2_dsi_pll_enable_sequence_8952(pll_base);
+
+ dprintf(SPEW, "GF P2 pll locked status is %d\n", pll_locked);
+ ++counter;
+ } while (!pll_locked && (counter < 3));
+ }
+
+ return pll_locked;
+}
+
+static int msm8952_wled_backlight_ctrl(uint8_t enable)
+{
+ uint8_t slave_id = PMIC_WLED_SLAVE_ID; /* pmi */
+
+ pm8x41_wled_config_slave_id(slave_id);
+ qpnp_wled_enable_backlight(enable);
+ qpnp_ibb_enable(enable);
+ return NO_ERROR;
+}
+
+int target_backlight_ctrl(struct backlight *bl, uint8_t enable)
+{
+ uint32_t ret = NO_ERROR;
+
+ if (bl->bl_interface_type == BL_DCS)
+ return ret;
+
+ ret = msm8952_wled_backlight_ctrl(enable);
+
+ return ret;
+}
+
+int target_panel_clock(uint8_t enable, struct msm_panel_info *pinfo)
+{
+ int32_t ret = 0;
+ struct mdss_dsi_pll_config *pll_data;
+ dprintf(SPEW, "target_panel_clock\n");
+
+ pll_data = pinfo->mipi.dsi_pll_config;
+ pll_data->vco_delay = VCO_DELAY_USEC;
+
+ if (enable) {
+ mdp_gdsc_ctrl(enable);
+ mdss_bus_clocks_enable();
+ mdp_clock_enable();
+ ret = restore_secure_cfg(SECURE_DEVICE_MDSS);
+ if (ret) {
+ dprintf(CRITICAL,
+ "%s: Failed to restore MDP security configs",
+ __func__);
+ mdp_clock_disable();
+ mdss_bus_clocks_disable();
+ mdp_gdsc_ctrl(0);
+ return ret;
+ }
+ mdss_dsi_uniphy_pll_sw_reset_8952(DSI0_PLL_BASE);
+ mdss_dsi_auto_pll_config(pinfo->mipi.pll_0_base,
+ pinfo->mipi.ctl_base, pll_data);
+ if (!dsi_pll_enable_seq_8952(pinfo->mipi.pll_0_base))
+ dprintf(CRITICAL, "Not able to enable the pll\n");
+ gcc_dsi_clocks_enable(pll_data->pclk_m, pll_data->pclk_n,
+ pll_data->pclk_d);
+ } else if(!target_cont_splash_screen()) {
+ gcc_dsi_clocks_disable();
+ mdp_clock_disable();
+ mdss_bus_clocks_disable();
+ mdp_gdsc_ctrl(enable);
+ }
+
+ return 0;
+}
+
+int target_panel_reset(uint8_t enable, struct panel_reset_sequence *resetseq,
+ struct msm_panel_info *pinfo)
+{
+ int ret = NO_ERROR;
+
+ if (enable) {
+ if (pinfo->mipi.use_enable_gpio) {
+ gpio_tlmm_config(enable_gpio.pin_id, 0,
+ enable_gpio.pin_direction, enable_gpio.pin_pull,
+ enable_gpio.pin_strength,
+ enable_gpio.pin_state);
+
+ gpio_set_dir(enable_gpio.pin_id, 2);
+ }
+
+ gpio_tlmm_config(bkl_gpio.pin_id, 0,
+ bkl_gpio.pin_direction, bkl_gpio.pin_pull,
+ bkl_gpio.pin_strength, bkl_gpio.pin_state);
+
+ gpio_set_dir(bkl_gpio.pin_id, 2);
+
+ gpio_tlmm_config(reset_gpio.pin_id, 0,
+ reset_gpio.pin_direction, reset_gpio.pin_pull,
+ reset_gpio.pin_strength, reset_gpio.pin_state);
+
+ gpio_set_dir(reset_gpio.pin_id, 2);
+
+ /* reset */
+ for (int i = 0; i < RESET_GPIO_SEQ_LEN; i++) {
+ if (resetseq->pin_state[i] == GPIO_STATE_LOW)
+ gpio_set_dir(reset_gpio.pin_id, GPIO_STATE_LOW);
+ else
+ gpio_set_dir(reset_gpio.pin_id, GPIO_STATE_HIGH);
+ mdelay(resetseq->sleep[i]);
+ }
+ } else if(!target_cont_splash_screen()) {
+ gpio_set_dir(reset_gpio.pin_id, 0);
+ if (pinfo->mipi.use_enable_gpio)
+ gpio_set_dir(enable_gpio.pin_id, 0);
+ }
+
+ return ret;
+}
+
+static void wled_init(struct msm_panel_info *pinfo)
+{
+ struct qpnp_wled_config_data config = {0};
+ struct labibb_desc *labibb;
+ int display_type = 0;
+
+ labibb = pinfo->labibb;
+
+ if (labibb)
+ display_type = labibb->amoled_panel;
+
+ config.display_type = display_type;
+ config.lab_init_volt = 4600000; /* fixed, see pmi register */
+ config.ibb_init_volt = 1400000; /* fixed, see pmi register */
+
+ if (labibb && labibb->force_config) {
+ config.lab_min_volt = labibb->lab_min_volt;
+ config.lab_max_volt = labibb->lab_max_volt;
+ config.ibb_min_volt = labibb->ibb_min_volt;
+ config.ibb_max_volt = labibb->ibb_max_volt;
+ config.pwr_up_delay = labibb->pwr_up_delay;
+ config.pwr_down_delay = labibb->pwr_down_delay;
+ config.ibb_discharge_en = labibb->ibb_discharge_en;
+ } else {
+ /* default */
+ config.pwr_up_delay = 3;
+ config.pwr_down_delay = 3;
+ config.ibb_discharge_en = 1;
+ if (display_type) { /* amoled */
+ config.lab_min_volt = 4600000;
+ config.lab_max_volt = 4600000;
+ config.ibb_min_volt = 4000000;
+ config.ibb_max_volt = 4000000;
+ } else { /* lcd */
+ config.lab_min_volt = 5500000;
+ config.lab_max_volt = 5500000;
+ config.ibb_min_volt = 5500000;
+ config.ibb_max_volt = 5500000;
+ }
+ }
+
+ dprintf(SPEW, "%s: %d %d %d %d %d %d %d %d %d %d\n", __func__,
+ config.display_type,
+ config.lab_min_volt, config.lab_max_volt,
+ config.ibb_min_volt, config.ibb_max_volt,
+ config.lab_init_volt, config.ibb_init_volt,
+ config.pwr_up_delay, config.pwr_down_delay,
+ config.ibb_discharge_en);
+
+ /* QPNP WLED init for display backlight */
+ pm8x41_wled_config_slave_id(PMIC_WLED_SLAVE_ID);
+
+ qpnp_wled_init(&config);
+}
+
+int target_ldo_ctrl(uint8_t enable, struct msm_panel_info *pinfo)
+{
+
+ if (enable) {
+ regulator_enable(REG_LDO2 | REG_LDO6 | REG_LDO17);
+ mdelay(10);
+ wled_init(pinfo);
+ qpnp_ibb_enable(true); /*5V boost*/
+ mdelay(50);
+ } else {
+ regulator_disable(REG_LDO2 | REG_LDO6 | REG_LDO17);
+ }
+
+ return NO_ERROR;
+}
+
+bool target_display_panel_node(char *panel_name, char *pbuf, uint16_t buf_size)
+{
+ return gcdb_display_cmdline_arg(panel_name, pbuf, buf_size);
+}
+
+void target_display_init(const char *panel_name)
+{
+ char cont_splash = '\0';
+
+ set_panel_cmd_string(panel_name, &cont_splash);
+ panel_name += strspn(panel_name, " ");
+
+ if (!strcmp(panel_name, NO_PANEL_CONFIG)
+ || !strcmp(panel_name, SIM_VIDEO_PANEL)
+ || !strcmp(panel_name, SIM_CMD_PANEL)) {
+ dprintf(INFO, "Selected panel: %s\nSkip panel configuration\n",
+ panel_name);
+ return;
+ }
+
+ if (gcdb_display_init(panel_name, MDP_REV_50, (void *)MIPI_FB_ADDR)) {
+ target_force_cont_splash_disable(true);
+ msm_display_off();
+ }
+
+ if (cont_splash == '0') {
+ dprintf(INFO, "Forcing continuous splash disable\n");
+ target_force_cont_splash_disable(true);
+ }
+}
+
+void target_display_shutdown(void)
+{
+ gcdb_display_shutdown();
+}