Merge "aboot: mdtp: Fix MDTP eFuse read"
diff --git a/dev/gcdb/display/gcdb_display_param.c b/dev/gcdb/display/gcdb_display_param.c
index fcf0953..91ce12b 100644
--- a/dev/gcdb/display/gcdb_display_param.c
+++ b/dev/gcdb/display/gcdb_display_param.c
@@ -350,11 +350,11 @@
/* Check for the DSI configuration */
if (slave_panel_node && (panel_mode & (DUAL_DSI_FLAG |
SPLIT_DISPLAY_FLAG | DST_SPLIT_FLAG)))
- strcpy(oem_data.dsi_config, "split_dsi");
+ strlcpy(oem_data.dsi_config, "split_dsi", DSI_CFG_SIZE);
else if (slave_panel_node)
- strcpy(oem_data.dsi_config, "dual_dsi");
+ strlcpy(oem_data.dsi_config, "dual_dsi", DSI_CFG_SIZE);
else
- strcpy(oem_data.dsi_config, "single_dsi");
+ strlcpy(oem_data.dsi_config, "single_dsi", DSI_CFG_SIZE);
arg_size = DSI_CFG_STRING_LEN + strlen(oem_data.dsi_config);
diff --git a/dev/gcdb/display/include/panel_nt35597_wqxga_dsc_cmd.h b/dev/gcdb/display/include/panel_nt35597_wqxga_dsc_cmd.h
index 6c7df16..b059bb3 100644
--- a/dev/gcdb/display/include/panel_nt35597_wqxga_dsc_cmd.h
+++ b/dev/gcdb/display/include/panel_nt35597_wqxga_dsc_cmd.h
@@ -289,7 +289,7 @@
/* Panel timing */
/*---------------------------------------------------------------------------*/
static const uint32_t nt35597_wqxga_dsc_cmd_timings[] = {
- 0xe2, 0x36, 0x24, 0x00, 0x66, 0x6a, 0x28, 0x38, 0x2a, 0x03, 0x04, 0x00
+ 0xa4, 0x24, 0x18, 0x00, 0x4c, 0x50, 0x1c, 0x28, 0x1c, 0x03, 0x04, 0x00,
};
static const uint32_t nt35597_wqxga_dsc_thulium_cmd_timings[] = {
diff --git a/dev/gcdb/display/include/panel_nt35597_wqxga_dsc_video.h b/dev/gcdb/display/include/panel_nt35597_wqxga_dsc_video.h
index c699219..382d75c 100644
--- a/dev/gcdb/display/include/panel_nt35597_wqxga_dsc_video.h
+++ b/dev/gcdb/display/include/panel_nt35597_wqxga_dsc_video.h
@@ -275,6 +275,10 @@
/*---------------------------------------------------------------------------*/
/* Panel timing */
/*---------------------------------------------------------------------------*/
+static const uint32_t nt35597_wqxga_dsc_video_timings[] = {
+ 0xa4, 0x24, 0x18, 0x00, 0x4c, 0x50, 0x1c, 0x28, 0x1c, 0x03, 0x04, 0x00,
+};
+
static const uint32_t nt35597_wqxga_dsc_thulium_video_timings[] = {
0x20, 0x1d, 0x05, 0x07, 0x03, 0x03, 0x4, 0xa0,
0x20, 0x1d, 0x05, 0x07, 0x03, 0x03, 0x4, 0xa0,
diff --git a/include/target.h b/include/target.h
index 84e93c0..b7f92a2 100644
--- a/include/target.h
+++ b/include/target.h
@@ -86,4 +86,5 @@
void target_crypto_init_params(void);
int target_cont_splash_screen(void);
bool target_build_variant_user();
+void pmic_reset_configure(uint8_t reset_type);
#endif
diff --git a/platform/msm8952/include/platform/iomap.h b/platform/msm8952/include/platform/iomap.h
index 94488b5..6a568db 100644
--- a/platform/msm8952/include/platform/iomap.h
+++ b/platform/msm8952/include/platform/iomap.h
@@ -383,6 +383,35 @@
#endif
#define VBIF_VBIF_IN_WR_LIM_CONF1 REG_MDP(0xc80C4)
+#ifdef MDP_INTF_2_TIMING_ENGINE_EN
+#undef MDP_INTF_2_TIMING_ENGINE_EN
+#endif
+#define MDP_INTF_2_TIMING_ENGINE_EN REG_MDP(0x12F00)
+
+#ifdef MDP_PP_0_BASE
+#undef MDP_PP_0_BASE
+#endif
+#define MDP_PP_0_BASE REG_MDP(0x71000)
+
+#ifdef MDP_PP_1_BASE
+#undef MDP_PP_1_BASE
+#endif
+#define MDP_PP_1_BASE REG_MDP(0x71800)
+
+#ifdef MDSS_MDP_REG_DCE_SEL
+#undef MDSS_MDP_REG_DCE_SEL
+#endif
+#define MDSS_MDP_REG_DCE_SEL REG_MDP(0x1428)
+
+#ifdef MDSS_MDP_PP_DCE_DATA_OUT_SWAP
+#undef MDSS_MDP_PP_DCE_DATA_OUT_SWAP
+#endif
+#define MDSS_MDP_PP_DCE_DATA_OUT_SWAP 0x0CC
+
+#define MDP_DSC_0_BASE REG_MDP(0x81000)
+#define MDP_DSC_1_BASE REG_MDP(0x81400)
+
+
#define SOFT_RESET 0x118
#define CLK_CTRL 0x11C
#define TRIG_CTRL 0x084
@@ -419,6 +448,12 @@
#define VIDEO_MODE_CTRL 0x010
#define HS_TIMER_CTRL 0x0BC
+#define VIDEO_COMPRESSION_MODE_CTRL 0x2A0
+#define VIDEO_COMPRESSION_MODE_CTRL_2 0x2A4
+#define CMD_COMPRESSION_MODE_CTRL 0x2A8
+#define CMD_COMPRESSION_MODE_CTRL_2 0x2AC
+#define CMD_COMPRESSION_MODE_CTRL_3 0x2B0
+
#define TCSR_TZ_WONCE 0x193D000
#define TCSR_BOOT_MISC_DETECT 0x193D100
diff --git a/platform/msm_shared/include/scm.h b/platform/msm_shared/include/scm.h
index 002847f..0bd7eda 100644
--- a/platform/msm_shared/include/scm.h
+++ b/platform/msm_shared/include/scm.h
@@ -465,4 +465,5 @@
int scm_device_enter_dload();
int scm_call2_atomic(uint32_t svc, uint32_t cmd, uint32_t arg1, uint32_t arg2);
uint32_t scm_io_write(uint32_t address, uint32_t val);
+int is_scm_call_available(uint32_t svc_id, uint32_t cmd_id);
#endif
diff --git a/platform/msm_shared/mipi_dsi_phy.c b/platform/msm_shared/mipi_dsi_phy.c
index b7faf5d..1321e9f 100644
--- a/platform/msm_shared/mipi_dsi_phy.c
+++ b/platform/msm_shared/mipi_dsi_phy.c
@@ -399,13 +399,19 @@
writel(0x0a, phy_base + 0x0180);
dmb();
- dsi0_phy_base = DSI0_PHY_BASE + target_display_get_base_offset(DSI0_PHY_BASE);
/* DSI_PHY_DSIPHY_GLBL_TEST_CTRL */
- if ((phy_base == dsi0_phy_base) ||
- (readl(mipi->ctl_base) == DSI_HW_REV_103_1))
+ if (mipi->dual_dsi) {
+ dsi0_phy_base = DSI0_PHY_BASE +
+ target_display_get_base_offset(DSI0_PHY_BASE);
+ if ((phy_base == dsi0_phy_base) ||
+ (readl(mipi->ctl_base) == DSI_HW_REV_103_1))
+ writel(0x01, phy_base + 0x01d4);
+ else
+ writel(0x00, phy_base + 0x01d4);
+ } else {
writel(0x01, phy_base + 0x01d4);
- else
- writel(0x00, phy_base + 0x01d4);
+ }
+ dmb();
/* MMSS_DSI_0_PHY_DSIPHY_CTRL_0 */
writel(0x5f, phy_base + 0x0170);
diff --git a/platform/msm_shared/reboot.c b/platform/msm_shared/reboot.c
index fb29ab5..2fe514e 100644
--- a/platform/msm_shared/reboot.c
+++ b/platform/msm_shared/reboot.c
@@ -31,22 +31,12 @@
#include <reg.h>
#include <target.h>
#include <platform.h>
-#include <uart_dm.h>
-#include <mmc.h>
-#include <dev/keys.h>
-#include <spmi_v2.h>
#include <pm8x41.h>
-#include <board.h>
-#include <baseband.h>
-#include <hsusb.h>
+#include <pm8x41_hw.h>
#include <scm.h>
-#include <platform/gpio.h>
-#include <platform/irqs.h>
-#include <platform/clock.h>
-#include <crypto5_wrapper.h>
-#include <partition_parser.h>
#include <stdlib.h>
#include <reboot.h>
+#include <qtimer.h>
#if USER_FORCE_RESET_SUPPORT
/* Return 1 if it is a force resin triggered by user. */
@@ -84,9 +74,9 @@
/* Read reboot reason and scrub it
* Bit-5, bit-6 and bit-7 of SOFT_RB_SPARE for hard reset reason
*/
- value = pm8x41_reg_read(PON_SOFT_RB_SPARE);
+ value = REG_READ(PON_SOFT_RB_SPARE);
hard_restart_reason = value >> 5;
- pm8x41_reg_write(PON_SOFT_RB_SPARE, value & 0x1f);
+ REG_WRITE(PON_SOFT_RB_SPARE, value & 0x1f);
return hard_restart_reason;
}
@@ -109,7 +99,10 @@
void reboot_device(unsigned reboot_reason)
{
uint8_t reset_type = 0;
- uint32_t ret = 0;
+ int ret = 0;
+#if USE_PON_REBOOT_REG
+ uint8_t value;
+#endif
/* Need to clear the SW_RESET_ENTRY register and
* write to the BOOT_MISC_REG for known reset cases
@@ -117,21 +110,35 @@
if(reboot_reason != DLOAD)
scm_dload_mode(NORMAL_MODE);
+#if USE_PON_REBOOT_REG
+ value = REG_READ(PON_SOFT_RB_SPARE);
+ value |= ((reboot_reason << 5) & 0xff);
+ REG_WRITE(PON_SOFT_RB_SPARE, value);
+#else
writel(reboot_reason, RESTART_REASON_ADDR);
-
- /* For Reboot-bootloader and Dload cases do a warm reset
- * For Reboot cases do a hard reset
+#endif
+ /* For Dload cases do a warm reset
+ * For other cases do a hard reset
*/
- if((reboot_reason == FASTBOOT_MODE) || (reboot_reason == DLOAD) || (reboot_reason == RECOVERY_MODE))
+#if USE_PON_REBOOT_REG
+ if(reboot_reason == DLOAD)
+#else
+ if(reboot_reason == FASTBOOT_MODE || (reboot_reason == DLOAD) || (reboot_reason == RECOVERY_MODE))
+#endif
reset_type = PON_PSHOLD_WARM_RESET;
else
reset_type = PON_PSHOLD_HARD_RESET;
- pm8x41_reset_configure(reset_type);
+ pmic_reset_configure(reset_type);
- ret = scm_halt_pmic_arbiter();
- if (ret)
- dprintf(CRITICAL , "Failed to halt pmic arbiter: %d\n", ret);
+ /* Force spmi shutdown to avoid spmi lock up on some pmics */
+ ret = is_scm_call_available(SCM_SVC_PWR, SCM_IO_DISABLE_PMIC_ARBITER);
+ if ( ret > 0)
+ {
+ ret = scm_halt_pmic_arbiter();
+ if (ret)
+ dprintf(CRITICAL , "Failed to halt pmic arbiter: %d\n", ret);
+ }
/* Drop PS_HOLD for MSM */
writel(0x00, MPM2_MPM_PS_HOLD);
@@ -141,3 +148,19 @@
dprintf(CRITICAL, "Rebooting failed\n");
}
+void shutdown_device()
+{
+ dprintf(CRITICAL, "Going down for shutdown.\n");
+
+ /* Configure PMIC for shutdown. */
+ pmic_reset_configure(PON_PSHOLD_SHUTDOWN);
+
+ /* Drop PS_HOLD for MSM */
+ writel(0x00, MPM2_MPM_PS_HOLD);
+
+ mdelay(5000);
+
+ dprintf(CRITICAL, "Shutdown failed\n");
+
+ ASSERT(0);
+}
diff --git a/platform/msm_shared/reboot.h b/platform/msm_shared/reboot.h
index 7156c01..c87f9d8 100644
--- a/platform/msm_shared/reboot.h
+++ b/platform/msm_shared/reboot.h
@@ -29,6 +29,7 @@
#define FASTBOOT_MODE 0x77665500
#define RECOVERY_MODE 0x77665502
#define ALARM_BOOT 0x77665503
+
#define RTC_TRG 4
#define PON_SOFT_RB_SPARE 0x88F
@@ -44,3 +45,4 @@
uint32_t check_alarm_boot(void);
void reboot_device(unsigned reboot_reason);
+void shutdown_device();
diff --git a/platform/msm_shared/rules.mk b/platform/msm_shared/rules.mk
index 8e2bcc2..8978664 100644
--- a/platform/msm_shared/rules.mk
+++ b/platform/msm_shared/rules.mk
@@ -596,6 +596,7 @@
$(LOCAL_DIR)/mdp5.o \
$(LOCAL_DIR)/display.o \
$(LOCAL_DIR)/mipi_dsi.o \
+ $(LOCAL_DIR)/mipi_dsc.o \
$(LOCAL_DIR)/mipi_dsi_phy.o \
$(LOCAL_DIR)/mipi_dsi_autopll.o
endif
@@ -617,10 +618,11 @@
OBJS += $(LOCAL_DIR)/partial_goods.o
endif
-ifeq ($(ENABLE_RPMB_SUPPORT), 1)
-include platform/msm_shared/rpmb/rules.mk
-endif
ifeq ($(ENABLE_REBOOT_MODULE), 1)
OBJS += $(LOCAL_DIR)/reboot.o
endif
+
+ifeq ($(ENABLE_RPMB_SUPPORT), 1)
+include platform/msm_shared/rpmb/rules.mk
+endif
diff --git a/platform/msm_shared/scm.c b/platform/msm_shared/scm.c
index bccdb3d..2dda14e 100644
--- a/platform/msm_shared/scm.c
+++ b/platform/msm_shared/scm.c
@@ -62,7 +62,7 @@
return scm_arm_support;
}
-static int is_scm_call_available(uint32_t svc_id, uint32_t cmd_id)
+int is_scm_call_available(uint32_t svc_id, uint32_t cmd_id)
{
int ret;
scmcall_arg scm_arg = {0};
diff --git a/project/msm8909.mk b/project/msm8909.mk
index 64805e9..b7094e6 100644
--- a/project/msm8909.mk
+++ b/project/msm8909.mk
@@ -72,3 +72,5 @@
#Enable the external reboot functions
ENABLE_REBOOT_MODULE := 1
+#Use PON register for reboot reason
+DEFINES += USE_PON_REBOOT_REG=1
diff --git a/project/msm8916.mk b/project/msm8916.mk
index 5891664..0edff28 100644
--- a/project/msm8916.mk
+++ b/project/msm8916.mk
@@ -58,3 +58,5 @@
#Enable the external reboot functions
ENABLE_REBOOT_MODULE := 1
+#Use PON register for reboot reason
+DEFINES += USE_PON_REBOOT_REG=1
diff --git a/project/msm8996.mk b/project/msm8996.mk
index 2669b56..e885f30 100644
--- a/project/msm8996.mk
+++ b/project/msm8996.mk
@@ -82,3 +82,6 @@
#SCM call before entering DLOAD mode
DEFINES += PLATFORM_USE_SCM_DLOAD=1
+
+#Enable the external reboot functions
+ENABLE_REBOOT_MODULE := 1
diff --git a/target/msm8909/init.c b/target/msm8909/init.c
index 72506f3..b115bf8 100644
--- a/target/msm8909/init.c
+++ b/target/msm8909/init.c
@@ -390,21 +390,6 @@
return LINUX_MACHTYPE_UNKNOWN;
}
-/* Configure PMIC and Drop PS_HOLD for shutdown */
-void shutdown_device()
-{
- dprintf(CRITICAL, "Going down for shutdown.\n");
-
- /* Configure PMIC for shutdown */
- pm8x41_reset_configure(PON_PSHOLD_SHUTDOWN);
-
- /* Drop PS_HOLD for MSM */
- writel(0x00, MPM2_MPM_PS_HOLD);
-
- mdelay(5000);
-
-}
-
/* Detect the target type */
void target_detect(struct board_data *board)
{
@@ -703,3 +688,8 @@
{
return board_hlos_subtype();
}
+
+void pmic_reset_configure(uint8_t reset_type)
+{
+ pm8x41_reset_configure(reset_type);
+}
diff --git a/target/msm8916/init.c b/target/msm8916/init.c
index f0f6bba..dba1ed3 100644
--- a/target/msm8916/init.c
+++ b/target/msm8916/init.c
@@ -211,24 +211,6 @@
return LINUX_MACHTYPE_UNKNOWN;
}
-/* Configure PMIC and Drop PS_HOLD for shutdown */
-void shutdown_device()
-{
- dprintf(CRITICAL, "Going down for shutdown.\n");
-
- /* Configure PMIC for shutdown */
- pm8x41_reset_configure(PON_PSHOLD_SHUTDOWN);
-
- /* Drop PS_HOLD for MSM */
- writel(0x00, MPM2_MPM_PS_HOLD);
-
- mdelay(5000);
-
- dprintf(CRITICAL, "shutdown failed\n");
-
- ASSERT(0);
-}
-
/* Detect the target type */
void target_detect(struct board_data *board)
{
@@ -511,3 +493,8 @@
{
return board_hlos_subtype();
}
+
+void pmic_reset_configure(uint8_t reset_type)
+{
+ pm8x41_reset_configure(reset_type);
+}
diff --git a/target/msm8952/oem_panel.c b/target/msm8952/oem_panel.c
index d2e05f8..57e069f 100644
--- a/target/msm8952/oem_panel.c
+++ b/target/msm8952/oem_panel.c
@@ -35,6 +35,7 @@
#include <board.h>
#include <qtimer.h>
#include <mipi_dsi.h>
+#include <mdp5.h>
#include <target/display.h>
#include "include/panel.h"
@@ -50,6 +51,8 @@
#include "include/panel_nt35597_wqxga_dualdsi_video.h"
#include "include/panel_nt35597_wqxga_dualdsi_cmd.h"
#include "include/panel_hx8399a_1080p_video.h"
+#include "include/panel_nt35597_wqxga_dsc_video.h"
+#include "include/panel_nt35597_wqxga_dsc_cmd.h"
/*---------------------------------------------------------------------------*/
/* static panel selection variable */
@@ -62,6 +65,8 @@
NT35597_WQXGA_DUALDSI_VIDEO_PANEL,
NT35597_WQXGA_DUALDSI_CMD_PANEL,
HX8399A_1080P_VIDEO_PANEL,
+ NT35597_WQXGA_DSC_VIDEO_PANEL,
+ NT35597_WQXGA_DSC_CMD_PANEL,
UNKNOWN_PANEL
};
@@ -81,6 +86,8 @@
{"nt35597_wqxga_dualdsi_cmd", NT35597_WQXGA_DUALDSI_CMD_PANEL},
{"otm1906c_1080p_cmd", OTM1906C_1080P_CMD_PANEL},
{"hx8399a_1080p_video", HX8399A_1080P_VIDEO_PANEL},
+ {"nt35597_wqxga_dsc_video", NT35597_WQXGA_DSC_VIDEO_PANEL},
+ {"nt35597_wqxga_dsc_cmd", NT35597_WQXGA_DSC_CMD_PANEL},
};
static uint32_t panel_id;
@@ -318,6 +325,84 @@
TIMING_SIZE);
pinfo->mipi.tx_eot_append = true;
break;
+ case NT35597_WQXGA_DSC_VIDEO_PANEL:
+ panelstruct->paneldata = &nt35597_wqxga_dsc_video_panel_data;
+ panelstruct->paneldata->panel_with_enable_gpio = 0;
+ panelstruct->paneldata->panel_operating_mode = USE_DSI1_PLL_FLAG;
+ panelstruct->panelres = &nt35597_wqxga_dsc_video_panel_res;
+ panelstruct->color = &nt35597_wqxga_dsc_video_color;
+ panelstruct->videopanel = &nt35597_wqxga_dsc_video_video_panel;
+ panelstruct->commandpanel = &nt35597_wqxga_dsc_video_command_panel;
+ panelstruct->state = &nt35597_wqxga_dsc_video_state;
+ panelstruct->laneconfig = &nt35597_wqxga_dsc_video_lane_config;
+ panelstruct->paneltiminginfo
+ = &nt35597_wqxga_dsc_video_timing_info;
+ panelstruct->panelresetseq
+ = &nt35597_wqxga_dsc_video_reset_seq;
+ panelstruct->backlightinfo = &nt35597_wqxga_dsc_video_backlight;
+ pinfo->labibb = &nt35597_wqxga_dsc_video_labibb;
+
+ pinfo->mipi.panel_on_cmds
+ = nt35597_wqxga_dsc_video_on_command;
+ pinfo->mipi.num_of_panel_on_cmds
+ = NT35597_WQXGA_DSC_VIDEO_ON_COMMAND;
+ pinfo->mipi.panel_off_cmds
+ = nt35597_wqxga_dsc_video_off_command;
+ pinfo->mipi.num_of_panel_off_cmds
+ = NT35597_WQXGA_DSC_VIDEO_OFF_COMMAND;
+ memcpy(phy_db->timing, nt35597_wqxga_dsc_video_timings,
+ TIMING_SIZE);
+ /* Clkout timings are different for this panel on 8956 */
+ panelstruct->paneltiminginfo->tclk_post = 0x04;
+ panelstruct->paneltiminginfo->tclk_pre = 0x20;
+ pinfo->mipi.tx_eot_append = true;
+ pinfo->compression_mode = COMPRESSION_DSC;
+ memcpy(&panelstruct->dsc_paras, &nt35597_wqxga_dsc_video_paras,
+ sizeof(struct dsc_parameters));
+ pinfo->dsc.parameter_calc = mdss_dsc_parameters_calc;
+ pinfo->dsc.dsc2buf = mdss_dsc_to_buf;
+ pinfo->dsc.dsi_dsc_config = mdss_dsc_dsi_config;
+ pinfo->dsc.mdp_dsc_config = mdss_dsc_mdp_config;
+ break;
+ case NT35597_WQXGA_DSC_CMD_PANEL:
+ panelstruct->paneldata = &nt35597_wqxga_dsc_cmd_panel_data;
+ panelstruct->paneldata->panel_with_enable_gpio = 0;
+ panelstruct->paneldata->panel_operating_mode = USE_DSI1_PLL_FLAG;
+ panelstruct->panelres = &nt35597_wqxga_dsc_cmd_panel_res;
+ panelstruct->color = &nt35597_wqxga_dsc_cmd_color;
+ panelstruct->videopanel = &nt35597_wqxga_dsc_cmd_video_panel;
+ panelstruct->commandpanel = &nt35597_wqxga_dsc_cmd_command_panel;
+ panelstruct->state = &nt35597_wqxga_dsc_cmd_state;
+ panelstruct->laneconfig = &nt35597_wqxga_dsc_cmd_lane_config;
+ panelstruct->paneltiminginfo
+ = &nt35597_wqxga_dsc_cmd_timing_info;
+ panelstruct->panelresetseq
+ = &nt35597_wqxga_dsc_cmd_reset_seq;
+ panelstruct->backlightinfo = &nt35597_wqxga_dsc_cmd_backlight;
+ pinfo->labibb = &nt35597_wqxga_dsc_cmd_labibb;
+
+ pinfo->mipi.panel_on_cmds
+ = nt35597_wqxga_dsc_cmd_on_command;
+ pinfo->mipi.num_of_panel_on_cmds
+ = NT35597_WQXGA_DSC_CMD_ON_COMMAND;
+ pinfo->mipi.panel_off_cmds
+ = nt35597_wqxga_dsc_cmd_off_command;
+ pinfo->mipi.num_of_panel_off_cmds
+ = NT35597_WQXGA_DSC_CMD_OFF_COMMAND;
+ memcpy(phy_db->timing, nt35597_wqxga_dsc_cmd_timings,
+ TIMING_SIZE);
+ /* Clkout timings are different for this panel on 8956 */
+ panelstruct->paneltiminginfo->tclk_post = 0x04;
+ panelstruct->paneltiminginfo->tclk_pre = 0x20;
+ pinfo->mipi.tx_eot_append = true;
+ pinfo->compression_mode = COMPRESSION_DSC;
+ memcpy(&panelstruct->dsc_paras, &nt35597_wqxga_dsc_cmd_paras,
+ sizeof(struct dsc_parameters));
+ pinfo->dsc.parameter_calc = mdss_dsc_parameters_calc;
+ pinfo->dsc.dsc2buf = mdss_dsc_to_buf;
+ pinfo->dsc.dsi_dsc_config = mdss_dsc_dsi_config;
+ pinfo->dsc.mdp_dsc_config = mdss_dsc_mdp_config;
+ break;
case UNKNOWN_PANEL:
default:
memset(panelstruct, 0, sizeof(struct panel_struct));
diff --git a/target/msm8952/target_display.c b/target/msm8952/target_display.c
index abe8937..f4664ec 100644
--- a/target/msm8952/target_display.c
+++ b/target/msm8952/target_display.c
@@ -55,8 +55,8 @@
#define DSC_VID_PANEL "dsc_vid_panel"
#define DSC_VID_PANEL_ADV7533_1080P "dsc_vid_panel_adv7533_1080p"
#define DSC_CMD_PANEL_ADV7533_1080P "dsc_cmd_panel_adv7533_1080p"
-#define DSC_CMD_PANEL_STRING "1:dsi:0:none:1:qcom,mdss_dsi_nt35597_dsc_wqxga_cmd"
-#define DSC_VID_PANEL_STRING "1:dsi:0:none:1:qcom,mdss_dsi_nt35597_dsc_wqxga_video"
+#define DSC_CMD_PANEL_STRING "1:dsi:0:none:1:qcom,mdss_dsi_nt35597_dsc_wqxga_cmd:cfg:single_dsi"
+#define DSC_VID_PANEL_STRING "1:dsi:0:none:1:qcom,mdss_dsi_nt35597_dsc_wqxga_video:cfg:single_dsi"
#define DSC_CMD_PANEL_ADV7533_1080P_STRING "1:dsi:0:qcom,mdss_dsi_adv7533_1080p:1:qcom,mdss_dsi_nt35597_dsc_wqxga_cmd:cfg:dual_dsi"
#define DSC_VID_PANEL_ADV7533_1080P_STRING "1:dsi:0:qcom,mdss_dsi_adv7533_1080p:1:qcom,mdss_dsi_nt35597_dsc_wqxga_video:cfg:dual_dsi"
diff --git a/target/msm8996/init.c b/target/msm8996/init.c
index e9e8eea..017b8d2 100644
--- a/target/msm8996/init.c
+++ b/target/msm8996/init.c
@@ -63,7 +63,7 @@
#endif
#define CE_INSTANCE 1
-#define CE_EE 1
+#define CE_EE 0
#define CE_FIFO_SIZE 64
#define CE_READ_PIPE 3
#define CE_WRITE_PIPE 2
@@ -155,6 +155,13 @@
pm_appsbl_set_dcin_suspend(1);
#endif
+
+ if (crypto_initialized())
+ {
+ crypto_eng_cleanup();
+ clock_ce_disable(CE_INSTANCE);
+ }
+
/* Tear down glink channels */
rpm_glink_uninit();
@@ -363,42 +370,6 @@
}
}
-unsigned check_reboot_mode(void)
-{
- uint32_t restart_reason = 0;
- uint32_t restart_reason_addr;
-
- restart_reason_addr = RESTART_REASON_ADDR;
-
- /* Read reboot reason and scrub it */
- restart_reason = readl(restart_reason_addr);
- writel(0x00, restart_reason_addr);
-
- return restart_reason;
-}
-
-void reboot_device(unsigned reboot_reason)
-{
- uint8_t reset_type = 0;
-
- /* Write the reboot reason */
- writel(reboot_reason, RESTART_REASON_ADDR);
-
- if(reboot_reason)
- reset_type = PON_PSHOLD_WARM_RESET;
- else
- reset_type = PON_PSHOLD_HARD_RESET;
-
- pm8994_reset_configure(reset_type);
-
- /* Drop PS_HOLD for MSM */
- writel(0x00, MPM2_MPM_PS_HOLD);
-
- mdelay(5000);
-
- dprintf(CRITICAL, "Rebooting failed\n");
-}
-
int emmc_recovery_init(void)
{
return _emmc_recovery_init();
@@ -441,7 +412,7 @@
crypto_engine_type board_ce_type(void)
{
- return CRYPTO_ENGINE_TYPE_SW;
+ return CRYPTO_ENGINE_TYPE_HW;
}
/* Set up params for h/w CE. */
@@ -503,19 +474,7 @@
return ret;
}
-void shutdown_device()
+void pmic_reset_configure(uint8_t reset_type)
{
- dprintf(CRITICAL, "Going down for shutdown.\n");
-
- /* Configure PMIC for shutdown. */
- pm8994_reset_configure(PON_PSHOLD_SHUTDOWN);
-
- /* Drop PS_HOLD for MSM */
- writel(0x00, MPM2_MPM_PS_HOLD);
-
- mdelay(5000);
-
- dprintf(CRITICAL, "Shutdown failed\n");
-
- ASSERT(0);
+ pm8994_reset_configure(reset_type);
}