Merge "[msm7630/DMM] : Reserve EBI-1 memory as unstable."
diff --git a/platform/msm7k/acpuclock.c b/platform/msm7k/acpuclock.c
index 9b0b097..89583f3 100755
--- a/platform/msm7k/acpuclock.c
+++ b/platform/msm7k/acpuclock.c
@@ -37,6 +37,7 @@
#define A11S_CLK_CNTL_ADDR (MSM_CSR_BASE + 0x100)
#define A11S_CLK_SEL_ADDR (MSM_CSR_BASE + 0x104)
#define VDD_SVS_PLEVEL_ADDR (MSM_CSR_BASE + 0x124)
+#define PLL2_L_VAL_ADDR (MSM_CLK_CTL_BASE + 0x33C)
#define SRC_SEL_PLL1 1 /* PLL1. */
#define SRC_SEL_PLL2 2 /* PLL2. */
@@ -46,6 +47,7 @@
#define WAIT_CNT 100
#define VDD_LEVEL 7
#define MIN_AXI_HZ 120000000
+#define ACPU_800MHZ 41
void pll_request(unsigned pll, unsigned enable);
void axi_clock_init(unsigned rate);
@@ -62,18 +64,32 @@
*
* TODO: Need to fix SRC_SEL_PLL1 for 7x25.
*/
-uint32_t const clk_cntl_reg_val[] = {
+
+uint32_t const clk_cntl_reg_val_7625[] = {
(WAIT_CNT << 16) | (SRC_SEL_PLL1 << 4) | DIV_4,
(WAIT_CNT << 16) | (SRC_SEL_PLL1 << 12) | (DIV_4 << 8),
(WAIT_CNT << 16) | (SRC_SEL_PLL1 << 12) | (DIV_2 << 8),
(WAIT_CNT << 16) | (SRC_SEL_PLL1 << 12) | DIV_2,
-#if ENABLE_PLL3
- (WAIT_CNT << 16) | (SRC_SEL_PLL3 << 4) | DIV_2,
+ (WAIT_CNT << 16) | (SRC_SEL_PLL3 << 4) | DIV_2,
(WAIT_CNT << 16) | (SRC_SEL_PLL3 << 12) | (DIV_2 << 8),
-#else
+};
+
+uint32_t const clk_cntl_reg_val_7627[] = {
+ (WAIT_CNT << 16) | (SRC_SEL_PLL1 << 4) | DIV_4,
+ (WAIT_CNT << 16) | (SRC_SEL_PLL1 << 12) | (DIV_4 << 8),
+ (WAIT_CNT << 16) | (SRC_SEL_PLL1 << 12) | (DIV_2 << 8),
+ (WAIT_CNT << 16) | (SRC_SEL_PLL1 << 12) | DIV_2,
(WAIT_CNT << 16) | (SRC_SEL_PLL2 << 4) | DIV_2,
(WAIT_CNT << 16) | (SRC_SEL_PLL2 << 12) | (DIV_2 << 8),
-#endif
+};
+
+uint32_t const clk_cntl_reg_val_7627A[] = {
+ (WAIT_CNT << 16) | (SRC_SEL_PLL1 << 4) | DIV_4,
+ (WAIT_CNT << 16) | (SRC_SEL_PLL1 << 12) | (DIV_4 << 8),
+ (WAIT_CNT << 16) | (SRC_SEL_PLL1 << 12) | (DIV_2 << 8),
+ (WAIT_CNT << 16) | (SRC_SEL_PLL1 << 12) | DIV_2,
+ (WAIT_CNT << 16) | (SRC_SEL_PLL2 << 4),
+ (WAIT_CNT << 16) | (SRC_SEL_PLL2 << 12),
};
/* Using DIV_4 for all cases to avoid worrying about turbo vs. normal
@@ -93,7 +109,7 @@
void acpu_clock_init(void)
{
- unsigned i;
+ unsigned i,clk;
#if (!ENABLE_NANDWRITE)
int *modem_stat_check = (MSM_SHARED_BASE + 0x14);
@@ -112,10 +128,18 @@
/* Read clock source select bit. */
i = readl(A11S_CLK_SEL_ADDR) & 1;
+ clk = readl(PLL2_L_VAL_ADDR) & 0x3F;
/* Jump into table and set every other entry. */
- for(; i < ARRAY_SIZE(clk_cntl_reg_val); i += 2) {
- writel(clk_cntl_reg_val[i], A11S_CLK_CNTL_ADDR);
+ for(; i < ARRAY_SIZE(clk_cntl_reg_val_7627); i += 2) {
+#ifdef ENABLE_PLL3
+ writel(clk_cntl_reg_val_7625[i], A11S_CLK_CNTL_ADDR);
+#else
+ if(clk == ACPU_800MHZ)
+ writel(clk_cntl_reg_val_7627A[i], A11S_CLK_CNTL_ADDR);
+ else
+ writel(clk_cntl_reg_val_7627[i], A11S_CLK_CNTL_ADDR);
+#endif
/* Would need a dmb() here but the whole address space is
* strongly ordered, so it should be fine.
*/
diff --git a/platform/msm7k/include/platform/iomap.h b/platform/msm7k/include/platform/iomap.h
index 3b55181..f2f1e35 100644
--- a/platform/msm7k/include/platform/iomap.h
+++ b/platform/msm7k/include/platform/iomap.h
@@ -42,6 +42,7 @@
#define MSM_VIC_BASE 0xC0000000
#define MSM_GPT_BASE 0xC0100000
#define MSM_CSR_BASE 0xC0100000
+#define MSM_CLK_CTL_BASE 0xA8600000
#define MSM_SHARED_BASE 0x00100000
diff --git a/platform/msm_shared/hsusb.c b/platform/msm_shared/hsusb.c
index 197b102..9c7e02d 100644
--- a/platform/msm_shared/hsusb.c
+++ b/platform/msm_shared/hsusb.c
@@ -520,25 +520,16 @@
}
#define USB_HS1_XVCR_FS_CLK_MD 0x00902908
#define USB_HS1_XVCR_FS_CLK_NS 0x0090290C
+
void hsusb_8x60_clock_init(void)
{
- unsigned int val = 0;
-
- //Enable PLL8
- writel(0xF, 0x00903144);
- writel(0x5, 0x00903148);
- writel(0x8, 0x0090314C);
-
- val = readl(0x00903154);
- val &= ~(0xC30000);
- val |= 0xC10000;
- writel(val, 0x00903154);
-
- val = readl(0x00903140);
- val &= ~(0x7);
- val |= 0x7;
- writel(val, 0x00903140);
-
+ int val;
+ /* Vote for PLL8 */
+ val = readl(0x009034C0);
+ val |= (1<<8);
+ writel(val, 0x009034C0);
+ /* Wait until PLL is enabled. */
+ while (!(readl(0x00903158) & (1<<16)));
//Set 7th bit in NS Register
val = 1 << 7;
@@ -844,11 +835,18 @@
int udc_stop(void)
{
- writel(0, USB_USBINTR);
+ int val;
+ writel(0, USB_USBINTR);
mask_interrupt(INT_USB_HS);
/* disable pullup */
writel(0x00080000, USB_USBCMD);
+#ifdef PLATFORM_MSM8X60
+ /* Voting down PLL8 */
+ val = readl(0x009034C0);
+ val &= ~(1<<8);
+ writel(val, 0x009034C0);
+#endif
thread_sleep(10);
return 0;
diff --git a/target/qsd8250_ffa/init.c b/target/qsd8250_ffa/init.c
index 7018c6b..6a99bf9 100644
--- a/target/qsd8250_ffa/init.c
+++ b/target/qsd8250_ffa/init.c
@@ -56,32 +56,32 @@
static struct ptentry board_part_list[] = {
{
.start = 0,
- .length = 40 /* 5MB */,
+ .length = 5 /* In MB */,
.name = "boot",
},
{
- .start = 40,
- .length = 760 /* 95MB */,
+ .start = DIFF_START_ADDR,
+ .length = 95 /* In MB */,
.name = "system",
},
{
- .start = 800,
- .length = 240 /* 30MB */,
+ .start = DIFF_START_ADDR,
+ .length = 30 /* In MB */,
.name = "cache",
},
{
- .start = 1040,
- .length = 3 /* 384KB */,
+ .start = DIFF_START_ADDR,
+ .length = 1 /* In MB */,
.name = "misc",
},
{
- .start = 1043,
+ .start = DIFF_START_ADDR,
.length = VARIABLE_LENGTH,
.name = "userdata",
},
{
.start = DIFF_START_ADDR,
- .length = 40 /* 5MB */,
+ .length = 5 /* In MB */,
.name = "recovery",
},
};
@@ -99,8 +99,8 @@
unsigned offset;
struct flash_info *flash_info;
unsigned total_num_of_blocks;
- bool start_addr_changed = false;
unsigned next_ptr_start_adr = 0;
+ unsigned blocks_per_1MB = 8; /* Default value of 2k page size on 256MB flash drive*/
int i;
dprintf(INFO, "target_init()\n");
@@ -109,7 +109,6 @@
keys_init();
keypad_init();
#endif
-
ptable_init(&flash_ptable);
smem_ptable_init();
@@ -122,32 +121,32 @@
while(1);
total_num_of_blocks = flash_info->num_blocks;
+ blocks_per_1MB = (1 << 20) / (flash_info->block_size);
for (i = 0; i < num_parts; i++) {
struct ptentry *ptn = &board_part_list[i];
- unsigned len = ptn->length;
+ unsigned len = ((ptn->length) * blocks_per_1MB);
- if(len == VARIABLE_LENGTH)
+ if(ptn->start != 0)
+ ASSERT(ptn->start == DIFF_START_ADDR);
+
+ ptn->start = next_ptr_start_adr;
+
+ if(ptn->length == VARIABLE_LENGTH)
{
- start_addr_changed = true;
unsigned length_for_prt = 0;
unsigned j;
for (j = i+1; j < num_parts; j++)
{
struct ptentry *temp_ptn = &board_part_list[j];
ASSERT(temp_ptn->length != VARIABLE_LENGTH);
- length_for_prt += temp_ptn->length;
+ length_for_prt += ((temp_ptn->length) * blocks_per_1MB);
}
- len = (total_num_of_blocks - 1) - (offset + ptn->start + length_for_prt);
+ len = (total_num_of_blocks - 1) - (offset + ptn->start + length_for_prt);
ASSERT(len >= 0);
- next_ptr_start_adr = ptn->start + len;
}
- if((ptn->start == DIFF_START_ADDR) && (start_addr_changed))
- {
- ASSERT(next_ptr_start_adr);
- ptn->start = next_ptr_start_adr;
- next_ptr_start_adr = ptn->start + ptn->length;
- }
+
+ next_ptr_start_adr = ptn->start + len;
ptable_add(&flash_ptable, ptn->name, offset + ptn->start,
len, ptn->flags, TYPE_APPS_PARTITION, PERM_WRITEABLE);
}
diff --git a/target/qsd8250_surf/init.c b/target/qsd8250_surf/init.c
index 794cc6c..9aebf05 100644
--- a/target/qsd8250_surf/init.c
+++ b/target/qsd8250_surf/init.c
@@ -56,32 +56,32 @@
static struct ptentry board_part_list[] = {
{
.start = 0,
- .length = 40 /* 5MB */,
+ .length = 5 /* In MB */,
.name = "boot",
},
{
- .start = 40,
- .length = 760 /* 95MB */,
+ .start = DIFF_START_ADDR,
+ .length = 95 /* In MB */,
.name = "system",
},
{
- .start = 800,
- .length = 240 /* 30MB */,
+ .start = DIFF_START_ADDR,
+ .length = 30 /* In MB */,
.name = "cache",
},
{
- .start = 1040,
- .length = 3 /* 384KB */,
+ .start = DIFF_START_ADDR,
+ .length = 1 /* In MB */,
.name = "misc",
},
{
- .start = 1043,
+ .start = DIFF_START_ADDR,
.length = VARIABLE_LENGTH,
.name = "userdata",
},
{
.start = DIFF_START_ADDR,
- .length = 40 /* 5MB */,
+ .length = 5 /* In MB */,
.name = "recovery",
},
};
@@ -99,8 +99,8 @@
unsigned offset;
struct flash_info *flash_info;
unsigned total_num_of_blocks;
- bool start_addr_changed = false;
unsigned next_ptr_start_adr = 0;
+ unsigned blocks_per_1MB = 8; /* Default value of 2k page size on 256MB flash drive*/
int i;
dprintf(INFO, "target_init()\n");
@@ -121,32 +121,32 @@
while(1);
total_num_of_blocks = flash_info->num_blocks;
+ blocks_per_1MB = (1 << 20) / (flash_info->block_size);
for (i = 0; i < num_parts; i++) {
struct ptentry *ptn = &board_part_list[i];
- unsigned len = ptn->length;
+ unsigned len = ((ptn->length) * blocks_per_1MB);
- if(len == VARIABLE_LENGTH)
+ if(ptn->start != 0)
+ ASSERT(ptn->start == DIFF_START_ADDR);
+
+ ptn->start = next_ptr_start_adr;
+
+ if(ptn->length == VARIABLE_LENGTH)
{
- start_addr_changed = true;
unsigned length_for_prt = 0;
unsigned j;
for (j = i+1; j < num_parts; j++)
{
struct ptentry *temp_ptn = &board_part_list[j];
ASSERT(temp_ptn->length != VARIABLE_LENGTH);
- length_for_prt += temp_ptn->length;
+ length_for_prt += ((temp_ptn->length) * blocks_per_1MB);
}
- len = (total_num_of_blocks - 1) - (offset + ptn->start + length_for_prt);
+ len = (total_num_of_blocks - 1) - (offset + ptn->start + length_for_prt);
ASSERT(len >= 0);
- next_ptr_start_adr = ptn->start + len;
}
- if((ptn->start == DIFF_START_ADDR) && (start_addr_changed))
- {
- ASSERT(next_ptr_start_adr);
- ptn->start = next_ptr_start_adr;
- next_ptr_start_adr = ptn->start + ptn->length;
- }
+
+ next_ptr_start_adr = ptn->start + len;
ptable_add(&flash_ptable, ptn->name, offset + ptn->start,
len, ptn->flags, TYPE_APPS_PARTITION, PERM_WRITEABLE);
}