platform: msm_shared: Add delay in lock detection config
PLL lock status check fails without delay between
lock detection configuration and PLL lock check. This
change adds delay to pass the lock status check.
Change-Id: I5ee89c85ff944a1f6101341c8ae91a1cf0a35521
diff --git a/platform/msm_shared/mipi_dsi_phy.c b/platform/msm_shared/mipi_dsi_phy.c
index 8e4a762..834b335 100644
--- a/platform/msm_shared/mipi_dsi_phy.c
+++ b/platform/msm_shared/mipi_dsi_phy.c
@@ -202,6 +202,7 @@
writel(0x0c, ctl_base + 0x0264); /* LKDetect CFG2 */
udelay(100);
writel(0x0d, ctl_base + 0x0264); /* LKDetect CFG2 */
+ mdelay(1);
}
void mdss_dsi_uniphy_pll_sw_reset(uint32_t ctl_base)