Merge "target: mdm9640: Update usb mux config for sdxhedgehog"
diff --git a/platform/msm_shared/include/qusb2_phy.h b/platform/msm_shared/include/qusb2_phy.h
index 8a0a190..d446add 100644
--- a/platform/msm_shared/include/qusb2_phy.h
+++ b/platform/msm_shared/include/qusb2_phy.h
@@ -64,4 +64,6 @@
#define QUSB2PHY_DEBUG_CTRL2_SDXHEDGEHOG (QUSB2_PHY_BASE + 0x278)
#define QUSB2PHY_DEBUG_STAT5_SDXHEDGEHOG (QUSB2_PHY_BASE + 0x298)
+#define USB30_GENERAL_CFG_PIPE 0x08af8808
+
#endif
diff --git a/platform/msm_shared/usb30_udc.c b/platform/msm_shared/usb30_udc.c
index a2923f1..1e378bf 100644
--- a/platform/msm_shared/usb30_udc.c
+++ b/platform/msm_shared/usb30_udc.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2017, The Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
@@ -230,10 +230,6 @@
/* section 4.4.2: Initialization and configuration sequences */
- /* 1. UTMI Mux configuration */
- if (dev_info->t_usb_if->mux_config)
- dev_info->t_usb_if->mux_config();
-
/* 2. Put controller in reset */
dwc_reset(dwc, 1);
@@ -243,6 +239,10 @@
/* 3. Reset PHY */
phy_reset(wrapper, dev_info);
+ /* 3.1 UTMI Mux configuration */
+ if (dev_info->t_usb_if->mux_config)
+ dev_info->t_usb_if->mux_config();
+
/* 4. SS phy config */
if (!use_hsonly_mode())
usb_wrapper_ss_phy_configure(wrapper);
diff --git a/target/mdm9640/init.c b/target/mdm9640/init.c
index bb6eb13..803bef0 100644
--- a/target/mdm9640/init.c
+++ b/target/mdm9640/init.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2014-2016, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2014-2017, The Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
@@ -438,6 +438,33 @@
rpm_glink_uninit();
}
}
+void target_mux_configure(void)
+{
+ uint32_t val;
+ //USB30_GENERAL_CFG_PIPE_UTMI_CLK_DIS
+ val = readl(USB30_GENERAL_CFG_PIPE);
+ val = val | 0x100;
+ writel(val, USB30_GENERAL_CFG_PIPE);
+ udelay(100);
+
+ //USB30_GENERAL_CFG_PIPE_UTMI_CLK_SEL
+ val = readl(USB30_GENERAL_CFG_PIPE);
+ val = val | 0x1;
+ writel(val, USB30_GENERAL_CFG_PIPE);
+ udelay(100);
+
+ //USB30_GENERAL_CFG_PIPE3_PHYSTATUS_SW
+ val = readl(USB30_GENERAL_CFG_PIPE);
+ val = val | 0x8;
+ writel(val, USB30_GENERAL_CFG_PIPE);
+ udelay(100);
+
+ //USB30_GENERAL_CFG_PIPE_UTMI_CLK_ENABLE
+ val = readl(USB30_GENERAL_CFG_PIPE);
+ val = val & 0xfffffeff;
+ writel(val, USB30_GENERAL_CFG_PIPE);
+ udelay(100);
+}
void target_usb_phy_reset(void)
{
@@ -460,8 +487,10 @@
ASSERT(t_usb_iface);
t_usb_iface->mux_config = NULL;
- if (platform_is_sdxhedgehog())
+ if (platform_is_sdxhedgehog()){
+ t_usb_iface->mux_config = target_mux_configure;
t_usb_iface->phy_init = NULL;
+ }
else
t_usb_iface->phy_init = usb30_qmp_phy_init;
t_usb_iface->phy_reset = target_usb_phy_reset;