Merge "platform/target: msm8996: Add support for new memory map"
diff --git a/include/platform.h b/include/platform.h
index 0c59056..50ef337 100644
--- a/include/platform.h
+++ b/include/platform.h
@@ -70,4 +70,5 @@
uint32_t platform_detect_panel();
uint32_t platform_get_max_periph();
int platform_is_msm8996();
+uint64_t platform_get_ddr_start();
#endif
diff --git a/platform/msm8996/include/platform/iomap.h b/platform/msm8996/include/platform/iomap.h
index ea2a0bf..719202b 100644
--- a/platform/msm8996/include/platform/iomap.h
+++ b/platform/msm8996/include/platform/iomap.h
@@ -527,4 +527,15 @@
#define QPNP_GREEN_LPG_CTRL_BASE 0xB200
#define QPNP_RED_LPG_CTRL_BASE 0xB300
+#define APSS_WDOG_BASE 0x9830000
+#define APPS_WDOG_BARK_VAL_REG (APSS_WDOG_BASE + 0x10)
+#define APPS_WDOG_BITE_VAL_REG (APSS_WDOG_BASE + 0x14)
+#define APPS_WDOG_RESET_REG (APSS_WDOG_BASE + 0x04)
+#define APPS_WDOG_CTL_REG (APSS_WDOG_BASE + 0x08)
+
+#define DDR_START platform_get_ddr_start()
+#define ABOOT_FORCE_KERNEL_ADDR DDR_START + 0x8000
+#define ABOOT_FORCE_RAMDISK_ADDR DDR_START + 0x2200000
+#define ABOOT_FORCE_TAGS_ADDR DDR_START + 0x2000000
+#define ABOOT_FORCE_KERNEL64_ADDR DDR_START + 0x80000
#endif
diff --git a/platform/msm8996/platform.c b/platform/msm8996/platform.c
index 8bdfff0..633857a 100644
--- a/platform/msm8996/platform.c
+++ b/platform/msm8996/platform.c
@@ -57,22 +57,29 @@
#define COMMON_MEMORY (MMU_MEMORY_TYPE_NORMAL_WRITE_THROUGH | \
MMU_MEMORY_AP_READ_WRITE | MMU_MEMORY_XN)
+static uint64_t ddr_start;
static mmu_section_t default_mmu_section_table[] =
{
-/* Physical addr, Virtual addr, Mapping type , Size (in MB), Flags */
+/* Physical addr, Virtual addr, Mapping type , Size (in MB), Flags */
{ 0x00000000, 0x00000000, MMU_L2_NS_SECTION_MAPPING, 512, IOMAP_MEMORY},
- { KERNEL_ADDR, KERNEL_ADDR, MMU_L2_NS_SECTION_MAPPING, KERNEL_SIZE, COMMON_MEMORY},
- { 0x40000000, 0x40000000, MMU_L1_NS_SECTION_MAPPING, 1024 , COMMON_MEMORY},
- { 0x80000000, 0x80000000, MMU_L2_NS_SECTION_MAPPING, 88 , COMMON_MEMORY},
{ MEMBASE, MEMBASE, MMU_L2_NS_SECTION_MAPPING, (MEMSIZE / MB), LK_MEMORY},
{ SCRATCH_ADDR, SCRATCH_ADDR, MMU_L2_NS_SECTION_MAPPING, SCRATCH_SIZE, SCRATCH_MEMORY},
{ MSM_SHARED_BASE, MSM_SHARED_BASE, MMU_L2_NS_SECTION_MAPPING, MSM_SHARED_SIZE, COMMON_MEMORY},
{ RPMB_SND_RCV_BUF, RPMB_SND_RCV_BUF, MMU_L2_NS_SECTION_MAPPING, RPMB_SND_RCV_BUF_SZ, IOMAP_MEMORY},
};
+static mmu_section_t default_mmu_section_table_3gb[] =
+{
+/* Physical addr, Virtual addr, Mapping type , Size (in MB), Flags */
+ { 0x40000000, 0x40000000, MMU_L1_NS_SECTION_MAPPING, 1024 , COMMON_MEMORY},
+ { 0x80000000, 0x80000000, MMU_L2_NS_SECTION_MAPPING, 88 , COMMON_MEMORY},
+};
+
+
static mmu_section_t dload_mmu_section_table[] =
{
+/* Physical addr, Virtual addr, Mapping type , Size (in MB), Flags */
{ 0x85800000, 0x85800000, MMU_L2_NS_SECTION_MAPPING, 178, COMMON_MEMORY},
};
@@ -110,10 +117,43 @@
{
int i;
int table_sz = ARRAY_SIZE(default_mmu_section_table);
+ mmu_section_t kernel_mmu_section_table;
+ uint64_t ddr_size = smem_get_ddr_size();
+ if (ddr_size == MEM_4GB)
+ {
+ ddr_start = 0x80000000;
+ }
+ else if (ddr_size == MEM_3GB)
+ {
+ ddr_start = 0x20000000;
+ }
+ else
+ {
+ dprintf(CRITICAL, "Unsupported memory map\n");
+ ASSERT(0);
+ }
+
+ kernel_mmu_section_table.paddress = ddr_start;
+ kernel_mmu_section_table.vaddress = ddr_start;
+ kernel_mmu_section_table.type = MMU_L2_NS_SECTION_MAPPING;
+ kernel_mmu_section_table.size = KERNEL_SIZE;
+ kernel_mmu_section_table.flags = COMMON_MEMORY;
+
+ /* Map kernel entry */
+ arm_mmu_map_entry(&kernel_mmu_section_table);
+
+ /* Map default memory needed for lk , scratch, rpmb & iomap */
for (i = 0 ; i < table_sz; i++)
arm_mmu_map_entry(&default_mmu_section_table[i]);
+ /* Map the rest of the DDR for 3GB needed for ramdump */
+ if (ddr_size == MEM_3GB)
+ {
+ for (i = 0 ; i < (int)ARRAY_SIZE(default_mmu_section_table_3gb); i++)
+ arm_mmu_map_entry(&default_mmu_section_table_3gb[i]);
+ }
+
if (scm_device_enter_dload())
{
/* TZ & Hyp memory can be mapped only while entering the download mode */
@@ -162,3 +202,8 @@
else
return 0;
}
+
+uint64_t platform_get_ddr_start()
+{
+ return ddr_start;
+}
diff --git a/platform/msm_shared/include/mmu.h b/platform/msm_shared/include/mmu.h
index d70872e..9154066 100644
--- a/platform/msm_shared/include/mmu.h
+++ b/platform/msm_shared/include/mmu.h
@@ -32,6 +32,9 @@
#include <sys/types.h>
#include <arch/arm/mmu.h>
+#define MEM_4GB 0x100000000
+#define MEM_3GB 0xC0000000
+
#ifdef LPAE
typedef struct {
uint64_t paddress;
diff --git a/platform/msm_shared/smem.h b/platform/msm_shared/smem.h
index aa8cd1f..7fbe57f 100644
--- a/platform/msm_shared/smem.h
+++ b/platform/msm_shared/smem.h
@@ -653,4 +653,5 @@
uint32_t smem_get_ram_ptable_len(void);
void* smem_get_alloc_entry(smem_mem_type_t type, uint32_t* size);
uint32_t get_ddr_start();
+uint64_t smem_get_ddr_size();
#endif /* __PLATFORM_MSM_SHARED_SMEM_H */
diff --git a/platform/msm_shared/smem_ptable.c b/platform/msm_shared/smem_ptable.c
index 647b0dc..4ed47b7 100644
--- a/platform/msm_shared/smem_ptable.c
+++ b/platform/msm_shared/smem_ptable.c
@@ -325,3 +325,25 @@
ASSERT("DDR Start Mem Not found\n");
return 0;
}
+
+uint64_t smem_get_ddr_size()
+{
+ uint32_t i;
+ ram_partition ptn_entry;
+ uint32_t len = 0;
+ uint64_t size = 0;
+
+ ASSERT(smem_ram_ptable_init_v1());
+
+ len = smem_get_ram_ptable_len();
+
+ /* Determine the Start addr of the DDR RAM */
+ for(i = 0; i < len; i++)
+ {
+ smem_get_ram_ptable_entry(&ptn_entry, i);
+ if(ptn_entry.type == SYS_MEMORY && ptn_entry.category == SDRAM)
+ size += ptn_entry.size;
+ }
+
+ return size;
+}
diff --git a/project/msm8996.mk b/project/msm8996.mk
index b7beef7..2669b56 100644
--- a/project/msm8996.mk
+++ b/project/msm8996.mk
@@ -36,10 +36,6 @@
DEFINES += ABOOT_IGNORE_BOOT_HEADER_ADDRS=1
-DEFINES += ABOOT_FORCE_KERNEL_ADDR=0x20008000
-DEFINES += ABOOT_FORCE_RAMDISK_ADDR=0x22200000
-DEFINES += ABOOT_FORCE_TAGS_ADDR=0x22000000
-DEFINES += ABOOT_FORCE_KERNEL64_ADDR=0x20080000
DEFINES += USB_RESET_FROM_CLK=1
DEFINES += USE_BOOTDEV_CMDLINE=1
DEFINES += USE_RPMB_FOR_DEVINFO=1
diff --git a/target/msm8996/rules.mk b/target/msm8996/rules.mk
index a0c3a8d..d9349f7 100644
--- a/target/msm8996/rules.mk
+++ b/target/msm8996/rules.mk
@@ -12,7 +12,6 @@
SCRATCH_ADDR := 0x91100000
SCRATCH_SIZE := 750
-KERNEL_ADDR := 0x20000000
KERNEL_SIZE := 512
# LPAE supports only 32 virtual address, L1 pt size is 4
L1_PT_SZ := 4
@@ -37,7 +36,6 @@
MEMBASE=$(MEMBASE) \
BASE_ADDR=$(BASE_ADDR) \
TAGS_ADDR=$(TAGS_ADDR) \
- KERNEL_ADDR=$(KERNEL_ADDR) \
KERNEL_SIZE=$(KERNEL_SIZE) \
RAMDISK_ADDR=$(RAMDISK_ADDR) \
SCRATCH_ADDR=$(SCRATCH_ADDR) \