| commit | bca5254166f0e5fba3d91f80103c4c2164617452 | [log] [tgz] |
|---|---|---|
| author | Channagoud Kadabi <ckadabi@codeaurora.org> | Thu Jan 30 14:35:39 2014 -0800 |
| committer | Channagoud Kadabi <ckadabi@codeaurora.org> | Thu Apr 17 14:42:43 2014 -0700 |
| tree | ccbffc7797ae0570fe65c8787587e7f9b6a17bf2 | |
| parent | b391cfee2e6a15ecfa84d47a25f04dfd4ff69a70 [diff] |
arch: arm: Fix armv7 init code Fix armv7 init code to add isb macro instead of isb function. Fix L2 cache invalidate code as per arm manual section B2-17. Use SCTLR (System Control Register) to enable & disable caches instead of ACTLR (Auxiliary control Register). Replace hand coded assembly with armv7 ISA. Change-Id: I740757a2a812d0f70a4c170af4065b4ff14e88e3