| commit | bcc0773cd78166052a47a303a545522d691d2e74 | [log] [tgz] |
|---|---|---|
| author | Travis Geiselbrecht <geist@foobox.com> | Tue Sep 02 00:42:34 2008 -0700 |
| committer | Travis Geiselbrecht <geist@foobox.com> | Tue Sep 02 00:42:34 2008 -0700 |
| tree | 67abf58f1ba2d32e73c22e62590fb4abaeee76ce | |
| parent | 5bfddfb66a08f762fff4b4a34e31ace9ff720e8b [diff] |
[omap3] add the appropriate little smi blurb you have to do to enable the L2
diff --git a/arch/arm/arch.c b/arch/arm/arch.c index 37b557c..ae2fcf2 100644 --- a/arch/arm/arch.c +++ b/arch/arm/arch.c
@@ -50,6 +50,11 @@ platform_init_mmu_mappings(); #endif +#if PLATFORM_OMAP3 + /* do an omap3 specific setup of the L2 */ + __asm__ volatile("mov r12, #1; .word 0xe1600070" ::: "r12"); +#endif + /* turn the cache back on */ arch_enable_cache(UCACHE);