Merge "platform: add MDP interface 2 base address"
diff --git a/app/aboot/aboot.c b/app/aboot/aboot.c
index 9482806..de8948e 100644
--- a/app/aboot/aboot.c
+++ b/app/aboot/aboot.c
@@ -493,7 +493,10 @@
 	if (boot_dev_buf)
 		free(boot_dev_buf);
 
-	dprintf(INFO, "cmdline: %s\n", cmdline_final ? cmdline_final : "");
+	if (cmdline_final)
+		dprintf(INFO, "cmdline: %s\n", cmdline_final);
+	else
+		dprintf(INFO, "cmdline is NULL\n");
 	return cmdline_final;
 }
 
@@ -1080,7 +1083,7 @@
 		imagesize_actual = (page_size + kernel_actual + ramdisk_actual);
 
 #endif
-		if (check_aboot_addr_range_overlap(image_addr, imagesize_actual))
+		if (check_aboot_addr_range_overlap((uint32_t) image_addr, imagesize_actual))
 		{
 			dprintf(CRITICAL, "Boot image buffer address overlaps with aboot addresses.\n");
 			return -1;
@@ -1103,7 +1106,7 @@
 		bs_set_timestamp(BS_KERNEL_LOAD_DONE);
 
 		#ifdef TZ_SAVE_KERNEL_HASH
-		aboot_save_boot_hash_mmc(image_addr, imagesize_actual);
+		aboot_save_boot_hash_mmc((uint32_t) image_addr, imagesize_actual);
 		#endif /* TZ_SAVE_KERNEL_HASH */
 
 		/* Move kernel, ramdisk and device tree to correct address */
@@ -2166,10 +2169,10 @@
 void cmd_flash_mmc(const char *arg, void *data, unsigned sz)
 {
 	sparse_header_t *sparse_header;
-	/* 8 Byte Magic + 2048 Byte xml + Encrypted Data */
-	unsigned int *magic_number = (unsigned int *) data;
 
 #ifdef SSD_ENABLE
+	/* 8 Byte Magic + 2048 Byte xml + Encrypted Data */
+	unsigned int *magic_number = (unsigned int *) data;
 	int              ret=0;
 	uint32           major_version=0;
 	uint32           minor_version=0;
@@ -2841,7 +2844,7 @@
 #endif
 
 	target_crypto_init_params();
-	hash_find(image_addr, image_size, (unsigned char *)&digest, auth_algo);
+	hash_find((unsigned char *) image_addr, image_size, (unsigned char *)&digest, auth_algo);
 
 	save_kernel_hash_cmd(digest);
 	dprintf(INFO, "aboot_save_boot_hash_mmc: imagesize_actual size %d bytes.\n", (int) image_size);
diff --git a/dev/gcdb/display/gcdb_autopll.c b/dev/gcdb/display/gcdb_autopll.c
index cff176f..646d575 100755
--- a/dev/gcdb/display/gcdb_autopll.c
+++ b/dev/gcdb/display/gcdb_autopll.c
@@ -97,7 +97,6 @@
 
 static uint32_t calculate_div3(uint8_t bpp, uint8_t num_of_lanes)
 {
-	uint32_t ret = NO_ERROR;
 	pll_data.pclk_m = 0x1; /* M = 1, N= 1 */
 	pll_data.pclk_n = 0xFF; /* ~ (N-M) = 0xff */
 	pll_data.pclk_d = 0xFF; /* ~N = 0xFF */
@@ -138,6 +137,7 @@
 	}
 
 	pll_data.posdiv3--;	/* Register needs one value less */
+	return NO_ERROR;
 }
 
 static uint32_t calculate_dec_frac_start()
@@ -165,13 +165,11 @@
 
 	dprintf(SPEW, "%s: dec_start=0x%x dec_frac=0x%x lock_comp=0x%x\n", __func__,
 		pll_data.dec_start, pll_data.frac_start, pll_data.lock_comp);
+	return NO_ERROR;
 }
 
 static uint32_t calculate_vco_28nm(uint8_t bpp, uint8_t num_of_lanes)
 {
-	uint8_t  counter = 0;
-	uint32_t temprate = 0;
-
 	/* If half bitclock is more than VCO min value */
 	if (pll_data.halfbit_clock > VCO_MIN_CLOCK) {
 
diff --git a/dev/gcdb/display/gcdb_display.c b/dev/gcdb/display/gcdb_display.c
index f0503ee..7d97842 100755
--- a/dev/gcdb/display/gcdb_display.c
+++ b/dev/gcdb/display/gcdb_display.c
@@ -30,11 +30,13 @@
 #include <debug.h>
 #include <err.h>
 #include <smem.h>
+#include <clock.h>
 #include <msm_panel.h>
 #include <string.h>
 #include <stdlib.h>
 #include <board.h>
 #include <mdp5.h>
+#include <qtimer.h>
 #include <platform/gpio.h>
 #include <mipi_dsi.h>
 
@@ -288,7 +290,6 @@
 		buf_size -= strlen(sctl_string);
 		strlcpy(pbuf, slave_panel_node, buf_size);
 	}
-end:
 	return ret;
 }
 
diff --git a/dev/gcdb/display/include/display_resource.h b/dev/gcdb/display/include/display_resource.h
index 5194022..6250427 100755
--- a/dev/gcdb/display/include/display_resource.h
+++ b/dev/gcdb/display/include/display_resource.h
@@ -66,7 +66,7 @@
 /*---------------------------------------------------------------------------*/
 
 /*GPIO pin structure to define reset pin, enable pin, te pin, etc. */
-typedef struct gpio_pin{
+struct gpio_pin{
 
 	char    *pin_source;
 	uint32_t pin_id;
@@ -77,7 +77,7 @@
 };
 
 /*LDO entry structure for different LDO entries. */
-typedef struct ldo_entry{
+struct ldo_entry{
 	char    *ldo_name;
 	uint32_t ldo_id;
 	uint32_t ldo_type;
diff --git a/dev/gcdb/display/include/panel.h b/dev/gcdb/display/include/panel.h
index 701f9e7..e20b76a 100755
--- a/dev/gcdb/display/include/panel.h
+++ b/dev/gcdb/display/include/panel.h
@@ -39,7 +39,7 @@
 #define TOTAL_RESET_GPIO_CTRL 5
 
 /*---------------------------------------------------------------------------*/
-/* panel type
+/* panel type 								     */
 /*---------------------------------------------------------------------------*/
 enum {
 	PANEL_TYPE_UNKNOWN,
@@ -53,7 +53,7 @@
 /*---------------------------------------------------------------------------*/
 
 /*Panel Configuration */
-typedef struct panel_config{
+struct panel_config{
 
 	char  *panel_node_id;
 	char  *panel_controller;
@@ -78,7 +78,7 @@
 	char  *slave_panel_node_id;
 };
 
-typedef struct panel_resolution{
+struct panel_resolution{
 
 	uint16_t panel_width;
 	uint16_t panel_height;
@@ -100,7 +100,7 @@
 	uint16_t invert_hsync_polarity;
 };
 
-typedef struct color_info{
+struct color_info{
 	uint8_t  color_format;
 	uint8_t  color_order;
 	uint8_t  underflow_color;
@@ -109,12 +109,12 @@
 	uint8_t  pixel_alignment;
 };
 
-typedef struct command_state {
+struct command_state {
 	uint8_t oncommand_state;
 	uint8_t offcommand_state;
 };
 
-typedef struct videopanel_info {
+struct videopanel_info {
 	uint8_t hsync_pulse;
 	uint8_t hfp_power_mode;
 	uint8_t hbp_power_mode;
@@ -126,7 +126,7 @@
 	uint32_t  bllp_eof_power;
 };
 
-typedef struct commandpanel_info {
+struct commandpanel_info {
 	uint8_t techeck_enable;
 	uint8_t tepin_select;
 	uint8_t teusing_tepin;
@@ -141,7 +141,7 @@
 	uint32_t cmdmode_idletime;
 };
 
-typedef struct lane_configuration {
+struct lane_configuration {
 	uint8_t dsi_lanes;
 	uint8_t dsi_lanemap;
 	uint8_t lane0_state;
@@ -150,7 +150,7 @@
 	uint8_t lane3_state;
 };
 
-typedef struct panel_timing {
+struct panel_timing {
 	uint8_t dsi_mdp_trigger;
 	uint8_t dsi_dma_trigger;
 	uint8_t tclk_post;
@@ -163,13 +163,13 @@
 	BL_DCS,
 };
 
-typedef struct panel_reset_sequence {
+struct panel_reset_sequence {
 	uint8_t pin_state[TOTAL_RESET_GPIO_CTRL];
 	uint32_t sleep[TOTAL_RESET_GPIO_CTRL];
 	uint8_t pin_direction;
 };
 
-typedef struct backlight {
+struct backlight {
 	uint16_t bl_interface_type;
 	uint16_t bl_min_level;
 	uint16_t bl_max_level;
@@ -178,7 +178,7 @@
 	char     *bl_pmic_model;
 };
 
-typedef struct fb_compression {
+struct fb_compression {
 	uint32_t enabled;
 	uint32_t comp_ratio;
 	uint32_t comp_mode;
diff --git a/dev/gcdb/display/include/panel_hx8379a_truly_fwvga_video.h b/dev/gcdb/display/include/panel_hx8379a_truly_fwvga_video.h
index ea638cf..528cb26 100755
--- a/dev/gcdb/display/include/panel_hx8379a_truly_fwvga_video.h
+++ b/dev/gcdb/display/include/panel_hx8379a_truly_fwvga_video.h
@@ -44,7 +44,7 @@
 /*---------------------------------------------------------------------------*/
 static struct panel_config hx8379a_truly_fwvga_video_panel_data = {
 	"qcom,mdss_dsi_hx8379a_truly_fwvga_video", "dsi:0:", "qcom,mdss-dsi-panel",
-	10, 0, "DISPLAY_1", 0, 0, 60, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+	10, 0, "DISPLAY_1", 0, 0, 60, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ""
 };
 
 /*---------------------------------------------------------------------------*/
diff --git a/dev/gcdb/display/include/panel_jdi_1080p_video.h b/dev/gcdb/display/include/panel_jdi_1080p_video.h
index bcee0c1..2dbc2ba 100755
--- a/dev/gcdb/display/include/panel_jdi_1080p_video.h
+++ b/dev/gcdb/display/include/panel_jdi_1080p_video.h
@@ -47,7 +47,7 @@
 
 static struct panel_config jdi_1080p_video_panel_data = {
   "qcom,mdss_dsi_jdi_1080p_video", "dsi:0:", "qcom,mdss-dsi-panel",
-  10, 0, "DISPLAY_1", 0, 0, 60, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1
+  10, 0, "DISPLAY_1", 0, 0, 60, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, ""
 };
 
 /*---------------------------------------------------------------------------*/
@@ -90,11 +90,11 @@
 
 
 static struct mipi_dsi_cmd jdi_1080p_video_on_command[] = {
-{ 0x4 , jdi_1080p_video_on_cmd0},
-{ 0x4 , jdi_1080p_video_on_cmd1},
-{ 0x4 , jdi_1080p_video_on_cmd2},
-{ 0x4 , jdi_1080p_video_on_cmd3},
-{ 0x4 , jdi_1080p_video_on_cmd4}
+{ 0x4 , jdi_1080p_video_on_cmd0, 0x0},
+{ 0x4 , jdi_1080p_video_on_cmd1, 0x0},
+{ 0x4 , jdi_1080p_video_on_cmd2, 0x0},
+{ 0x4 , jdi_1080p_video_on_cmd3, 0x0},
+{ 0x4 , jdi_1080p_video_on_cmd4, 0x0}
 };
 #define JDI_1080P_VIDEO_ON_COMMAND 5
 
@@ -110,8 +110,8 @@
 
 
 static struct mipi_dsi_cmd jdi_1080p_video_off_command[] = {
-{ 0x4 , jdi_1080p_videooff_cmd0},
-{ 0x4 , jdi_1080p_videooff_cmd1}
+{ 0x4 , jdi_1080p_videooff_cmd0, 0},
+{ 0x4 , jdi_1080p_videooff_cmd1, 0}
 };
 #define JDI_1080P_VIDEO_OFF_COMMAND 2
 
@@ -152,14 +152,6 @@
   0xe7, 0x36, 0x24, 0x00, 0x66, 0x6a, 0x2a, 0x3a,  0x2d, 0x03, 0x04, 0x00
 };
 
-
-
-static struct mipi_dsi_cmd jdi_1080p_video_rotation[] = {
-
-};
-#define JDI_1080P_VIDEO_ROTATION 0
-
-
 static struct panel_timing jdi_1080p_video_timing_info = {
   0x0, 0x04, 0x04, 0x1b
 };
diff --git a/dev/gcdb/display/panel_display.c b/dev/gcdb/display/panel_display.c
index 400b698..9ecd88a 100755
--- a/dev/gcdb/display/panel_display.c
+++ b/dev/gcdb/display/panel_display.c
@@ -33,19 +33,19 @@
 #include <stdint.h>
 #include <msm_panel.h>
 #include <mipi_dsi.h>
+#include <mdp5.h>
 #include <sys/types.h>
 #include <platform/iomap.h>
 #include <err.h>
 #include <reg.h>
-#include <mdp5.h>
 #include <string.h>
 
-
 /*---------------------------------------------------------------------------*/
 /* Panel Header                                                              */
 /*---------------------------------------------------------------------------*/
 #include "panel_display.h"
 #include "include/panel.h"
+#include "target/display.h"
 
 /*---------------------------------------------------------------------------*/
 /* Panel Init                                                                */
diff --git a/dev/gcdb/display/panel_display.h b/dev/gcdb/display/panel_display.h
index 3c99289..8860f00 100755
--- a/dev/gcdb/display/panel_display.h
+++ b/dev/gcdb/display/panel_display.h
@@ -52,7 +52,7 @@
 /*---------------------------------------------------------------------------*/
 /* struct definition                                                         */
 /*---------------------------------------------------------------------------*/
-typedef struct panel_struct{
+struct panel_struct{
 	struct panel_config         *paneldata;
 	struct panel_resolution     *panelres;
 	struct color_info           *color;
diff --git a/platform/apq8084/platform.c b/platform/apq8084/platform.c
index 923588d..cf13b5a 100644
--- a/platform/apq8084/platform.c
+++ b/platform/apq8084/platform.c
@@ -167,8 +167,3 @@
 	/* Using 1-1 mapping on this platform. */
 	return phys_addr;
 }
-
-int boot_device_mask(int val)
-{
-	return ((val & 0x3E) >> 1);
-}
diff --git a/platform/init.c b/platform/init.c
index 095f6e2..4783eba 100644
--- a/platform/init.c
+++ b/platform/init.c
@@ -130,3 +130,8 @@
 {
         return 0;
 }
+
+__WEAK int boot_device_mask(int val)
+{
+	return ((val & 0x3E) >> 1);
+}
diff --git a/platform/msm8994/include/platform/gpio.h b/platform/msm8994/include/platform/gpio.h
index bce399b..154fbdf 100644
--- a/platform/msm8994/include/platform/gpio.h
+++ b/platform/msm8994/include/platform/gpio.h
@@ -57,4 +57,7 @@
 
 void gpio_config_uart_dm(uint8_t id);
 void gpio_config_blsp_i2c(uint8_t, uint8_t);
+void gpio_set(uint32_t gpio, uint32_t dir);
+void gpio_tlmm_config(uint32_t gpio, uint8_t func, uint8_t dir, uint8_t pull,
+		uint8_t drvstr, uint32_t enable);
 #endif
diff --git a/platform/msm8994/include/platform/iomap.h b/platform/msm8994/include/platform/iomap.h
index 4419306..1774aa5 100644
--- a/platform/msm8994/include/platform/iomap.h
+++ b/platform/msm8994/include/platform/iomap.h
@@ -255,69 +255,251 @@
 #define MDP_PP_1_BASE               REG_MDP(0x71800)
 
 #define REG_MDP(off)                (MDP_BASE + (off))
+
+#ifdef MDP_HW_REV
+#undef MDP_HW_REV
+#endif
 #define MDP_HW_REV                              REG_MDP(0x1000)
+
+#ifdef MDP_INTR_EN
+#undef MDP_INTR_EN
+#endif
 #define MDP_INTR_EN                             REG_MDP(0x1010)
+
+#ifdef MDP_INTR_CLEAR
+#undef MDP_INTR_CLEAR
+#endif
 #define MDP_INTR_CLEAR                          REG_MDP(0x1018)
+
+#ifdef MDP_HIST_INTR_EN
+#undef MDP_HIST_INTR_EN
+#endif
 #define MDP_HIST_INTR_EN                        REG_MDP(0x101C)
 
+#ifdef MDP_DISP_INTF_SEL
+#undef MDP_DISP_INTF_SEL
+#endif
 #define MDP_DISP_INTF_SEL                       REG_MDP(0x1004)
+
+#ifdef MDP_VIDEO_INTF_UNDERFLOW_CTL
+#undef MDP_VIDEO_INTF_UNDERFLOW_CTL
+#endif
 #define MDP_VIDEO_INTF_UNDERFLOW_CTL            REG_MDP(0x12E0)
+
+#ifdef MDP_UPPER_NEW_ROI_PRIOR_RO_START
+#undef MDP_UPPER_NEW_ROI_PRIOR_RO_START
+#endif
 #define MDP_UPPER_NEW_ROI_PRIOR_RO_START        REG_MDP(0x11EC)
+
+#ifdef MDP_LOWER_NEW_ROI_PRIOR_TO_START
+#undef MDP_LOWER_NEW_ROI_PRIOR_TO_START
+#endif
 #define MDP_LOWER_NEW_ROI_PRIOR_TO_START        REG_MDP(0x13F8)
 
+#ifdef MDP_INTF_0_TIMING_ENGINE_EN
+#undef MDP_INTF_0_TIMING_ENGINE_EN
+#endif
 #define MDP_INTF_0_TIMING_ENGINE_EN             REG_MDP(0x6b000)
+
+#ifdef MDP_INTF_1_TIMING_ENGINE_EN
+#undef MDP_INTF_1_TIMING_ENGINE_EN
+#endif
 #define MDP_INTF_1_TIMING_ENGINE_EN             REG_MDP(0x6b800)
 #define MDP_INTF_2_TIMING_ENGINE_EN             REG_MDP(0x6C000)
 
-#define MDP_CTL_0_BASE              		REG_MDP(0x2000)
-#define MDP_CTL_1_BASE              		REG_MDP(0x2200)
+#ifdef MDP_CTL_0_BASE
+#undef MDP_CTL_0_BASE
+#endif
+#define MDP_CTL_0_BASE				REG_MDP(0x2000)
 
+#ifdef MDP_CTL_1_BASE
+#undef MDP_CTL_1_BASE
+#endif
+#define MDP_CTL_1_BASE				REG_MDP(0x2200)
+
+#ifdef MDP_REG_SPLIT_DISPLAY_EN
+#undef MDP_REG_SPLIT_DISPLAY_EN
+#endif
 #define MDP_REG_SPLIT_DISPLAY_EN                REG_MDP(0x12F4)
+
+#ifdef MDP_REG_SPLIT_DISPLAY_UPPER_PIPE_CTL
+#undef MDP_REG_SPLIT_DISPLAY_UPPER_PIPE_CTL
+#endif
 #define MDP_REG_SPLIT_DISPLAY_UPPER_PIPE_CTL    REG_MDP(0x12F8)
+
+#ifdef MDP_REG_SPLIT_DISPLAY_LOWER_PIPE_CTL
+#undef MDP_REG_SPLIT_DISPLAY_LOWER_PIPE_CTL
+#endif
 #define MDP_REG_SPLIT_DISPLAY_LOWER_PIPE_CTL    REG_MDP(0x13F0)
 
-/* can not find following two registers */
-#define MDP_REG_PPB0_CNTL                       REG_MDP(0x1420)
-#define MDP_REG_PPB0_CONFIG                     REG_MDP(0x1424)
-
+#ifdef MDP_INTF_0_BASE
+#undef MDP_INTF_0_BASE
+#endif
 #define MDP_INTF_0_BASE                         REG_MDP(0x6b000)
+
+#ifdef MDP_INTF_1_BASE
+#undef MDP_INTF_1_BASE
+#endif
 #define MDP_INTF_1_BASE                         REG_MDP(0x6b800)
+
+#ifdef MDP_INTF_2_BASE
+#undef MDP_INTF_2_BASE
+#endif
 #define MDP_INTF_2_BASE                         REG_MDP(0x6c000)
 
-
+#ifdef MDP_CLK_CTRL0
+#undef MDP_CLK_CTRL0
+#endif
 #define MDP_CLK_CTRL0                           REG_MDP(0x12AC)
+
+#ifdef MDP_CLK_CTRL1
+#undef MDP_CLK_CTRL1
+#endif
 #define MDP_CLK_CTRL1                           REG_MDP(0x12B4)
+
+#ifdef MDP_CLK_CTRL2
+#undef MDP_CLK_CTRL2
+#endif
 #define MDP_CLK_CTRL2                           REG_MDP(0x12BC)
+
+#ifdef MDP_CLK_CTRL3
+#undef MDP_CLK_CTRL3
+#endif
 #define MDP_CLK_CTRL3                           REG_MDP(0x13A8)
+
+#ifdef MDP_CLK_CTRL4
+#undef MDP_CLK_CTRL4
+#endif
 #define MDP_CLK_CTRL4                           REG_MDP(0x13B0)
+
+#ifdef MDP_CLK_CTRL5
+#undef MDP_CLK_CTRL5
+#endif
 #define MDP_CLK_CTRL5                           REG_MDP(0x13B8)
+
+#ifdef MDP_CLK_CTRL6
+#undef MDP_CLK_CTRL6
+#endif
 #define MDP_CLK_CTRL6                           REG_MDP(0x12C4)
+
+#ifdef MDP_CLK_CTRL7
+#undef MDP_CLK_CTRL7
+#endif
 #define MDP_CLK_CTRL7                           REG_MDP(0x13D0)
 
+#ifdef MMSS_MDP_SMP_ALLOC_W_BASE
+#undef MMSS_MDP_SMP_ALLOC_W_BASE
+#endif
 #define MMSS_MDP_SMP_ALLOC_W_BASE               REG_MDP(0x1080)
+
+#ifdef MMSS_MDP_SMP_ALLOC_R_BASE
+#undef MMSS_MDP_SMP_ALLOC_R_BASE
+#endif
 #define MMSS_MDP_SMP_ALLOC_R_BASE               REG_MDP(0x1130)
 
+#ifdef MDP_QOS_REMAPPER_CLASS_0
+#undef MDP_QOS_REMAPPER_CLASS_0
+#endif
 #define MDP_QOS_REMAPPER_CLASS_0                REG_MDP(0x11E0)
+
+#ifdef MDP_QOS_REMAPPER_CLASS_1
+#undef MDP_QOS_REMAPPER_CLASS_1
+#endif
 #define MDP_QOS_REMAPPER_CLASS_1                REG_MDP(0x11E4)
 
+#ifdef VBIF_VBIF_DDR_FORCE_CLK_ON
+#undef VBIF_VBIF_DDR_FORCE_CLK_ON
+#endif
 #define VBIF_VBIF_DDR_FORCE_CLK_ON              REG_MDP(0xc8004)
+
+#ifdef VBIF_VBIF_DDR_OUT_MAX_BURST
+#undef VBIF_VBIF_DDR_OUT_MAX_BURST
+#endif
 #define VBIF_VBIF_DDR_OUT_MAX_BURST             REG_MDP(0xc80D8)
+
+#ifdef VBIF_VBIF_DDR_ARB_CTRL
+#undef VBIF_VBIF_DDR_ARB_CTRL
+#endif
 #define VBIF_VBIF_DDR_ARB_CTRL                  REG_MDP(0xc80F0)
+
+#ifdef VBIF_VBIF_DDR_RND_RBN_QOS_ARB
+#undef VBIF_VBIF_DDR_RND_RBN_QOS_ARB
+#endif
 #define VBIF_VBIF_DDR_RND_RBN_QOS_ARB           REG_MDP(0xc8124)
+
+#ifdef VBIF_VBIF_DDR_AXI_AMEMTYPE_CONF0
+#undef VBIF_VBIF_DDR_AXI_AMEMTYPE_CONF0
+#endif
 #define VBIF_VBIF_DDR_AXI_AMEMTYPE_CONF0        REG_MDP(0xc8160)
+
+#ifdef VBIF_VBIF_DDR_AXI_AMEMTYPE_CONF1
+#undef VBIF_VBIF_DDR_AXI_AMEMTYPE_CONF1
+#endif
 #define VBIF_VBIF_DDR_AXI_AMEMTYPE_CONF1        REG_MDP(0xc8164)
+
+#ifdef VBIF_VBIF_DDR_OUT_AOOO_AXI_EN
+#undef VBIF_VBIF_DDR_OUT_AOOO_AXI_EN
+#endif
 #define VBIF_VBIF_DDR_OUT_AOOO_AXI_EN           REG_MDP(0xc8178)
+
+#ifdef VBIF_VBIF_DDR_OUT_AX_AOOO
+#undef VBIF_VBIF_DDR_OUT_AX_AOOO
+#endif
 #define VBIF_VBIF_DDR_OUT_AX_AOOO               REG_MDP(0xc817C)
+
+#ifdef VBIF_VBIF_IN_RD_LIM_CONF0
+#undef VBIF_VBIF_IN_RD_LIM_CONF0
+#endif
 #define VBIF_VBIF_IN_RD_LIM_CONF0               REG_MDP(0xc80B0)
+
+#ifdef VBIF_VBIF_IN_RD_LIM_CONF1
+#undef VBIF_VBIF_IN_RD_LIM_CONF1
+#endif
 #define VBIF_VBIF_IN_RD_LIM_CONF1               REG_MDP(0xc80B4)
+
+#ifdef VBIF_VBIF_IN_RD_LIM_CONF2
+#undef VBIF_VBIF_IN_RD_LIM_CONF2
+#endif
 #define VBIF_VBIF_IN_RD_LIM_CONF2               REG_MDP(0xc80B8)
+
+#ifdef VBIF_VBIF_IN_RD_LIM_CONF3
+#undef VBIF_VBIF_IN_RD_LIM_CONF3
+#endif
 #define VBIF_VBIF_IN_RD_LIM_CONF3               REG_MDP(0xc80BC)
+
+#ifdef VBIF_VBIF_IN_WR_LIM_CONF0
+#undef VBIF_VBIF_IN_WR_LIM_CONF0
+#endif
 #define VBIF_VBIF_IN_WR_LIM_CONF0               REG_MDP(0xc80C0)
+
+#ifdef VBIF_VBIF_IN_WR_LIM_CONF1
+#undef VBIF_VBIF_IN_WR_LIM_CONF1
+#endif
 #define VBIF_VBIF_IN_WR_LIM_CONF1               REG_MDP(0xc80C4)
+
+#ifdef VBIF_VBIF_IN_WR_LIM_CONF2
+#undef VBIF_VBIF_IN_WR_LIM_CONF2
+#endif
 #define VBIF_VBIF_IN_WR_LIM_CONF2               REG_MDP(0xc80C8)
+
+#ifdef VBIF_VBIF_IN_WR_LIM_CONF3
+#undef VBIF_VBIF_IN_WR_LIM_CONF3
+#endif
 #define VBIF_VBIF_IN_WR_LIM_CONF3               REG_MDP(0xc80CC)
+
+#ifdef VBIF_VBIF_ABIT_SHORT
+#undef VBIF_VBIF_ABIT_SHORT
+#endif
 #define VBIF_VBIF_ABIT_SHORT                    REG_MDP(0xc8070)
+
+#ifdef VBIF_VBIF_ABIT_SHORT_CONF
+#undef VBIF_VBIF_ABIT_SHORT_CONF
+#endif
 #define VBIF_VBIF_ABIT_SHORT_CONF               REG_MDP(0xc8074)
+
+#ifdef VBIF_VBIF_GATE_OFF_WRREQ_EN
+#undef VBIF_VBIF_GATE_OFF_WRREQ_EN
+#endif
 #define VBIF_VBIF_GATE_OFF_WRREQ_EN             REG_MDP(0xc80A8)
 
 #define MDP_VP_0_VIG_0_BASE                     REG_MDP(0x5000)
diff --git a/platform/msm8994/msm8994-clock.c b/platform/msm8994/msm8994-clock.c
index 5ee2d5c..358db25 100644
--- a/platform/msm8994/msm8994-clock.c
+++ b/platform/msm8994/msm8994-clock.c
@@ -158,24 +158,6 @@
 	F_END
 };
 
-static struct rcg_clk blsp2_uart2_apps_clk_src =
-{
-	.cmd_reg      = (uint32_t *) BLSP2_UART2_APPS_CMD_RCGR,
-	.cfg_reg      = (uint32_t *) BLSP2_UART2_APPS_CFG_RCGR,
-	.m_reg        = (uint32_t *) BLSP2_UART2_APPS_M,
-	.n_reg        = (uint32_t *) BLSP2_UART2_APPS_N,
-	.d_reg        = (uint32_t *) BLSP2_UART2_APPS_D,
-
-	.set_rate     = clock_lib2_rcg_set_rate_mnd,
-	.freq_tbl     = ftbl_gcc_blsp1_2_uart1_6_apps_clk,
-	.current_freq = &rcg_dummy_freq,
-
-	.c = {
-		.dbg_name = "blsp1_uart2_apps_clk",
-		.ops      = &clk_ops_rcg_mnd,
-	},
-};
-
 static struct rcg_clk blsp1_uart2_apps_clk_src =
 {
 	.cmd_reg      = (uint32_t *) BLSP1_UART2_APPS_CMD_RCGR,
@@ -194,17 +176,6 @@
 	},
 };
 
-static struct branch_clk gcc_blsp2_uart2_apps_clk =
-{
-	.cbcr_reg     = (uint32_t *) BLSP2_UART2_APPS_CBCR,
-	.parent       = &blsp2_uart2_apps_clk_src.c,
-
-	.c = {
-		.dbg_name = "gcc_blsp2_uart2_apps_clk",
-		.ops      = &clk_ops_branch,
-	},
-};
-
 static struct branch_clk gcc_blsp1_uart2_apps_clk =
 {
 	.cbcr_reg     = (uint32_t *) BLSP1_UART2_APPS_CBCR,
@@ -227,17 +198,6 @@
 	},
 };
 
-static struct vote_clk gcc_blsp2_ahb_clk = {
-	.cbcr_reg     = (uint32_t *) BLSP2_AHB_CBCR,
-	.vote_reg     = (uint32_t *) APCS_CLOCK_BRANCH_ENA_VOTE,
-	.en_mask      = BIT(15),
-
-	.c = {
-		.dbg_name = "gcc_blsp2_ahb_clk",
-		.ops      = &clk_ops_vote,
-	},
-};
-
 /* USB Clocks */
 static struct clk_freq_tbl ftbl_gcc_usb_hs_system_clk[] =
 {
@@ -708,7 +668,7 @@
 };
 
 static struct branch_clk mdss_mdp_lut_clk = {
-	.cbcr_reg    = MDP_LUT_CBCR,
+	.cbcr_reg    = (uint32_t *) MDP_LUT_CBCR,
 	.parent      = &mdss_mdp_clk_src.c,
 	.has_sibling = 1,
 
@@ -719,7 +679,7 @@
 };
 
 static struct branch_clk mdss_vsync_clk = {
-	.cbcr_reg    = MDSS_VSYNC_CBCR,
+	.cbcr_reg    = (uint32_t *) MDSS_VSYNC_CBCR,
 	.parent      = &vsync_clk_src.c,
 	.has_sibling = 0,
 
@@ -746,7 +706,7 @@
 };
 
 static struct branch_clk mdss_edpaux_clk = {
-	.cbcr_reg    = MDSS_EDPAUX_CBCR,
+	.cbcr_reg    = (uint32_t *) MDSS_EDPAUX_CBCR,
 	.parent      = &edpaux_clk_src.c,
 	.has_sibling = 0,
 
@@ -811,7 +771,7 @@
 };
 
 static struct branch_clk mmss_misc_ahb_clk = {
-	.cbcr_reg = MMSS_MISC_AHB_CBCR,
+	.cbcr_reg = (uint32_t *) MMSS_MISC_AHB_CBCR,
 	.has_sibling = 1,
 
 	.c = {
diff --git a/platform/msm8994/platform.c b/platform/msm8994/platform.c
index 80f4ad3..560a021 100644
--- a/platform/msm8994/platform.c
+++ b/platform/msm8994/platform.c
@@ -180,8 +180,3 @@
 	else
 		return ((addr_t)BS_INFO_ADDR2);
 }
-
-int boot_device_mask(int val)
-{
-	return ((val & 0x3E) >> 1);
-}
diff --git a/platform/msm_shared/mipi_dsi.c b/platform/msm_shared/mipi_dsi.c
index 6f4e9a4..08b675f 100644
--- a/platform/msm_shared/mipi_dsi.c
+++ b/platform/msm_shared/mipi_dsi.c
@@ -35,6 +35,7 @@
 #include <string.h>
 #include <debug.h>
 #include <target/display.h>
+#include <mdp5.h>
 #include <platform/iomap.h>
 #include <platform/clock.h>
 #include <platform/timer.h>
diff --git a/target/msm8994/include/target/display.h b/target/msm8994/include/target/display.h
index b9d5dfe..35643a0 100644
--- a/target/msm8994/include/target/display.h
+++ b/target/msm8994/include/target/display.h
@@ -34,31 +34,6 @@
 /*---------------------------------------------------------------------------*/
 #include <display_resource.h>
 
-/*---------------------------------------------------------------------------*/
-/* GPIO configuration                                                        */
-/*---------------------------------------------------------------------------*/
-static struct gpio_pin reset_gpio = {
-  "msmgpio", 78, 3, 1, 0, 1
-};
-
-static struct gpio_pin lcd_reg_en = {	/* boost regulator */
-  "pm8994_gpios", 14, 3, 1, 0, 1
-};
-
-static struct gpio_pin bklt_gpio = {	/* lcd_bklt_reg_en */
-  "pmi8994_gpios", 2, 3, 1, 0, 1
-};
-
-/*---------------------------------------------------------------------------*/
-/* LDO configuration                                                         */
-/*---------------------------------------------------------------------------*/
-static struct ldo_entry ldo_entry_array[] = {
-  { "vdd", 14, 0, 1800000, 100000, 100, 0, 20, 0, 0},
-  { "vddio", 12, 0, 1800000, 100000, 100, 0, 20, 0, 0},
-  { "vdda", 2, 1, 1250000, 100000, 100, 0, 0, 0, 0},
-  { "vcca", 28, 1, 1000000, 10000, 100, 0, 0, 0, 0},
-};
-
 #define TOTAL_LDO_DEFINED 3
 
 /*---------------------------------------------------------------------------*/
@@ -107,3 +82,16 @@
 #define PWM_BL_LPG_CHAN_ID           4	/* lpg_out<3> */
 
 #endif
+
+/*---------------------------------------------------------------------------*/
+/* Functions		                                                     */
+/*---------------------------------------------------------------------------*/
+int target_display_pre_on();
+int target_display_pre_off();
+int target_display_post_on();
+int target_display_post_off();
+int target_cont_splash_screen();
+void target_force_cont_splash_disable(uint8_t override);
+uint8_t target_panel_auto_detect_enabled();
+
+
diff --git a/target/msm8994/init.c b/target/msm8994/init.c
index e0917f3..d12a60f 100644
--- a/target/msm8994/init.c
+++ b/target/msm8994/init.c
@@ -61,6 +61,8 @@
 #include <pm8x41_wled.h>
 #include <qpnp_wled.h>
 
+#include "target/display.h"
+
 #define CE_INSTANCE             2
 #define CE_EE                   1
 #define CE_FIFO_SIZE            64
diff --git a/target/msm8994/oem_panel.c b/target/msm8994/oem_panel.c
index 859c706..d1f57e7 100644
--- a/target/msm8994/oem_panel.c
+++ b/target/msm8994/oem_panel.c
@@ -28,11 +28,13 @@
  */
 
 #include <debug.h>
+#include <string.h>
 #include <err.h>
 #include <smem.h>
 #include <msm_panel.h>
 #include <board.h>
 #include <mipi_dsi.h>
+#include <qtimer.h>
 
 #include "include/panel.h"
 #include "panel_display.h"
diff --git a/target/msm8994/target_display.c b/target/msm8994/target_display.c
index 171f3d6..7e6cdea 100644
--- a/target/msm8994/target_display.c
+++ b/target/msm8994/target_display.c
@@ -28,6 +28,7 @@
  */
 
 #include <debug.h>
+#include <string.h>
 #include <smem.h>
 #include <err.h>
 #include <msm_panel.h>
@@ -39,12 +40,16 @@
 #include <mdp5.h>
 #include <scm.h>
 #include <endian.h>
+#include <regulator.h>
+#include <qtimer.h>
+#include <arch/defines.h>
 #include <platform/gpio.h>
 #include <platform/clock.h>
 #include <platform/iomap.h>
 #include <target/display.h>
 #include "include/panel.h"
 #include "include/display_resource.h"
+#include "gcdb_display.h"
 
 #define HFPLL_LDO_ID 12
 
@@ -57,6 +62,21 @@
 #define PMIC_WLED_SLAVE_ID 3
 #define PMIC_MPP_SLAVE_ID 2
 
+/*---------------------------------------------------------------------------*/
+/* GPIO configuration                                                        */
+/*---------------------------------------------------------------------------*/
+static struct gpio_pin reset_gpio = {
+  "msmgpio", 78, 3, 1, 0, 1
+};
+
+static struct gpio_pin lcd_reg_en = {	/* boost regulator */
+  "pm8994_gpios", 14, 3, 1, 0, 1
+};
+
+static struct gpio_pin bklt_gpio = {	/* lcd_bklt_reg_en */
+  "pmi8994_gpios", 2, 3, 1, 0, 1
+};
+
 static void dsi_pll_20nm_phy_init( uint32_t pll_base, int off)
 {
 	mdss_dsi_pll_20nm_sw_reset_st_machine(pll_base);
@@ -363,12 +383,8 @@
 
 bool target_display_panel_node(char *panel_name, char *pbuf, uint16_t buf_size)
 {
-	int prefix_string_len = strlen(DISPLAY_CMDLINE_PREFIX);
-	bool ret = true;
+	return gcdb_display_cmdline_arg(panel_name, pbuf, buf_size);
 
-	ret = gcdb_display_cmdline_arg(panel_name, pbuf, buf_size);
-
-	return ret;
 }
 
 void target_display_init(const char *panel_name)
@@ -384,7 +400,7 @@
 			panel_name);
 		return;
 	}
-	if (gcdb_display_init(panel_name, MDP_REV_50, MIPI_FB_ADDR)) {
+	if (gcdb_display_init(panel_name, MDP_REV_50, (void *)MIPI_FB_ADDR)) {
 		target_force_cont_splash_disable(true);
 		msm_display_off();
 	}
diff --git a/target/target_display.c b/target/target_display.c
index 4b07cc8..a16a46e 100644
--- a/target/target_display.c
+++ b/target/target_display.c
@@ -30,6 +30,8 @@
 #include <debug.h>
 #include <platform.h>
 
+#include "include/msm_panel.h"
+
 __WEAK int mdp_lcdc_config(void)
 {
 	return 0;