platform: msmtitanium: correct gpll0 mode addres.
For msmtitanium, gpll0 has changed to stromer. Fix the base address
and bitmask for the new pll.
Change-Id: Ic2c956bdfd4fc93af3588afa7522b0066ae11367
diff --git a/platform/msmtitanium/include/platform/iomap.h b/platform/msmtitanium/include/platform/iomap.h
index 833520a..a57769b 100755
--- a/platform/msmtitanium/include/platform/iomap.h
+++ b/platform/msmtitanium/include/platform/iomap.h
@@ -88,7 +88,7 @@
/* GPLL */
-#define GPLL0_STATUS (CLK_CTL_BASE + 0x2101C)
+#define GPLL0_MODE (CLK_CTL_BASE + 0x21000)
#define APCS_GPLL_ENA_VOTE (CLK_CTL_BASE + 0x45000)
#define APCS_CLOCK_BRANCH_ENA_VOTE (CLK_CTL_BASE + 0x45004)
#define GPLL4_MODE (CLK_CTL_BASE + 0x24000)
diff --git a/platform/msmtitanium/msmtitanium-clock.c b/platform/msmtitanium/msmtitanium-clock.c
index 092ca54..ee831b2 100644
--- a/platform/msmtitanium/msmtitanium-clock.c
+++ b/platform/msmtitanium/msmtitanium-clock.c
@@ -101,8 +101,8 @@
{
.en_reg = (void *) APCS_GPLL_ENA_VOTE,
.en_mask = BIT(0),
- .status_reg = (void *) GPLL0_STATUS,
- .status_mask = BIT(17),
+ .status_reg = (void *) GPLL0_MODE,
+ .status_mask = BIT(30),
.parent = &cxo_clk_src.c,
.c = {