Merge remote-tracking branch 'master' into wolfpack64_MHB
* master:
target: msm8952: update the DSI h/w configuration for DSC panels
target: msm8996: Enable HW crypto
aboot: mdtp: Fix MDTP eFuse read
dev: gcdb: display: use strlcpy, not strcpy
target: msm8952: add nt35597 DSC panel support to msm8976
dev: gcdb: display: update nt35597 DSC panel timings
target: msm8952: add DSC support to msm8976
platform: msm_shared: set proper value of DSI PHY GLBL for 28nm PHY
Change-Id: I57fbcc6f53dee71e11b31c9f1664f5c191d3b42f
diff --git a/app/aboot/mdtp_fuse.c b/app/aboot/mdtp_fuse.c
index 81351f4..a66f87b 100644
--- a/app/aboot/mdtp_fuse.c
+++ b/app/aboot/mdtp_fuse.c
@@ -32,12 +32,11 @@
#include <partition_parser.h>
#include <string.h>
#include <stdlib.h>
-
+#include <reg.h>
#include "mdtp.h"
#include "scm.h"
#define MAX_METADATA_SIZE (0x1000)
-#define QFPROM_ADDR_SPACE_RAW (0)
/********************************************************************************/
@@ -156,21 +155,12 @@
*/
static int read_QFPROM_fuse(uint8_t *mask)
{
- static const uint32_t row_address = MDTP_EFUSE_ADDRESS;
- uint32_t addr_type = QFPROM_ADDR_SPACE_RAW;
- uint32_t row_data[2] = {0};
- uint32_t qfprom_api_status = 0;
+ uint32_t val = 0;
- /* Read the current row where the eFuse is located */
- (void) qfprom_read_row_cmd(row_address, addr_type, row_data, &qfprom_api_status);
- if (qfprom_api_status)
- {
- dprintf(CRITICAL, "mdtp: write_QFPROM_fuse: qsee_fuse_read failed. qfprom_api_status=%d", qfprom_api_status);
- return -1;
- }
+ val = readl(MDTP_EFUSE_ADDRESS);
/* Shift the read data to be reflected in mask */
- *mask = (uint8_t)(row_data[0] >> MDTP_EFUSE_START);
+ *mask = (uint8_t)(val >> MDTP_EFUSE_START);
return 0;
}
diff --git a/dev/gcdb/display/gcdb_display_param.c b/dev/gcdb/display/gcdb_display_param.c
index fcf0953..91ce12b 100644
--- a/dev/gcdb/display/gcdb_display_param.c
+++ b/dev/gcdb/display/gcdb_display_param.c
@@ -350,11 +350,11 @@
/* Check for the DSI configuration */
if (slave_panel_node && (panel_mode & (DUAL_DSI_FLAG |
SPLIT_DISPLAY_FLAG | DST_SPLIT_FLAG)))
- strcpy(oem_data.dsi_config, "split_dsi");
+ strlcpy(oem_data.dsi_config, "split_dsi", DSI_CFG_SIZE);
else if (slave_panel_node)
- strcpy(oem_data.dsi_config, "dual_dsi");
+ strlcpy(oem_data.dsi_config, "dual_dsi", DSI_CFG_SIZE);
else
- strcpy(oem_data.dsi_config, "single_dsi");
+ strlcpy(oem_data.dsi_config, "single_dsi", DSI_CFG_SIZE);
arg_size = DSI_CFG_STRING_LEN + strlen(oem_data.dsi_config);
diff --git a/dev/gcdb/display/include/panel_nt35597_wqxga_dsc_cmd.h b/dev/gcdb/display/include/panel_nt35597_wqxga_dsc_cmd.h
index 6c7df16..b059bb3 100644
--- a/dev/gcdb/display/include/panel_nt35597_wqxga_dsc_cmd.h
+++ b/dev/gcdb/display/include/panel_nt35597_wqxga_dsc_cmd.h
@@ -289,7 +289,7 @@
/* Panel timing */
/*---------------------------------------------------------------------------*/
static const uint32_t nt35597_wqxga_dsc_cmd_timings[] = {
- 0xe2, 0x36, 0x24, 0x00, 0x66, 0x6a, 0x28, 0x38, 0x2a, 0x03, 0x04, 0x00
+ 0xa4, 0x24, 0x18, 0x00, 0x4c, 0x50, 0x1c, 0x28, 0x1c, 0x03, 0x04, 0x00,
};
static const uint32_t nt35597_wqxga_dsc_thulium_cmd_timings[] = {
diff --git a/dev/gcdb/display/include/panel_nt35597_wqxga_dsc_video.h b/dev/gcdb/display/include/panel_nt35597_wqxga_dsc_video.h
index c699219..382d75c 100644
--- a/dev/gcdb/display/include/panel_nt35597_wqxga_dsc_video.h
+++ b/dev/gcdb/display/include/panel_nt35597_wqxga_dsc_video.h
@@ -275,6 +275,10 @@
/*---------------------------------------------------------------------------*/
/* Panel timing */
/*---------------------------------------------------------------------------*/
+static const uint32_t nt35597_wqxga_dsc_video_timings[] = {
+ 0xa4, 0x24, 0x18, 0x00, 0x4c, 0x50, 0x1c, 0x28, 0x1c, 0x03, 0x04, 0x00,
+};
+
static const uint32_t nt35597_wqxga_dsc_thulium_video_timings[] = {
0x20, 0x1d, 0x05, 0x07, 0x03, 0x03, 0x4, 0xa0,
0x20, 0x1d, 0x05, 0x07, 0x03, 0x03, 0x4, 0xa0,
diff --git a/platform/msm8952/include/platform/iomap.h b/platform/msm8952/include/platform/iomap.h
index 94488b5..6a568db 100644
--- a/platform/msm8952/include/platform/iomap.h
+++ b/platform/msm8952/include/platform/iomap.h
@@ -383,6 +383,35 @@
#endif
#define VBIF_VBIF_IN_WR_LIM_CONF1 REG_MDP(0xc80C4)
+#ifdef MDP_INTF_2_TIMING_ENGINE_EN
+#undef MDP_INTF_2_TIMING_ENGINE_EN
+#endif
+#define MDP_INTF_2_TIMING_ENGINE_EN REG_MDP(0x12F00)
+
+#ifdef MDP_PP_0_BASE
+#undef MDP_PP_0_BASE
+#endif
+#define MDP_PP_0_BASE REG_MDP(0x71000)
+
+#ifdef MDP_PP_1_BASE
+#undef MDP_PP_1_BASE
+#endif
+#define MDP_PP_1_BASE REG_MDP(0x71800)
+
+#ifdef MDSS_MDP_REG_DCE_SEL
+#undef MDSS_MDP_REG_DCE_SEL
+#endif
+#define MDSS_MDP_REG_DCE_SEL REG_MDP(0x1428)
+
+#ifdef MDSS_MDP_PP_DCE_DATA_OUT_SWAP
+#undef MDSS_MDP_PP_DCE_DATA_OUT_SWAP
+#endif
+#define MDSS_MDP_PP_DCE_DATA_OUT_SWAP 0x0CC
+
+#define MDP_DSC_0_BASE REG_MDP(0x81000)
+#define MDP_DSC_1_BASE REG_MDP(0x81400)
+
+
#define SOFT_RESET 0x118
#define CLK_CTRL 0x11C
#define TRIG_CTRL 0x084
@@ -419,6 +448,12 @@
#define VIDEO_MODE_CTRL 0x010
#define HS_TIMER_CTRL 0x0BC
+#define VIDEO_COMPRESSION_MODE_CTRL 0x2A0
+#define VIDEO_COMPRESSION_MODE_CTRL_2 0x2A4
+#define CMD_COMPRESSION_MODE_CTRL 0x2A8
+#define CMD_COMPRESSION_MODE_CTRL_2 0x2AC
+#define CMD_COMPRESSION_MODE_CTRL_3 0x2B0
+
#define TCSR_TZ_WONCE 0x193D000
#define TCSR_BOOT_MISC_DETECT 0x193D100
diff --git a/platform/msm_shared/mipi_dsi_phy.c b/platform/msm_shared/mipi_dsi_phy.c
index b7faf5d..1321e9f 100644
--- a/platform/msm_shared/mipi_dsi_phy.c
+++ b/platform/msm_shared/mipi_dsi_phy.c
@@ -399,13 +399,19 @@
writel(0x0a, phy_base + 0x0180);
dmb();
- dsi0_phy_base = DSI0_PHY_BASE + target_display_get_base_offset(DSI0_PHY_BASE);
/* DSI_PHY_DSIPHY_GLBL_TEST_CTRL */
- if ((phy_base == dsi0_phy_base) ||
- (readl(mipi->ctl_base) == DSI_HW_REV_103_1))
+ if (mipi->dual_dsi) {
+ dsi0_phy_base = DSI0_PHY_BASE +
+ target_display_get_base_offset(DSI0_PHY_BASE);
+ if ((phy_base == dsi0_phy_base) ||
+ (readl(mipi->ctl_base) == DSI_HW_REV_103_1))
+ writel(0x01, phy_base + 0x01d4);
+ else
+ writel(0x00, phy_base + 0x01d4);
+ } else {
writel(0x01, phy_base + 0x01d4);
- else
- writel(0x00, phy_base + 0x01d4);
+ }
+ dmb();
/* MMSS_DSI_0_PHY_DSIPHY_CTRL_0 */
writel(0x5f, phy_base + 0x0170);
diff --git a/platform/msm_shared/rules.mk b/platform/msm_shared/rules.mk
index 944384e..8978664 100644
--- a/platform/msm_shared/rules.mk
+++ b/platform/msm_shared/rules.mk
@@ -596,6 +596,7 @@
$(LOCAL_DIR)/mdp5.o \
$(LOCAL_DIR)/display.o \
$(LOCAL_DIR)/mipi_dsi.o \
+ $(LOCAL_DIR)/mipi_dsc.o \
$(LOCAL_DIR)/mipi_dsi_phy.o \
$(LOCAL_DIR)/mipi_dsi_autopll.o
endif
diff --git a/project/msm8952.mk b/project/msm8952.mk
index 23bff86..54d4fa8 100644
--- a/project/msm8952.mk
+++ b/project/msm8952.mk
@@ -64,7 +64,7 @@
ifeq ($(ENABLE_MDTP_SUPPORT),1)
DEFINES += MDTP_SUPPORT=1
-DEFINES += MDTP_EFUSE_ADDRESS=0x0C858250 # QFPROM_RAW_QC_SPARE_REG_LSB_ADDR
+DEFINES += MDTP_EFUSE_ADDRESS=0x0005C250 # QFPROM_CORR_QC_SPARE_REG_LSB_ADDR
DEFINES += MDTP_EFUSE_START=0
endif
diff --git a/target/msm8952/oem_panel.c b/target/msm8952/oem_panel.c
index d2e05f8..57e069f 100644
--- a/target/msm8952/oem_panel.c
+++ b/target/msm8952/oem_panel.c
@@ -35,6 +35,7 @@
#include <board.h>
#include <qtimer.h>
#include <mipi_dsi.h>
+#include <mdp5.h>
#include <target/display.h>
#include "include/panel.h"
@@ -50,6 +51,8 @@
#include "include/panel_nt35597_wqxga_dualdsi_video.h"
#include "include/panel_nt35597_wqxga_dualdsi_cmd.h"
#include "include/panel_hx8399a_1080p_video.h"
+#include "include/panel_nt35597_wqxga_dsc_video.h"
+#include "include/panel_nt35597_wqxga_dsc_cmd.h"
/*---------------------------------------------------------------------------*/
/* static panel selection variable */
@@ -62,6 +65,8 @@
NT35597_WQXGA_DUALDSI_VIDEO_PANEL,
NT35597_WQXGA_DUALDSI_CMD_PANEL,
HX8399A_1080P_VIDEO_PANEL,
+ NT35597_WQXGA_DSC_VIDEO_PANEL,
+ NT35597_WQXGA_DSC_CMD_PANEL,
UNKNOWN_PANEL
};
@@ -81,6 +86,8 @@
{"nt35597_wqxga_dualdsi_cmd", NT35597_WQXGA_DUALDSI_CMD_PANEL},
{"otm1906c_1080p_cmd", OTM1906C_1080P_CMD_PANEL},
{"hx8399a_1080p_video", HX8399A_1080P_VIDEO_PANEL},
+ {"nt35597_wqxga_dsc_video", NT35597_WQXGA_DSC_VIDEO_PANEL},
+ {"nt35597_wqxga_dsc_cmd", NT35597_WQXGA_DSC_CMD_PANEL},
};
static uint32_t panel_id;
@@ -318,6 +325,84 @@
TIMING_SIZE);
pinfo->mipi.tx_eot_append = true;
break;
+ case NT35597_WQXGA_DSC_VIDEO_PANEL:
+ panelstruct->paneldata = &nt35597_wqxga_dsc_video_panel_data;
+ panelstruct->paneldata->panel_with_enable_gpio = 0;
+ panelstruct->paneldata->panel_operating_mode = USE_DSI1_PLL_FLAG;
+ panelstruct->panelres = &nt35597_wqxga_dsc_video_panel_res;
+ panelstruct->color = &nt35597_wqxga_dsc_video_color;
+ panelstruct->videopanel = &nt35597_wqxga_dsc_video_video_panel;
+ panelstruct->commandpanel = &nt35597_wqxga_dsc_video_command_panel;
+ panelstruct->state = &nt35597_wqxga_dsc_video_state;
+ panelstruct->laneconfig = &nt35597_wqxga_dsc_video_lane_config;
+ panelstruct->paneltiminginfo
+ = &nt35597_wqxga_dsc_video_timing_info;
+ panelstruct->panelresetseq
+ = &nt35597_wqxga_dsc_video_reset_seq;
+ panelstruct->backlightinfo = &nt35597_wqxga_dsc_video_backlight;
+ pinfo->labibb = &nt35597_wqxga_dsc_video_labibb;
+
+ pinfo->mipi.panel_on_cmds
+ = nt35597_wqxga_dsc_video_on_command;
+ pinfo->mipi.num_of_panel_on_cmds
+ = NT35597_WQXGA_DSC_VIDEO_ON_COMMAND;
+ pinfo->mipi.panel_off_cmds
+ = nt35597_wqxga_dsc_video_off_command;
+ pinfo->mipi.num_of_panel_off_cmds
+ = NT35597_WQXGA_DSC_VIDEO_OFF_COMMAND;
+ memcpy(phy_db->timing, nt35597_wqxga_dsc_video_timings,
+ TIMING_SIZE);
+ /* Clkout timings are different for this panel on 8956 */
+ panelstruct->paneltiminginfo->tclk_post = 0x04;
+ panelstruct->paneltiminginfo->tclk_pre = 0x20;
+ pinfo->mipi.tx_eot_append = true;
+ pinfo->compression_mode = COMPRESSION_DSC;
+ memcpy(&panelstruct->dsc_paras, &nt35597_wqxga_dsc_video_paras,
+ sizeof(struct dsc_parameters));
+ pinfo->dsc.parameter_calc = mdss_dsc_parameters_calc;
+ pinfo->dsc.dsc2buf = mdss_dsc_to_buf;
+ pinfo->dsc.dsi_dsc_config = mdss_dsc_dsi_config;
+ pinfo->dsc.mdp_dsc_config = mdss_dsc_mdp_config;
+ break;
+ case NT35597_WQXGA_DSC_CMD_PANEL:
+ panelstruct->paneldata = &nt35597_wqxga_dsc_cmd_panel_data;
+ panelstruct->paneldata->panel_with_enable_gpio = 0;
+ panelstruct->paneldata->panel_operating_mode = USE_DSI1_PLL_FLAG;
+ panelstruct->panelres = &nt35597_wqxga_dsc_cmd_panel_res;
+ panelstruct->color = &nt35597_wqxga_dsc_cmd_color;
+ panelstruct->videopanel = &nt35597_wqxga_dsc_cmd_video_panel;
+ panelstruct->commandpanel = &nt35597_wqxga_dsc_cmd_command_panel;
+ panelstruct->state = &nt35597_wqxga_dsc_cmd_state;
+ panelstruct->laneconfig = &nt35597_wqxga_dsc_cmd_lane_config;
+ panelstruct->paneltiminginfo
+ = &nt35597_wqxga_dsc_cmd_timing_info;
+ panelstruct->panelresetseq
+ = &nt35597_wqxga_dsc_cmd_reset_seq;
+ panelstruct->backlightinfo = &nt35597_wqxga_dsc_cmd_backlight;
+ pinfo->labibb = &nt35597_wqxga_dsc_cmd_labibb;
+
+ pinfo->mipi.panel_on_cmds
+ = nt35597_wqxga_dsc_cmd_on_command;
+ pinfo->mipi.num_of_panel_on_cmds
+ = NT35597_WQXGA_DSC_CMD_ON_COMMAND;
+ pinfo->mipi.panel_off_cmds
+ = nt35597_wqxga_dsc_cmd_off_command;
+ pinfo->mipi.num_of_panel_off_cmds
+ = NT35597_WQXGA_DSC_CMD_OFF_COMMAND;
+ memcpy(phy_db->timing, nt35597_wqxga_dsc_cmd_timings,
+ TIMING_SIZE);
+ /* Clkout timings are different for this panel on 8956 */
+ panelstruct->paneltiminginfo->tclk_post = 0x04;
+ panelstruct->paneltiminginfo->tclk_pre = 0x20;
+ pinfo->mipi.tx_eot_append = true;
+ pinfo->compression_mode = COMPRESSION_DSC;
+ memcpy(&panelstruct->dsc_paras, &nt35597_wqxga_dsc_cmd_paras,
+ sizeof(struct dsc_parameters));
+ pinfo->dsc.parameter_calc = mdss_dsc_parameters_calc;
+ pinfo->dsc.dsc2buf = mdss_dsc_to_buf;
+ pinfo->dsc.dsi_dsc_config = mdss_dsc_dsi_config;
+ pinfo->dsc.mdp_dsc_config = mdss_dsc_mdp_config;
+ break;
case UNKNOWN_PANEL:
default:
memset(panelstruct, 0, sizeof(struct panel_struct));
diff --git a/target/msm8952/target_display.c b/target/msm8952/target_display.c
index abe8937..f4664ec 100644
--- a/target/msm8952/target_display.c
+++ b/target/msm8952/target_display.c
@@ -55,8 +55,8 @@
#define DSC_VID_PANEL "dsc_vid_panel"
#define DSC_VID_PANEL_ADV7533_1080P "dsc_vid_panel_adv7533_1080p"
#define DSC_CMD_PANEL_ADV7533_1080P "dsc_cmd_panel_adv7533_1080p"
-#define DSC_CMD_PANEL_STRING "1:dsi:0:none:1:qcom,mdss_dsi_nt35597_dsc_wqxga_cmd"
-#define DSC_VID_PANEL_STRING "1:dsi:0:none:1:qcom,mdss_dsi_nt35597_dsc_wqxga_video"
+#define DSC_CMD_PANEL_STRING "1:dsi:0:none:1:qcom,mdss_dsi_nt35597_dsc_wqxga_cmd:cfg:single_dsi"
+#define DSC_VID_PANEL_STRING "1:dsi:0:none:1:qcom,mdss_dsi_nt35597_dsc_wqxga_video:cfg:single_dsi"
#define DSC_CMD_PANEL_ADV7533_1080P_STRING "1:dsi:0:qcom,mdss_dsi_adv7533_1080p:1:qcom,mdss_dsi_nt35597_dsc_wqxga_cmd:cfg:dual_dsi"
#define DSC_VID_PANEL_ADV7533_1080P_STRING "1:dsi:0:qcom,mdss_dsi_adv7533_1080p:1:qcom,mdss_dsi_nt35597_dsc_wqxga_video:cfg:dual_dsi"
diff --git a/target/msm8996/init.c b/target/msm8996/init.c
index e6cfeed..017b8d2 100644
--- a/target/msm8996/init.c
+++ b/target/msm8996/init.c
@@ -63,7 +63,7 @@
#endif
#define CE_INSTANCE 1
-#define CE_EE 1
+#define CE_EE 0
#define CE_FIFO_SIZE 64
#define CE_READ_PIPE 3
#define CE_WRITE_PIPE 2
@@ -155,6 +155,13 @@
pm_appsbl_set_dcin_suspend(1);
#endif
+
+ if (crypto_initialized())
+ {
+ crypto_eng_cleanup();
+ clock_ce_disable(CE_INSTANCE);
+ }
+
/* Tear down glink channels */
rpm_glink_uninit();
@@ -405,7 +412,7 @@
crypto_engine_type board_ce_type(void)
{
- return CRYPTO_ENGINE_TYPE_SW;
+ return CRYPTO_ENGINE_TYPE_HW;
}
/* Set up params for h/w CE. */