msm_shared: Add support to configure EE and max desc size for BAM.
Change-Id: I5ed0e0267a2304a7faf3fafcc0b7bbb0e0678139
diff --git a/platform/msm_shared/bam.c b/platform/msm_shared/bam.c
index 3ed2be9..0f3628b 100644
--- a/platform/msm_shared/bam.c
+++ b/platform/msm_shared/bam.c
@@ -84,7 +84,7 @@
/* Wait for a interrupt on the right pipe */
do{
/* Determine the pipe causing the interrupt */
- val = readl(BAM_IRQ_SRCS(bam->base));
+ val = readl(BAM_IRQ_SRCS(bam->base, bam->ee));
/* Flush out the right most global interrupt bit */
} while (!((val & 0x7FFF) & (1 << bam->pipe[pipe_num].pipe_num)));
@@ -141,9 +141,9 @@
/* Enable pipe interrups */
/* Do read-modify-write */
- val = readl(BAM_IRQ_SRCS_MSK(bam->base));
+ val = readl(BAM_IRQ_SRCS_MSK(bam->base, bam->ee));
writel((1 << bam->pipe[pipe_num].pipe_num) | val,
- BAM_IRQ_SRCS_MSK(bam->base));
+ BAM_IRQ_SRCS_MSK(bam->base, bam->ee));
/* Unmask the QGIC interrupts only in the case of
* interrupt based transfer.
@@ -348,7 +348,7 @@
}
/* Check if we have enough space in FIFO */
- if (len > (unsigned)bam->pipe[pipe_num].fifo.size * BAM_MAX_DESC_DATA_LEN)
+ if (len > (unsigned)bam->pipe[pipe_num].fifo.size * bam->max_desc_len)
{
dprintf(CRITICAL, "Data transfer exceeds desc fifo length.\n");
bam_ret = BAM_RESULT_FAILURE;
@@ -362,10 +362,10 @@
* If more bits are needed, create more
* descriptors.
*/
- if (len > BAM_MAX_DESC_DATA_LEN)
+ if (len > bam->max_desc_len)
{
- desc_len = BAM_MAX_DESC_DATA_LEN;
- len -= BAM_MAX_DESC_DATA_LEN;
+ desc_len = bam->max_desc_len;
+ len -= bam->max_desc_len;
desc_flags = 0;
}
else
@@ -379,7 +379,7 @@
/* Write descriptor */
bam_add_one_desc(bam, pipe_num, data_ptr, desc_len, desc_flags);
- data_ptr += BAM_MAX_DESC_DATA_LEN;
+ data_ptr += bam->max_desc_len;
n++;
}
@@ -442,10 +442,10 @@
}
/* Check for the length of the desc. */
- if (len > BAM_MAX_DESC_DATA_LEN)
+ if (len > bam->max_desc_len)
{
dprintf(CRITICAL, "len of the desc exceeds max length"
- " %d > %d\n", len, BAM_MAX_DESC_DATA_LEN);
+ " %d > %d\n", len, bam->max_desc_len);
bam_ret = BAM_RESULT_FAILURE;
goto bam_add_one_desc_error;
}
diff --git a/platform/msm_shared/include/bam.h b/platform/msm_shared/include/bam.h
index d06f7cd..84f9fb4 100644
--- a/platform/msm_shared/include/bam.h
+++ b/platform/msm_shared/include/bam.h
@@ -1,17 +1,17 @@
-/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
-
+/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
+ *
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above
- * copyright notice, this list of conditions and the following
- * disclaimer in the documentation and/or other materials provided
- * with the distribution.
- * * Neither the name of Code Aurora Forum, Inc. nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials provided
+ * with the distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
@@ -44,8 +44,8 @@
#define BAM_DESC_CNT_TRSHLD_REG(x) (0x0008 + (x))
#define COUNT_TRESHOLD_MASK 0xFF
-#define BAM_IRQ_SRCS(x) (0x0000000C + (x))
-#define BAM_IRQ_SRCS_MSK(x) (0x00000010 + (x))
+#define BAM_IRQ_SRCS(x, n) (0x00000800 + (0x80 * (n)) + (x))
+#define BAM_IRQ_SRCS_MSK(x, n) (0x00000804 + (0x80 * (n)) + (x))
#define BAM_IRQ_MASK (1 << 31)
#define P_IRQ_MASK (1)
@@ -206,7 +206,8 @@
* pipe_pair:The pipe pairs to be used to access the BAM.
* threshold:This Register holds a threshold value for the
* counter summing the Size of the Descriptors Provided.
- * init:Pipe initialization status for the BAM.
+ * ee:Execution Environment for the BAM.
+ * desc_len: Max desc length for the current BAM.
*/
struct bam_instance {
uint32_t base;
@@ -215,6 +216,8 @@
uint8_t num_of_pipes;
struct bam_pipe pipe[3];
uint16_t threshold;
+ uint32_t ee;
+ uint16_t max_desc_len;
void (*callback)(int);
};
diff --git a/platform/msm_shared/include/qpic_nand.h b/platform/msm_shared/include/qpic_nand.h
index 0138a7e..d807f04 100644
--- a/platform/msm_shared/include/qpic_nand.h
+++ b/platform/msm_shared/include/qpic_nand.h
@@ -330,6 +330,8 @@
{
uint32_t nand_base;
uint32_t bam_base;
+ uint32_t ee;
+ uint32_t max_desc_len;
struct qpic_nand_bam_pipes pipes;
};
diff --git a/platform/msm_shared/qpic_nand.c b/platform/msm_shared/qpic_nand.c
index 7c7bee2..fb14720 100644
--- a/platform/msm_shared/qpic_nand.c
+++ b/platform/msm_shared/qpic_nand.c
@@ -248,27 +248,27 @@
}
static int
-qpic_bam_init(uint32_t bam_base, struct qpic_nand_bam_pipes *pipes)
+qpic_bam_init(struct qpic_nand_init_config *config)
{
uint32_t bam_ret = NANDC_RESULT_SUCCESS;
- bam.base = bam_base;
+ bam.base = config->bam_base;
/* Set Read pipe params. */
- bam.pipe[DATA_PRODUCER_PIPE_INDEX].pipe_num = pipes->read_pipe;
+ bam.pipe[DATA_PRODUCER_PIPE_INDEX].pipe_num = config->pipes.read_pipe;
/* System consumer */
bam.pipe[DATA_PRODUCER_PIPE_INDEX].trans_type = BAM2SYS;
bam.pipe[DATA_PRODUCER_PIPE_INDEX].fifo.size = QPIC_BAM_DATA_FIFO_SIZE;
bam.pipe[DATA_PRODUCER_PIPE_INDEX].fifo.head = data_desc_fifo;
/* Set Write pipe params. */
- bam.pipe[DATA_CONSUMER_PIPE_INDEX].pipe_num = pipes->write_pipe;
+ bam.pipe[DATA_CONSUMER_PIPE_INDEX].pipe_num = config->pipes.write_pipe;
/* System producer */
bam.pipe[DATA_CONSUMER_PIPE_INDEX].trans_type = SYS2BAM;
bam.pipe[DATA_CONSUMER_PIPE_INDEX].fifo.size = QPIC_BAM_DATA_FIFO_SIZE;
bam.pipe[DATA_CONSUMER_PIPE_INDEX].fifo.head = data_desc_fifo;
/* Set Cmd pipe params. */
- bam.pipe[CMD_PIPE_INDEX].pipe_num = pipes->cmd_pipe;
+ bam.pipe[CMD_PIPE_INDEX].pipe_num = config->pipes.cmd_pipe;
/* System consumer */
bam.pipe[CMD_PIPE_INDEX].trans_type = BAM2SYS;
bam.pipe[CMD_PIPE_INDEX].fifo.size = QPIC_BAM_CMD_FIFO_SIZE;
@@ -285,6 +285,12 @@
*/
bam.threshold = 32;
+ /* Set the EE. */
+ bam.ee = config->ee;
+
+ /* Set the max desc length for this BAM. */
+ bam.max_desc_len = config->max_desc_len;
+
/* BAM Init. */
bam_init(&bam);
@@ -1241,7 +1247,7 @@
nand_base = config->nand_base;
- qpic_bam_init(config->bam_base, &(config->pipes));
+ qpic_bam_init(config);
/* Do an ONFI probe. */
nand_ret = qpic_nand_onfi_probe(&flash);
diff --git a/target/mdm9625/init.c b/target/mdm9625/init.c
index e73c27c..43cde24 100644
--- a/target/mdm9625/init.c
+++ b/target/mdm9625/init.c
@@ -46,14 +46,20 @@
static struct ptable flash_ptable;
/* PMIC config data */
-#define PMIC_ARB_CHANNEL_NUM 0
-#define PMIC_ARB_OWNER_ID 0
+#define PMIC_ARB_CHANNEL_NUM 0
+#define PMIC_ARB_OWNER_ID 0
/* NANDc BAM pipe numbers */
#define DATA_CONSUMER_PIPE 0
#define DATA_PRODUCER_PIPE 1
#define CMD_PIPE 2
+/* NANDc EE */
+#define QPIC_NAND_EE 0
+
+/* NANDc max desc length. */
+#define QPIC_NAND_MAX_DESC_LEN 0x7FFF
+
#define LAST_NAND_PTN_LEN_PATTERN 0xFFFFFFFF
struct qpic_nand_init_config config;
@@ -110,6 +116,8 @@
config.bam_base = MSM_NAND_BAM_BASE;
config.nand_base = MSM_NAND_BASE;
+ config.ee = QPIC_NAND_EE;
+ config.max_desc_len = QPIC_NAND_MAX_DESC_LEN;
qpic_nand_init(&config);