target: Remove pll configuration for DSI1 PHY
Remove pll configuration for dsi1_phy because
pclk0 and pclk1 are sourced from dsi0 PHY in all
dual dsi cases.
Change-Id: I180320e4378b6c094cbe952a7dcfeffedd27074f
diff --git a/target/apq8084/target_display.c b/target/apq8084/target_display.c
index 197b16d..b681c34 100755
--- a/target/apq8084/target_display.c
+++ b/target/apq8084/target_display.c
@@ -164,12 +164,6 @@
mdss_dsi_auto_pll_config(DSI0_PLL_BASE,
MIPI_DSI0_BASE, pll_data);
dsi_pll_enable_seq(DSI0_PLL_BASE);
- if (pinfo->mipi.dual_dsi &&
- !(pinfo->mipi.broadcast)) {
- mdss_dsi_auto_pll_config(DSI1_PLL_BASE,
- MIPI_DSI1_BASE, pll_data);
- dsi_pll_enable_seq(DSI1_PLL_BASE);
- }
mmss_dsi_clock_enable(DSI0_PHY_PLL_OUT, dual_dsi,
pll_data->pclk_m,
pll_data->pclk_n,
diff --git a/target/msm8974/target_display.c b/target/msm8974/target_display.c
index 1499845..57973bb 100755
--- a/target/msm8974/target_display.c
+++ b/target/msm8974/target_display.c
@@ -222,12 +222,6 @@
mdss_dsi_auto_pll_config(DSI0_PLL_BASE,
MIPI_DSI0_BASE, pll_data);
dsi_pll_enable_seq(DSI0_PLL_BASE);
- if (panel.panel_info.mipi.dual_dsi &&
- !(panel.panel_info.mipi.broadcast)) {
- mdss_dsi_auto_pll_config(DSI1_PLL_BASE,
- MIPI_DSI1_BASE, pll_data);
- dsi_pll_enable_seq(DSI1_PLL_BASE);
- }
mmss_clock_auto_pll_init(DSI0_PHY_PLL_OUT, dual_dsi,
pll_data->pclk_m,
pll_data->pclk_n,