ssbi: Cleanup ssbi dependency from gpio_keypad

SSBI declarations were in the gpio_keypad files
resulting in needing to add gpio_keypad to use
ssbi for pmic functions.

Change-Id: Ic62a499a3cbd5fab9b8235e469b93103d207b20e
diff --git a/dev/keys/gpio_keypad.c b/dev/keys/gpio_keypad.c
index 0883c6a..f7a8673 100644
--- a/dev/keys/gpio_keypad.c
+++ b/dev/keys/gpio_keypad.c
@@ -38,6 +38,7 @@
 #include <dev/keys.h>
 #include <dev/gpio.h>
 #include <dev/gpio_keypad.h>
+#include <dev/ssbi.h>
 #include <kernel/event.h>
 #include <kernel/timer.h>
 #include <reg.h>
@@ -138,19 +139,6 @@
 		goto done;
 	}
 
-#if 0
-	/* No keys are pressed, reenable interrupt */
-	for (out = 0; out < kpinfo->noutputs; out++) {
-		if (gpio_keypad_flags & GPIOKPF_DRIVE_INACTIVE)
-			gpio_set(kpinfo->output_gpios[out], polarity);
-		else
-			gpio_config(kpinfo->output_gpios[out], polarity ? GPIO_OUTPUT : 0);
-	}
-	for (in = 0; in < kpinfo->ninputs; in++)
-		enable_irq(gpio_to_irq(kpinfo->input_gpios[in]));
-	return INT_RESCHEDULE;
-#endif
-
 done:
 	return INT_RESCHEDULE;
 }
@@ -194,221 +182,6 @@
 	event_wait(&keypad->full_scan);
 }
 
-int i2c_ssbi_poll_for_device_ready(void)
-{
-	unsigned long timeout = SSBI_TIMEOUT_US;
-
-	while (!(readl(MSM_SSBI_BASE + SSBI2_STATUS) & SSBI_STATUS_READY)) {
-		if (--timeout == 0) {
-		        dprintf(INFO, "In Device ready function:Timeout, status %x\n", readl(MSM_SSBI_BASE + SSBI2_STATUS));
-			return 1;
-		}
-	}
-
-	return 0;
-}
-
-int i2c_ssbi_poll_for_read_completed(void)
-{
-	unsigned long timeout = SSBI_TIMEOUT_US;
-
-	while (!(readl(MSM_SSBI_BASE + SSBI2_STATUS) & SSBI_STATUS_RD_READY)) {
-		if (--timeout == 0) {
-		        dprintf(INFO, "In read completed function:Timeout, status %x\n", readl(MSM_SSBI_BASE + SSBI2_STATUS));
-			return 1;
-		}
-	}
-
-	return 0;
-}
-
-int i2c_ssbi_read_bytes(unsigned char  *buffer, unsigned short length,
-                                                unsigned short slave_addr)
-{
-	int ret = 0;
-	unsigned char *buf = buffer;
-	unsigned short len = length;
-	unsigned short addr = slave_addr;
-	unsigned long read_cmd = SSBI_CMD_READ(addr);
-	unsigned long mode2 = readl(MSM_SSBI_BASE + SSBI2_MODE2);
-
-	//buf = alloc(len * sizeof(8));
-	if (mode2 & SSBI_MODE2_SSBI2_MODE)
-		writel(SSBI_MODE2_REG_ADDR_15_8(mode2, addr),
-				MSM_SSBI_BASE + SSBI2_MODE2);
-
-	while (len) {
-		ret = i2c_ssbi_poll_for_device_ready();
-		if (ret) {
-		        dprintf (CRITICAL, "Error: device not ready\n");
-			return ret;
-		}
-
-		writel(read_cmd, MSM_SSBI_BASE + SSBI2_CMD);
-
-		ret = i2c_ssbi_poll_for_read_completed();
-		if (ret) {
-		        dprintf (CRITICAL, "Error: read not completed\n");
-			return ret;
-		}
-
-		*buf++ = readl(MSM_SSBI_BASE + SSBI2_RD) & SSBI_RD_REG_DATA_MASK;
-		len--;
-	}
-	return 0;
-}
-
-int i2c_ssbi_write_bytes(unsigned char  *buffer, unsigned short length,
-                                                unsigned short slave_addr)
-{
-	int ret = 0;
-	unsigned long timeout = SSBI_TIMEOUT_US;
-	unsigned char *buf = buffer;
-	unsigned short len = length;
-	unsigned short addr = slave_addr;
-	unsigned long mode2 = readl(MSM_SSBI_BASE + SSBI2_MODE2);
-
-	if (mode2 & SSBI_MODE2_SSBI2_MODE)
-		writel(SSBI_MODE2_REG_ADDR_15_8(mode2, addr),
-				MSM_SSBI_BASE + SSBI2_MODE2);
-
-	while (len) {
-		ret = i2c_ssbi_poll_for_device_ready();
-		if (ret) {
-		        dprintf (CRITICAL, "Error: device not ready\n");
-			return ret;
-		}
-
-		writel(SSBI_CMD_WRITE(addr, *buf++), MSM_SSBI_BASE + SSBI2_CMD);
-
-		while (readl(MSM_SSBI_BASE + SSBI2_STATUS) & SSBI_STATUS_MCHN_BUSY) {
-		  if (--timeout == 0) {
-		    dprintf(INFO, "In Device ready function:Timeout, status %x\n", readl(MSM_SSBI_BASE + SSBI2_STATUS));
-		    return 1;
-		  }
-		}
-		len--;
-	}
-	return 0;
-}
-
-int pa1_ssbi2_read_bytes(unsigned char  *buffer, unsigned short length,
-                                                unsigned short slave_addr)
-{
-    unsigned val = 0x0;
-    unsigned temp = 0x0000;
-    unsigned char *buf = buffer;
-    unsigned short len = length;
-    unsigned short addr = slave_addr;
-    unsigned long timeout = SSBI_TIMEOUT_US;
-
-    while(len)
-    {
-        val |= ((addr << PA1_SSBI2_REG_ADDR_SHIFT) |
-		(PA1_SSBI2_CMD_READ << PA1_SSBI2_CMD_RDWRN_SHIFT));
-        writel(val, PA1_SSBI2_CMD);
-        while(!((temp = readl(PA1_SSBI2_RD_STATUS)) & (1 << PA1_SSBI2_TRANS_DONE_SHIFT))) {
-            if (--timeout == 0) {
-	        dprintf(INFO, "In Device ready function:Timeout\n");
-	        return 1;
-	    }
-	}
-        len--;
-        *buf++ = (temp & (PA1_SSBI2_REG_DATA_MASK << PA1_SSBI2_REG_DATA_SHIFT));
-    }
-    return 0;
-}
-
-int pa1_ssbi2_write_bytes(unsigned char  *buffer, unsigned short length,
-                                                unsigned short slave_addr)
-{
-    unsigned val;
-    unsigned char *buf = buffer;
-    unsigned short len = length;
-    unsigned short addr = slave_addr;
-    unsigned temp = 0x00;
-    unsigned char written_data1 = 0x00;
-    unsigned long timeout = SSBI_TIMEOUT_US;
-    //unsigned char written_data2 = 0x00;
-
-    while(len)
-    {
-        temp = 0x00;
-        written_data1 = 0x00;
-        val = (addr << PA1_SSBI2_REG_ADDR_SHIFT) |
-	  (PA1_SSBI2_CMD_WRITE << PA1_SSBI2_CMD_RDWRN_SHIFT) |
- (*buf & 0xFF);
-        writel(val, PA1_SSBI2_CMD);
-        while(!((temp = readl(PA1_SSBI2_RD_STATUS)) & (1 << PA1_SSBI2_TRANS_DONE_SHIFT))) {
-            if (--timeout == 0) {
-	        dprintf(INFO, "In Device write function:Timeout\n");
-	        return 1;
-	    }
-	}
-        len--;
-        buf++;
-    }
-    return 0;
-}
-
-int pa2_ssbi2_read_bytes(unsigned char  *buffer, unsigned short length,
-        unsigned short slave_addr)
-{
-    unsigned val = 0x0;
-    unsigned temp = 0x0000;
-    unsigned char *buf = buffer;
-    unsigned short len = length;
-    unsigned short addr = slave_addr;
-    unsigned long timeout = SSBI_TIMEOUT_US;
-
-    while(len)
-    {
-        val |= ((addr << PA2_SSBI2_REG_ADDR_SHIFT) |
-                (PA2_SSBI2_CMD_READ << PA2_SSBI2_CMD_RDWRN_SHIFT));
-        writel(val, PA2_SSBI2_CMD);
-        while(!((temp = readl(PA2_SSBI2_RD_STATUS)) & (1 << PA2_SSBI2_TRANS_DONE_SHIFT))) {
-            if (--timeout == 0) {
-                dprintf(INFO, "In Device ready function:Timeout\n");
-                return 1;
-            }
-        }
-        len--;
-        *buf++ = (temp & (PA2_SSBI2_REG_DATA_MASK << PA2_SSBI2_REG_DATA_SHIFT));
-    }
-    return 0;
-}
-
-int pa2_ssbi2_write_bytes(unsigned char  *buffer, unsigned short length,
-        unsigned short slave_addr)
-{
-    unsigned val;
-    unsigned char *buf = buffer;
-    unsigned short len = length;
-    unsigned short addr = slave_addr;
-    unsigned temp = 0x00;
-    unsigned char written_data1 = 0x00;
-    unsigned long timeout = SSBI_TIMEOUT_US;
-
-    while(len)
-    {
-        temp = 0x00;
-        written_data1 = 0x00;
-        val = (addr << PA2_SSBI2_REG_ADDR_SHIFT) |
-            (PA2_SSBI2_CMD_WRITE << PA2_SSBI2_CMD_RDWRN_SHIFT) |
-            (*buf & 0xFF);
-        writel(val, PA2_SSBI2_CMD);
-        while(!((temp = readl(PA2_SSBI2_RD_STATUS)) & (1 << PA2_SSBI2_TRANS_DONE_SHIFT))) {
-            if (--timeout == 0) {
-                dprintf(INFO, "In Device write function:Timeout\n");
-                return 1;
-            }
-        }
-        len--;
-        buf++;
-    }
-    return 0;
-}
-
 int pm8058_gpio_config(int gpio, struct pm8058_gpio *param)
 {
 	int	rc;
diff --git a/dev/ssbi/include/dev/ssbi.h b/dev/ssbi/include/dev/ssbi.h
new file mode 100644
index 0000000..25f9259
--- /dev/null
+++ b/dev/ssbi/include/dev/ssbi.h
@@ -0,0 +1,139 @@
+/*
+ * Copyright (c) 2008, Google Inc.
+ * All rights reserved.
+ *
+ * Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *  * Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  * Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *  * Neither the name of Google, Inc. nor the names of its contributors
+ *    may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+#ifndef __DEV_SSBI_H
+#define __DEV_SSBI_H
+
+//Macros for SSBI Qwerty keypad for 7x30
+
+/* SSBI 2.0 controller registers */
+#define MSM_SSBI_BASE                   0xAD900000
+
+#define SSBI_TIMEOUT_US			100
+
+#define SSBI2_CTL			0x0000
+#define SSBI2_RESET			0x0004
+#define SSBI2_CMD			0x0008
+#define SSBI2_RD			0x0010
+#define SSBI2_STATUS			0x0014
+#define SSBI2_PRIORITIES		0x0018
+#define SSBI2_MODE2			0x001C
+
+/* SSBI_CMD fields */
+#define SSBI_CMD_SEND_TERM_SYM		(0x01 << 27)
+#define SSBI_CMD_WAKEUP_SLAVE		(0x01 << 26)
+#define SSBI_CMD_USE_ENABLE		(0x01 << 25)
+#define SSBI_CMD_RDWRN			(0x01 << 24)
+#define SSBI_CMD_REG_ADDR_SHFT		(0x10)
+#define SSBI_CMD_REG_ADDR_MASK		(0xFF << SSBI_CMD_REG_ADDR_SHFT)
+#define SSBI_CMD_REG_DATA_SHFT		(0x00)
+#define SSBI_CMD_REG_DATA_MASK		(0xFF << SSBI_CMD_REG_DATA_SHFT)
+
+/* SSBI_STATUS fields */
+#define SSBI_STATUS_DATA_IN		0x10
+#define SSBI_STATUS_RD_CLOBBERED	0x08
+#define SSBI_STATUS_RD_READY		0x04
+#define SSBI_STATUS_READY		0x02
+#define SSBI_STATUS_MCHN_BUSY		0x01
+
+/* SSBI_RD fields */
+#define SSBI_RD_USE_ENABLE		0x02000000
+#define SSBI_RD_RDWRN			0x01000000
+#define SSBI_RD_REG_ADDR_SHFT		0x10
+#define SSBI_RD_REG_ADDR_MASK		(0xFF << SSBI_RD_REG_ADDR_SHFT)
+#define SSBI_RD_REG_DATA_SHFT		(0x00)
+#define SSBI_RD_REG_DATA_MASK		(0xFF << SSBI_RD_REG_DATA_SHFT)
+
+/* SSBI_MODE2 fields */
+#define SSBI_MODE2_REG_ADDR_15_8_SHFT	0x04
+#define SSBI_MODE2_REG_ADDR_15_8_MASK	(0x7F << SSBI_MODE2_REG_ADDR_15_8_SHFT)
+#define SSBI_MODE2_ADDR_WIDTH_SHFT	0x01
+#define SSBI_MODE2_ADDR_WIDTH_MASK	(0x07 << SSBI_MODE2_ADDR_WIDTH_SHFT)
+#define SSBI_MODE2_SSBI2_MODE		0x00000001
+
+//Keypad controller configurations
+#define SSBI_REG_KYPD_CNTL_ADDR         0x148
+#define SSBI_REG_KYPD_SCAN_ADDR         0x149
+#define SSBI_REG_KYPD_TEST_ADDR         0x14A
+#define SSBI_REG_KYPD_REC_DATA_ADDR     0x14B
+#define SSBI_REG_KYPD_OLD_DATA_ADDR     0x14C
+
+
+/* PMIC Arbiter 1: SSBI2 Configuration Micro ARM registers */
+#define PA1_SSBI2_CMD                   0x00500000
+#define PA1_SSBI2_RD_STATUS             0x00500004
+
+#define PA1_SSBI2_REG_ADDR_SHIFT        8
+#define PA1_SSBI2_CMD_RDWRN_SHIFT       24
+#define PA1_SSBI2_TRANS_DONE_SHIFT      27
+
+#define PA1_SSBI2_REG_DATA_MASK         0xFF
+#define PA1_SSBI2_REG_DATA_SHIFT        0
+
+#define PA1_SSBI2_CMD_READ              1
+#define PA1_SSBI2_CMD_WRITE             0
+
+/* PMIC Arbiter 2: SSBI2 Configuration Micro ARM registers */
+#define PA2_SSBI2_CMD                   0x00C00000
+#define PA2_SSBI2_RD_STATUS             0x00C00004
+
+#define PA2_SSBI2_REG_ADDR_SHIFT        8
+#define PA2_SSBI2_CMD_RDWRN_SHIFT       24
+#define PA2_SSBI2_TRANS_DONE_SHIFT      27
+
+#define PA2_SSBI2_REG_DATA_MASK         0xFF
+#define PA2_SSBI2_REG_DATA_SHIFT        0
+
+#define PA2_SSBI2_CMD_READ              1
+#define PA2_SSBI2_CMD_WRITE             0
+
+#define SSBI_CMD_READ(AD) \
+	(SSBI_CMD_RDWRN | (((AD) & 0xFF) << SSBI_CMD_REG_ADDR_SHFT))
+
+#define SSBI_CMD_WRITE(AD, DT) \
+  ((((AD) & 0xFF) << SSBI_CMD_REG_ADDR_SHFT) | \
+   (((DT) & 0xFF) << SSBI_CMD_REG_DATA_SHFT))
+
+#define SSBI_MODE2_REG_ADDR_15_8(MD, AD) \
+	(((MD) & 0x0F) | ((((AD) >> 8) << SSBI_MODE2_REG_ADDR_15_8_SHFT) & \
+	SSBI_MODE2_REG_ADDR_15_8_MASK))
+
+int i2c_ssbi_read_bytes(unsigned char  *buffer, unsigned short length,
+			unsigned short slave_addr);
+int i2c_ssbi_write_bytes(unsigned char  *buffer, unsigned short length,
+			 unsigned short slave_addr);
+int pa1_ssbi2_read_bytes(unsigned char  *buffer, unsigned short length,
+			 unsigned short slave_addr);
+int pa1_ssbi2_write_bytes(unsigned char  *buffer, unsigned short length,
+			  unsigned short slave_addr);
+
+#endif
diff --git a/dev/ssbi/rules.mk b/dev/ssbi/rules.mk
new file mode 100644
index 0000000..74e5b6a
--- /dev/null
+++ b/dev/ssbi/rules.mk
@@ -0,0 +1,6 @@
+LOCAL_DIR := $(GET_LOCAL_DIR)
+
+INCLUDES += -I$(LOCAL_DIR)/include
+
+OBJS += \
+	$(LOCAL_DIR)/ssbi.o
diff --git a/dev/ssbi/ssbi.c b/dev/ssbi/ssbi.c
new file mode 100644
index 0000000..1686cdc
--- /dev/null
+++ b/dev/ssbi/ssbi.c
@@ -0,0 +1,251 @@
+/*
+ * Copyright (c) 2009, Google Inc.
+ * All rights reserved.
+ *
+ * Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *  * Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  * Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *  * Neither the name of Google, Inc. nor the names of its contributors
+ *    may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+#include <debug.h>
+#include <reg.h>
+#include <sys/types.h>
+#include <dev/ssbi.h>
+
+int i2c_ssbi_poll_for_device_ready(void)
+{
+	unsigned long timeout = SSBI_TIMEOUT_US;
+
+	while (!(readl(MSM_SSBI_BASE + SSBI2_STATUS) & SSBI_STATUS_READY)) {
+		if (--timeout == 0) {
+		        dprintf(INFO, "In Device ready function:Timeout, status %x\n", readl(MSM_SSBI_BASE + SSBI2_STATUS));
+			return 1;
+		}
+	}
+
+	return 0;
+}
+
+int i2c_ssbi_poll_for_read_completed(void)
+{
+	unsigned long timeout = SSBI_TIMEOUT_US;
+
+	while (!(readl(MSM_SSBI_BASE + SSBI2_STATUS) & SSBI_STATUS_RD_READY)) {
+		if (--timeout == 0) {
+		        dprintf(INFO, "In read completed function:Timeout, status %x\n", readl(MSM_SSBI_BASE + SSBI2_STATUS));
+			return 1;
+		}
+	}
+
+	return 0;
+}
+
+int i2c_ssbi_read_bytes(unsigned char  *buffer, unsigned short length,
+                                                unsigned short slave_addr)
+{
+	int ret = 0;
+	unsigned char *buf = buffer;
+	unsigned short len = length;
+	unsigned short addr = slave_addr;
+	unsigned long read_cmd = SSBI_CMD_READ(addr);
+	unsigned long mode2 = readl(MSM_SSBI_BASE + SSBI2_MODE2);
+
+	//buf = alloc(len * sizeof(8));
+	if (mode2 & SSBI_MODE2_SSBI2_MODE)
+		writel(SSBI_MODE2_REG_ADDR_15_8(mode2, addr),
+				MSM_SSBI_BASE + SSBI2_MODE2);
+
+	while (len) {
+		ret = i2c_ssbi_poll_for_device_ready();
+		if (ret) {
+		        dprintf (CRITICAL, "Error: device not ready\n");
+			return ret;
+		}
+
+		writel(read_cmd, MSM_SSBI_BASE + SSBI2_CMD);
+
+		ret = i2c_ssbi_poll_for_read_completed();
+		if (ret) {
+		        dprintf (CRITICAL, "Error: read not completed\n");
+			return ret;
+		}
+
+		*buf++ = readl(MSM_SSBI_BASE + SSBI2_RD) & SSBI_RD_REG_DATA_MASK;
+		len--;
+	}
+	return 0;
+}
+
+int i2c_ssbi_write_bytes(unsigned char  *buffer, unsigned short length,
+                                                unsigned short slave_addr)
+{
+	int ret = 0;
+	unsigned long timeout = SSBI_TIMEOUT_US;
+	unsigned char *buf = buffer;
+	unsigned short len = length;
+	unsigned short addr = slave_addr;
+	unsigned long mode2 = readl(MSM_SSBI_BASE + SSBI2_MODE2);
+
+	if (mode2 & SSBI_MODE2_SSBI2_MODE)
+		writel(SSBI_MODE2_REG_ADDR_15_8(mode2, addr),
+				MSM_SSBI_BASE + SSBI2_MODE2);
+
+	while (len) {
+		ret = i2c_ssbi_poll_for_device_ready();
+		if (ret) {
+		        dprintf (CRITICAL, "Error: device not ready\n");
+			return ret;
+		}
+
+		writel(SSBI_CMD_WRITE(addr, *buf++), MSM_SSBI_BASE + SSBI2_CMD);
+
+		while (readl(MSM_SSBI_BASE + SSBI2_STATUS) & SSBI_STATUS_MCHN_BUSY) {
+		  if (--timeout == 0) {
+		    dprintf(INFO, "In Device ready function:Timeout, status %x\n", readl(MSM_SSBI_BASE + SSBI2_STATUS));
+		    return 1;
+		  }
+		}
+		len--;
+	}
+	return 0;
+}
+
+int pa1_ssbi2_read_bytes(unsigned char  *buffer, unsigned short length,
+                                                unsigned short slave_addr)
+{
+    unsigned val = 0x0;
+    unsigned temp = 0x0000;
+    unsigned char *buf = buffer;
+    unsigned short len = length;
+    unsigned short addr = slave_addr;
+    unsigned long timeout = SSBI_TIMEOUT_US;
+
+    while(len)
+    {
+        val |= ((addr << PA1_SSBI2_REG_ADDR_SHIFT) |
+		(PA1_SSBI2_CMD_READ << PA1_SSBI2_CMD_RDWRN_SHIFT));
+        writel(val, PA1_SSBI2_CMD);
+        while(!((temp = readl(PA1_SSBI2_RD_STATUS)) & (1 << PA1_SSBI2_TRANS_DONE_SHIFT))) {
+            if (--timeout == 0) {
+	        dprintf(INFO, "In Device ready function:Timeout\n");
+	        return 1;
+	    }
+	}
+        len--;
+        *buf++ = (temp & (PA1_SSBI2_REG_DATA_MASK << PA1_SSBI2_REG_DATA_SHIFT));
+    }
+    return 0;
+}
+
+int pa1_ssbi2_write_bytes(unsigned char  *buffer, unsigned short length,
+                                                unsigned short slave_addr)
+{
+    unsigned val;
+    unsigned char *buf = buffer;
+    unsigned short len = length;
+    unsigned short addr = slave_addr;
+    unsigned temp = 0x00;
+    unsigned char written_data1 = 0x00;
+    unsigned long timeout = SSBI_TIMEOUT_US;
+    //unsigned char written_data2 = 0x00;
+
+    while(len)
+    {
+        temp = 0x00;
+        written_data1 = 0x00;
+        val = (addr << PA1_SSBI2_REG_ADDR_SHIFT) |
+	  (PA1_SSBI2_CMD_WRITE << PA1_SSBI2_CMD_RDWRN_SHIFT) |
+ (*buf & 0xFF);
+        writel(val, PA1_SSBI2_CMD);
+        while(!((temp = readl(PA1_SSBI2_RD_STATUS)) & (1 << PA1_SSBI2_TRANS_DONE_SHIFT))) {
+            if (--timeout == 0) {
+	        dprintf(INFO, "In Device write function:Timeout\n");
+	        return 1;
+	    }
+	}
+        len--;
+        buf++;
+    }
+    return 0;
+}
+
+int pa2_ssbi2_read_bytes(unsigned char  *buffer, unsigned short length,
+        unsigned short slave_addr)
+{
+    unsigned val = 0x0;
+    unsigned temp = 0x0000;
+    unsigned char *buf = buffer;
+    unsigned short len = length;
+    unsigned short addr = slave_addr;
+    unsigned long timeout = SSBI_TIMEOUT_US;
+
+    while(len)
+    {
+        val |= ((addr << PA2_SSBI2_REG_ADDR_SHIFT) |
+                (PA2_SSBI2_CMD_READ << PA2_SSBI2_CMD_RDWRN_SHIFT));
+        writel(val, PA2_SSBI2_CMD);
+        while(!((temp = readl(PA2_SSBI2_RD_STATUS)) & (1 << PA2_SSBI2_TRANS_DONE_SHIFT))) {
+            if (--timeout == 0) {
+                dprintf(INFO, "In Device ready function:Timeout\n");
+                return 1;
+            }
+        }
+        len--;
+        *buf++ = (temp & (PA2_SSBI2_REG_DATA_MASK << PA2_SSBI2_REG_DATA_SHIFT));
+    }
+    return 0;
+}
+
+int pa2_ssbi2_write_bytes(unsigned char  *buffer, unsigned short length,
+        unsigned short slave_addr)
+{
+    unsigned val;
+    unsigned char *buf = buffer;
+    unsigned short len = length;
+    unsigned short addr = slave_addr;
+    unsigned temp = 0x00;
+    unsigned char written_data1 = 0x00;
+    unsigned long timeout = SSBI_TIMEOUT_US;
+
+    while(len)
+    {
+        temp = 0x00;
+        written_data1 = 0x00;
+        val = (addr << PA2_SSBI2_REG_ADDR_SHIFT) |
+            (PA2_SSBI2_CMD_WRITE << PA2_SSBI2_CMD_RDWRN_SHIFT) |
+            (*buf & 0xFF);
+        writel(val, PA2_SSBI2_CMD);
+        while(!((temp = readl(PA2_SSBI2_RD_STATUS)) & (1 << PA2_SSBI2_TRANS_DONE_SHIFT))) {
+            if (--timeout == 0) {
+                dprintf(INFO, "In Device write function:Timeout\n");
+                return 1;
+            }
+        }
+        len--;
+        buf++;
+    }
+    return 0;
+}
diff --git a/include/dev/gpio_keypad.h b/include/dev/gpio_keypad.h
index 4ab1449..77348f6 100644
--- a/include/dev/gpio_keypad.h
+++ b/include/dev/gpio_keypad.h
@@ -55,60 +55,6 @@
 
 void gpio_keypad_init(struct gpio_keypad_info *kpinfo);
 
-//Macros for SSBI Qwerty keypad for 7x30
-
-/* SSBI 2.0 controller registers */
-#define MSM_SSBI_BASE                   0xAD900000
-
-#define SSBI_TIMEOUT_US			100
-
-#define SSBI2_CTL			0x0000
-#define SSBI2_RESET			0x0004
-#define SSBI2_CMD			0x0008
-#define SSBI2_RD			0x0010
-#define SSBI2_STATUS			0x0014
-#define SSBI2_PRIORITIES		0x0018
-#define SSBI2_MODE2			0x001C
-
-/* SSBI_CMD fields */
-#define SSBI_CMD_SEND_TERM_SYM		(0x01 << 27)
-#define SSBI_CMD_WAKEUP_SLAVE		(0x01 << 26)
-#define SSBI_CMD_USE_ENABLE		(0x01 << 25)
-#define SSBI_CMD_RDWRN			(0x01 << 24)
-#define SSBI_CMD_REG_ADDR_SHFT		(0x10)
-#define SSBI_CMD_REG_ADDR_MASK		(0xFF << SSBI_CMD_REG_ADDR_SHFT)
-#define SSBI_CMD_REG_DATA_SHFT		(0x00)
-#define SSBI_CMD_REG_DATA_MASK		(0xFF << SSBI_CMD_REG_DATA_SHFT)
-
-/* SSBI_STATUS fields */
-#define SSBI_STATUS_DATA_IN		0x10
-#define SSBI_STATUS_RD_CLOBBERED	0x08
-#define SSBI_STATUS_RD_READY		0x04
-#define SSBI_STATUS_READY		0x02
-#define SSBI_STATUS_MCHN_BUSY		0x01
-
-/* SSBI_RD fields */
-#define SSBI_RD_USE_ENABLE		0x02000000
-#define SSBI_RD_RDWRN			0x01000000
-#define SSBI_RD_REG_ADDR_SHFT		0x10
-#define SSBI_RD_REG_ADDR_MASK		(0xFF << SSBI_RD_REG_ADDR_SHFT)
-#define SSBI_RD_REG_DATA_SHFT		(0x00)
-#define SSBI_RD_REG_DATA_MASK		(0xFF << SSBI_RD_REG_DATA_SHFT)
-
-/* SSBI_MODE2 fields */
-#define SSBI_MODE2_REG_ADDR_15_8_SHFT	0x04
-#define SSBI_MODE2_REG_ADDR_15_8_MASK	(0x7F << SSBI_MODE2_REG_ADDR_15_8_SHFT)
-#define SSBI_MODE2_ADDR_WIDTH_SHFT	0x01
-#define SSBI_MODE2_ADDR_WIDTH_MASK	(0x07 << SSBI_MODE2_ADDR_WIDTH_SHFT)
-#define SSBI_MODE2_SSBI2_MODE		0x00000001
-
-//Keypad controller configurations
-#define SSBI_REG_KYPD_CNTL_ADDR         0x148
-#define SSBI_REG_KYPD_SCAN_ADDR         0x149
-#define SSBI_REG_KYPD_TEST_ADDR         0x14A
-#define SSBI_REG_KYPD_REC_DATA_ADDR     0x14B
-#define SSBI_REG_KYPD_OLD_DATA_ADDR     0x14C
-
 // GPIO configurations
 
 #define	SSBI_REG_ADDR_GPIO_BASE		0x150
@@ -172,35 +118,6 @@
 #define	PM8058_GPIO_FUNC_MASK		0x0E
 #define	PM8058_GPIO_FUNC_SHIFT		1
 
-
-/* PMIC Arbiter 1: SSBI2 Configuration Micro ARM registers */
-#define PA1_SSBI2_CMD                   0x00500000
-#define PA1_SSBI2_RD_STATUS             0x00500004
-
-#define PA1_SSBI2_REG_ADDR_SHIFT        8
-#define PA1_SSBI2_CMD_RDWRN_SHIFT       24
-#define PA1_SSBI2_TRANS_DONE_SHIFT      27
-
-#define PA1_SSBI2_REG_DATA_MASK         0xFF
-#define PA1_SSBI2_REG_DATA_SHIFT        0
-
-#define PA1_SSBI2_CMD_READ              1
-#define PA1_SSBI2_CMD_WRITE             0
-
-/* PMIC Arbiter 2: SSBI2 Configuration Micro ARM registers */
-#define PA2_SSBI2_CMD                   0x00C00000
-#define PA2_SSBI2_RD_STATUS             0x00C00004
-
-#define PA2_SSBI2_REG_ADDR_SHIFT        8
-#define PA2_SSBI2_CMD_RDWRN_SHIFT       24
-#define PA2_SSBI2_TRANS_DONE_SHIFT      27
-
-#define PA2_SSBI2_REG_DATA_MASK         0xFF
-#define PA2_SSBI2_REG_DATA_SHIFT        0
-
-#define PA2_SSBI2_CMD_READ              1
-#define PA2_SSBI2_CMD_WRITE             0
-
 struct pm8058_gpio {
 	int		direction;
 	int		pull;
@@ -231,25 +148,6 @@
 	unsigned       flags;
 };
 
-#define SSBI_CMD_READ(AD) \
-	(SSBI_CMD_RDWRN | (((AD) & 0xFF) << SSBI_CMD_REG_ADDR_SHFT))
-
-#define SSBI_CMD_WRITE(AD, DT) \
-  ((((AD) & 0xFF) << SSBI_CMD_REG_ADDR_SHFT) | \
-   (((DT) & 0xFF) << SSBI_CMD_REG_DATA_SHFT))
-
-#define SSBI_MODE2_REG_ADDR_15_8(MD, AD) \
-	(((MD) & 0x0F) | ((((AD) >> 8) << SSBI_MODE2_REG_ADDR_15_8_SHFT) & \
-	SSBI_MODE2_REG_ADDR_15_8_MASK))
-
 void ssbi_keypad_init (struct qwerty_keypad_info *);
-int i2c_ssbi_read_bytes(unsigned char  *buffer, unsigned short length,
-			unsigned short slave_addr);
-int i2c_ssbi_write_bytes(unsigned char  *buffer, unsigned short length,
-			 unsigned short slave_addr);
-int pa1_ssbi2_read_bytes(unsigned char  *buffer, unsigned short length,
-			 unsigned short slave_addr);
-int pa1_ssbi2_write_bytes(unsigned char  *buffer, unsigned short length,
-			  unsigned short slave_addr);
 
 #endif /* __DEV_GPIO_KEYPAD_H */
diff --git a/target/apq8064/init.c b/target/apq8064/init.c
index c5f475c..5bea927 100644
--- a/target/apq8064/init.c
+++ b/target/apq8064/init.c
@@ -36,7 +36,7 @@
 #include <baseband.h>
 #include <dev/keys.h>
 #include <dev/pm8921.h>
-#include <dev/gpio_keypad.h>
+#include <dev/ssbi.h>
 #include <platform/iomap.h>
 #include <lib/ptable.h>
 
diff --git a/target/apq8064/keypad.c b/target/apq8064/keypad.c
index c2d01fe..2fec00f 100644
--- a/target/apq8064/keypad.c
+++ b/target/apq8064/keypad.c
@@ -29,6 +29,7 @@
 
 #include <string.h>
 #include <dev/keys.h>
+#include <dev/ssbi.h>
 #include <dev/gpio_keypad.h>
 
 #define NUM_OF_ROWS 1
diff --git a/target/apq8064/rules.mk b/target/apq8064/rules.mk
index 9e54d77..72dc708 100644
--- a/target/apq8064/rules.mk
+++ b/target/apq8064/rules.mk
@@ -14,6 +14,7 @@
 
 MODULES += \
 	dev/keys \
+	dev/ssbi \
 	dev/pmic/pm8921 \
 	lib/ptable
 
diff --git a/target/msm7627_surf/init.c b/target/msm7627_surf/init.c
index fd713fb..fb92be7 100644
--- a/target/msm7627_surf/init.c
+++ b/target/msm7627_surf/init.c
@@ -33,7 +33,6 @@
 #include <reg.h>
 #include <debug.h>
 #include <dev/keys.h>
-#include <dev/gpio_keypad.h>
 #include <lib/ptable.h>
 #include <dev/flash.h>
 #include <smem.h>
diff --git a/target/msm7627_surf/keypad.c b/target/msm7627_surf/keypad.c
index fed7056..a77e267 100644
--- a/target/msm7627_surf/keypad.c
+++ b/target/msm7627_surf/keypad.c
@@ -31,6 +31,7 @@
  */
 
 #include <dev/keys.h>
+#include <dev/ssbi.h>
 #include <dev/gpio_keypad.h>
 
 #define ARRAY_SIZE(x) (sizeof(x)/sizeof((x)[0]))
diff --git a/target/msm7627_surf/rules.mk b/target/msm7627_surf/rules.mk
index 701feaa..cf40a97 100644
--- a/target/msm7627_surf/rules.mk
+++ b/target/msm7627_surf/rules.mk
@@ -22,6 +22,7 @@
 
 MODULES += \
 	dev/keys \
+	dev/ssbi \
 	lib/ptable
 
 DEFINES += \
diff --git a/target/msm7627a/init.c b/target/msm7627a/init.c
index eace109..505cbd0 100644
--- a/target/msm7627a/init.c
+++ b/target/msm7627a/init.c
@@ -33,7 +33,7 @@
 #include <reg.h>
 #include <debug.h>
 #include <dev/keys.h>
-#include <dev/gpio_keypad.h>
+#include <dev/ssbi.h>
 #include <lib/ptable.h>
 #include <dev/flash.h>
 #include <smem.h>
diff --git a/target/msm7627a/keypad.c b/target/msm7627a/keypad.c
index 2657e02..15aef13 100644
--- a/target/msm7627a/keypad.c
+++ b/target/msm7627a/keypad.c
@@ -31,6 +31,7 @@
  */
 
 #include <dev/keys.h>
+#include <dev/ssbi.h>
 #include <dev/gpio_keypad.h>
 
 #define ARRAY_SIZE(x) (sizeof(x)/sizeof((x)[0]))
diff --git a/target/msm7627a/rules.mk b/target/msm7627a/rules.mk
index 0a0e672..055e4cc 100644
--- a/target/msm7627a/rules.mk
+++ b/target/msm7627a/rules.mk
@@ -24,6 +24,7 @@
 
 MODULES += \
 	dev/keys \
+	dev/ssbi \
 	lib/ptable
 
 DEFINES += \
diff --git a/target/msm7630_surf/init.c b/target/msm7630_surf/init.c
index fcae4ca..42673e0 100644
--- a/target/msm7630_surf/init.c
+++ b/target/msm7630_surf/init.c
@@ -33,7 +33,7 @@
 #include <debug.h>
 #include <dev/keys.h>
 #include <dev/gpio.h>
-#include <dev/gpio_keypad.h>
+#include <dev/ssbi.h>
 #include <lib/ptable.h>
 #include <dev/flash.h>
 #include <smem.h>
diff --git a/target/msm7630_surf/keypad.c b/target/msm7630_surf/keypad.c
index 46c51c8..5733a86 100644
--- a/target/msm7630_surf/keypad.c
+++ b/target/msm7630_surf/keypad.c
@@ -31,6 +31,7 @@
  */
 
 #include <dev/keys.h>
+#include <dev/ssbi.h>
 #include <dev/gpio_keypad.h>
 
 #define ARRAY_SIZE(x) (sizeof(x)/sizeof((x)[0]))
diff --git a/target/msm7630_surf/rules.mk b/target/msm7630_surf/rules.mk
index 3c1efac..76d5edb 100644
--- a/target/msm7630_surf/rules.mk
+++ b/target/msm7630_surf/rules.mk
@@ -24,6 +24,7 @@
 
 MODULES += \
 	dev/keys \
+	dev/ssbi \
 	lib/ptable
 
 DEFINES += \
diff --git a/target/msm8660_surf/init.c b/target/msm8660_surf/init.c
index f0c49f6..46aa665 100755
--- a/target/msm8660_surf/init.c
+++ b/target/msm8660_surf/init.c
@@ -32,7 +32,7 @@
 
 #include <debug.h>
 #include <dev/keys.h>
-#include <dev/gpio_keypad.h>
+#include <dev/ssbi.h>
 #include <dev/gpio.h>
 #include <lib/ptable.h>
 #include <dev/flash.h>
diff --git a/target/msm8660_surf/keypad.c b/target/msm8660_surf/keypad.c
index ba1374c..246039e 100644
--- a/target/msm8660_surf/keypad.c
+++ b/target/msm8660_surf/keypad.c
@@ -28,6 +28,7 @@
  */
 
 #include <dev/keys.h>
+#include <dev/ssbi.h>
 #include <dev/gpio_keypad.h>
 #include <platform.h>
 
diff --git a/target/msm8660_surf/rules.mk b/target/msm8660_surf/rules.mk
index 5313ff0..7be16a4 100755
--- a/target/msm8660_surf/rules.mk
+++ b/target/msm8660_surf/rules.mk
@@ -25,6 +25,7 @@
 
 MODULES += \
 	dev/keys \
+	dev/ssbi \
 	lib/ptable
 
 DEFINES += \
diff --git a/target/msm8960/init.c b/target/msm8960/init.c
index 4267381..3ed6719 100644
--- a/target/msm8960/init.c
+++ b/target/msm8960/init.c
@@ -39,7 +39,7 @@
 #include <reg.h>
 #include <dev/keys.h>
 #include <dev/pm8921.h>
-#include <dev/gpio_keypad.h>
+#include <dev/ssbi.h>
 #include <gsbi.h>
 #include <target.h>
 #include <platform.h>
diff --git a/target/msm8960/keypad.c b/target/msm8960/keypad.c
index 4ad9495..5cc0b87 100755
--- a/target/msm8960/keypad.c
+++ b/target/msm8960/keypad.c
@@ -29,6 +29,7 @@
 
 #include <string.h>
 #include <dev/keys.h>
+#include <dev/ssbi.h>
 #include <dev/gpio_keypad.h>
 
 #define NUM_OF_ROWS 1
diff --git a/target/msm8960/rules.mk b/target/msm8960/rules.mk
index 829fada..7a28bb4 100644
--- a/target/msm8960/rules.mk
+++ b/target/msm8960/rules.mk
@@ -23,6 +23,7 @@
 MODULES += \
 	dev/keys \
 	dev/pmic/pm8921 \
+	dev/ssbi \
 	lib/ptable
 
 DEFINES += \