| /* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions |
| * are met: |
| * * Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * * Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in |
| * the documentation and/or other materials provided with the |
| * distribution. |
| * * Neither the name of The Linux Foundation nor the names of its |
| * contributors may be used to endorse or promote products derived |
| * from this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
| * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
| * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
| * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
| * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
| * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS |
| * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED |
| * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT |
| * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
| * SUCH DAMAGE. |
| */ |
| |
| /*--------------------------------------------------------------------------- |
| * This file is autogenerated file using gcdb parser. Please do not edit it. |
| * Update input XML file to add a new entry or update variable in this file |
| * VERSION = "1.0" |
| *---------------------------------------------------------------------------*/ |
| |
| #ifndef _PANEL_NT35590_QVGA_CMD_H_ |
| #define _PANEL_NT35590_QVGA_CMD_H_ |
| /*---------------------------------------------------------------------------*/ |
| /* HEADER files */ |
| /*---------------------------------------------------------------------------*/ |
| #include "panel.h" |
| |
| /*---------------------------------------------------------------------------*/ |
| /* Panel configuration */ |
| /*---------------------------------------------------------------------------*/ |
| static struct panel_config nt35590_qvga_cmd_panel_data = { |
| "qcom,mdss_dsi_nt35590_qvga_cmd", "dsi:0:", "qcom,mdss-dsi-panel", |
| 10, 1, "DISPLAY_1", 0, 0, 60, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 |
| }; |
| |
| /*---------------------------------------------------------------------------*/ |
| /* Panel resolution */ |
| /*---------------------------------------------------------------------------*/ |
| static struct panel_resolution nt35590_qvga_cmd_panel_res = { |
| 320, 240, 140, 164, 8, 0, 6, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 |
| }; |
| |
| /*---------------------------------------------------------------------------*/ |
| /* Panel color information */ |
| /*---------------------------------------------------------------------------*/ |
| static struct color_info nt35590_qvga_cmd_color = { |
| 24, 0, 0xff, 0, 0, 0 |
| }; |
| |
| /*---------------------------------------------------------------------------*/ |
| /* Panel on/off command information */ |
| /*---------------------------------------------------------------------------*/ |
| static char nt35590_qvga_cmd_on_cmd0[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xFF, 0xEE, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd1[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x26, 0x08, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd2[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x26, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd3[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xFF, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd4[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xBA, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd5[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xC2, 0x08, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd6[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xFF, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd7[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xFB, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd8[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x00, 0x4A, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd9[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x01, 0x33, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd10[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x02, 0x53, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd11[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x03, 0x55, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd12[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x04, 0x55, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd13[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x05, 0x33, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd14[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x06, 0x22, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd15[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x08, 0x56, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd16[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x09, 0x8F, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd17[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x36, 0x73, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd18[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x0B, 0x9F, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd19[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x0C, 0x9F, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd20[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x0D, 0x2F, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd21[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x0E, 0x24, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd22[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x11, 0x83, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd23[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x12, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd24[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x71, 0x2C, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd25[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x6F, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd26[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x0F, 0x0A, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd27[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xFF, 0x05, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd28[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xFB, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd29[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x01, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd30[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x02, 0x8B, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd31[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x03, 0x82, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd32[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x04, 0x82, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd33[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x05, 0x30, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd34[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x06, 0x33, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd35[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x07, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd36[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x08, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd37[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x09, 0x46, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd38[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x0A, 0x46, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd39[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x0D, 0x0B, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd40[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x0E, 0x1D, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd41[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x0F, 0x08, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd42[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x10, 0x53, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd43[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x11, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd44[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x12, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd45[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x14, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd46[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x15, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd47[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x16, 0x05, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd48[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x17, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd49[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x19, 0x7F, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd50[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x1A, 0xFF, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd51[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x1B, 0x0F, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd52[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x1C, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd53[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x1D, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd54[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x1E, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd55[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x1F, 0x07, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd56[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x20, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd57[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x21, 0x06, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd58[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x22, 0x55, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd59[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x23, 0x4D, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd60[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x2D, 0x02, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd61[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x28, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd62[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x2F, 0x02, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd63[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x83, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd64[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x9E, 0x58, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd65[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x9F, 0x6A, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd66[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xA0, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd67[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xA2, 0x10, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd68[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xBB, 0x0A, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd69[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xBC, 0x0A, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd70[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x32, 0x08, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd71[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x33, 0xB8, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd72[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x36, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd73[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x37, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd74[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x43, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd75[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x4B, 0x21, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd76[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x4C, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd77[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x50, 0x21, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd78[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x51, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd79[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x58, 0x21, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd80[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x59, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd81[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x5D, 0x21, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd82[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x5E, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd83[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x6C, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd84[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x6D, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd85[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xFB, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd86[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xFF, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd87[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xFB, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd88[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x75, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd89[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x76, 0x7D, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd90[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x77, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd91[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x78, 0x8A, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd92[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x79, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd93[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x7A, 0x9C, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd94[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x7B, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd95[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x7C, 0xB1, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd96[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x7D, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd97[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x7E, 0xBF, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd98[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x7F, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd99[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x80, 0xCF, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd100[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x81, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd101[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x82, 0xDD, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd102[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x83, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd103[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x84, 0xE8, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd104[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x85, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd105[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x86, 0xF2, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd106[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x87, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd107[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x88, 0x1F, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd108[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x89, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd109[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x8A, 0x41, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd110[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x8B, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd111[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x8C, 0x78, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd112[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x8D, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd113[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x8E, 0xA5, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd114[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x8F, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd115[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x90, 0xEE, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd116[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x91, 0x02, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd117[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x92, 0x29, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd118[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x93, 0x02, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd119[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x94, 0x2A, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd120[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x95, 0x02, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd121[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x96, 0x5D, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd122[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x97, 0x02, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd123[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x98, 0x93, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd124[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x99, 0x02, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd125[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x9A, 0xB8, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd126[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x9B, 0x02, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd127[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x9C, 0xE7, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd128[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x9D, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd129[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x9E, 0x07, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd130[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x9F, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd131[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xA0, 0x37, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd132[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xA2, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd133[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xA3, 0x46, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd134[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xA4, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd135[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xA5, 0x56, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd136[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xA6, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd137[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xA7, 0x66, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd138[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xA9, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd139[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xAA, 0x7A, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd140[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xAB, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd141[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xAC, 0x93, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd142[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xAD, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd143[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xAE, 0xA3, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd144[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xAF, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd145[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xB0, 0xB4, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd146[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xB1, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd147[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xB2, 0xCB, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd148[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xB3, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd149[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xB4, 0x7D, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd150[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xB5, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd151[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xB6, 0x8A, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd152[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xB7, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd153[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xB8, 0x9C, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd154[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xB9, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd155[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xBA, 0xB1, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd156[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xBB, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd157[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xBC, 0xBF, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd158[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xBD, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd159[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xBE, 0xCF, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd160[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xBF, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd161[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xC0, 0xDD, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd162[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xC1, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd163[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xC2, 0xE8, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd164[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xC3, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd165[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xC4, 0xF2, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd166[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xC5, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd167[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xC6, 0x1F, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd168[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xC7, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd169[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xC8, 0x41, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd170[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xC9, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd171[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xCA, 0x78, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd172[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xCB, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd173[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xCC, 0xA5, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd174[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xCD, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd175[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xCE, 0xEE, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd176[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xCF, 0x02, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd177[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xD0, 0x29, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd178[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xD1, 0x02, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd179[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xD2, 0x2A, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd180[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xD3, 0x02, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd181[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xD4, 0x5D, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd182[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xD5, 0x02, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd183[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xD6, 0x93, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd184[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xD7, 0x02, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd185[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xD8, 0xB8, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd186[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xD9, 0x02, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd187[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xDA, 0xE7, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd188[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xDB, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd189[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xDC, 0x07, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd190[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xDD, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd191[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xDE, 0x37, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd192[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xDF, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd193[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xE0, 0x46, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd194[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xE1, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd195[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xE2, 0x56, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd196[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xE3, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd197[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xE4, 0x66, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd198[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xE5, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd199[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xE6, 0x7A, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd200[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xE7, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd201[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xE8, 0x93, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd202[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xE9, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd203[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xEA, 0xA3, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd204[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xEB, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd205[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xEC, 0xB4, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd206[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xED, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd207[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xEE, 0xCB, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd208[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xEF, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd209[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xF0, 0xED, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd210[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xF1, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd211[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xF2, 0xF3, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd212[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xF3, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd213[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xF4, 0xFE, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd214[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xF5, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd215[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xF6, 0x09, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd216[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xF7, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd217[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xF8, 0x13, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd218[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xF9, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd219[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xFA, 0x1D, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd220[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xFF, 0x02, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd221[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xFB, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd222[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x00, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd223[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x01, 0x26, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd224[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x02, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd225[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x03, 0x2F, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd226[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x04, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd227[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x05, 0x37, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd228[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x06, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd229[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x07, 0x56, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd230[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x08, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd231[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x09, 0x70, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd232[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x0A, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd233[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x0B, 0x9D, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd234[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x0C, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd235[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x0D, 0xC2, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd236[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x0E, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd237[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x0F, 0xFF, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd238[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x10, 0x02, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd239[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x11, 0x31, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd240[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x12, 0x02, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd241[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x13, 0x32, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd242[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x14, 0x02, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd243[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x15, 0x60, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd244[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x16, 0x02, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd245[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x17, 0x94, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd246[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x18, 0x02, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd247[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x19, 0xB5, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd248[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x1A, 0x02, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd249[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x1B, 0xE3, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd250[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x1C, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd251[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x1D, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd252[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x1E, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd253[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x1F, 0x2D, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd254[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x20, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd255[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x21, 0x3A, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd256[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x22, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd257[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x23, 0x48, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd258[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x24, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd259[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x25, 0x57, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd260[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x26, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd261[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x27, 0x68, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd262[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x28, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd263[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x29, 0x7B, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd264[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x2A, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd265[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x2B, 0x90, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd266[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x2D, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd267[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x2F, 0xA0, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd268[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x30, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd269[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x31, 0xCB, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd270[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x32, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd271[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x33, 0xED, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd272[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x34, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd273[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x35, 0xF3, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd274[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x36, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd275[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x37, 0xFE, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd276[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x38, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd277[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x39, 0x09, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd278[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x3A, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd279[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x3B, 0x13, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd280[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x3D, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd281[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x3F, 0x1D, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd282[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x40, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd283[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x41, 0x26, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd284[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x42, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd285[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x43, 0x2F, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd286[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x44, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd287[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x45, 0x37, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd288[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x46, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd289[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x47, 0x56, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd290[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x48, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd291[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x49, 0x70, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd292[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x4A, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd293[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x4B, 0x9D, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd294[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x4C, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd295[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x4D, 0xC2, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd296[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x4E, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd297[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x4F, 0xFF, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd298[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x50, 0x02, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd299[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x51, 0x31, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd300[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x52, 0x02, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd301[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x53, 0x32, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd302[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x54, 0x02, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd303[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x55, 0x60, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd304[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x56, 0x02, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd305[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x58, 0x94, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd306[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x59, 0x02, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd307[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x5A, 0xB5, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd308[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x5B, 0x02, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd309[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x5C, 0xE3, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd310[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x5D, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd311[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x5E, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd312[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x5F, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd313[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x60, 0x2D, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd314[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x61, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd315[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x62, 0x3A, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd316[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x63, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd317[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x64, 0x48, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd318[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x65, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd319[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x66, 0x57, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd320[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x67, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd321[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x68, 0x68, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd322[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x69, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd323[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x6A, 0x7B, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd324[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x6B, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd325[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x6C, 0x90, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd326[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x6D, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd327[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x6E, 0xA0, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd328[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x6F, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd329[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x70, 0xCB, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd330[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x71, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd331[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x72, 0x19, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd332[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x73, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd333[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x74, 0x36, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd334[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x75, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd335[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x76, 0x55, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd336[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x77, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd337[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x78, 0x70, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd338[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x79, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd339[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x7A, 0x83, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd340[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x7B, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd341[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x7C, 0x99, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd342[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x7D, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd343[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x7E, 0xA8, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd344[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x7F, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd345[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x80, 0xB7, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd346[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x81, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd347[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x82, 0xC5, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd348[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x83, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd349[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x84, 0xF7, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd350[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x85, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd351[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x86, 0x1E, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd352[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x87, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd353[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x88, 0x60, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd354[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x89, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd355[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x8A, 0x95, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd356[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x8B, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd357[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x8C, 0xE1, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd358[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x8D, 0x02, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd359[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x8E, 0x20, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd360[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x8F, 0x02, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd361[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x90, 0x23, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd362[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x91, 0x02, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd363[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x92, 0x59, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd364[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x93, 0x02, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd365[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x94, 0x94, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd366[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x95, 0x02, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd367[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x96, 0xB4, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd368[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x97, 0x02, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd369[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x98, 0xE1, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd370[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x99, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd371[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x9A, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd372[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x9B, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd373[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x9C, 0x28, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd374[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x9D, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd375[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x9E, 0x30, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd376[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x9F, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd377[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xA0, 0x37, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd378[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xA2, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd379[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xA3, 0x3B, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd380[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xA4, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd381[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xA5, 0x40, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd382[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xA6, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd383[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xA7, 0x50, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd384[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xA9, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd385[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xAA, 0x6D, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd386[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xAB, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd387[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xAC, 0x80, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd388[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xAD, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd389[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xAE, 0xCB, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd390[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xAF, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd391[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xB0, 0x19, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd392[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xB1, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd393[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xB2, 0x36, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd394[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xB3, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd395[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xB4, 0x55, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd396[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xB5, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd397[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xB6, 0x70, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd398[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xB7, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd399[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xB8, 0x83, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd400[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xB9, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd401[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xBA, 0x99, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd402[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xBB, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd403[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xBC, 0xA8, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd404[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xBD, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd405[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xBE, 0xB7, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd406[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xBF, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd407[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xC0, 0xC5, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd408[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xC1, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd409[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xC2, 0xF7, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd410[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xC3, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd411[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xC4, 0x1E, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd412[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xC5, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd413[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xC6, 0x60, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd414[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xC7, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd415[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xC8, 0x95, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd416[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xC9, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd417[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xCA, 0xE1, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd418[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xCB, 0x02, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd419[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xCC, 0x20, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd420[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xCD, 0x02, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd421[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xCE, 0x23, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd422[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xCF, 0x02, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd423[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xD0, 0x59, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd424[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xD1, 0x02, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd425[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xD2, 0x94, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd426[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xD3, 0x02, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd427[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xD4, 0xB4, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd428[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xD5, 0x02, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd429[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xD6, 0xE1, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd430[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xD7, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd431[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xD8, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd432[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xD9, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd433[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xDA, 0x28, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd434[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xDB, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd435[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xDC, 0x30, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd436[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xDD, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd437[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xDE, 0x37, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd438[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xDF, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd439[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xE0, 0x3B, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd440[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xE1, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd441[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xE2, 0x40, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd442[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xE3, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd443[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xE4, 0x50, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd444[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xE5, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd445[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xE6, 0x6D, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd446[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xE7, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd447[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xE8, 0x80, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd448[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xE9, 0x03, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd449[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xEA, 0xCB, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd450[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xFF, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd451[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xFB, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd452[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xFF, 0x02, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd453[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xFB, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd454[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xFF, 0x04, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd455[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xFB, 0x01, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd456[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xFF, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd457[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x11, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd458[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xFF, 0xEE, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd459[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x12, 0x50, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd460[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x13, 0x02, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd461[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x6A, 0x60, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd462[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0xFF, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd463[] = { |
| 0x02, 0x00, 0x29, 0xC0, |
| 0x29, 0x00, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd464[] = { |
| 0x05, 0x00, 0x29, 0xC0, |
| 0x2A, 0x00, 0x00, 0x01, |
| 0x3F, 0xFF, 0xFF, 0xFF, |
| }; |
| |
| static char nt35590_qvga_cmd_on_cmd465[] = { |
| 0x05, 0x00, 0x29, 0xC0, |
| 0x2B, 0x00, 0x00, 0x00, |
| 0xEF, 0xFF, 0xFF, 0xFF, |
| }; |
| |
| static struct mipi_dsi_cmd nt35590_qvga_cmd_on_command[] = { |
| {0x8, nt35590_qvga_cmd_on_cmd0, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd1, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd2, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd3, 0x10}, |
| {0x8, nt35590_qvga_cmd_on_cmd4, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd5, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd6, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd7, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd8, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd9, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd10, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd11, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd12, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd13, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd14, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd15, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd16, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd17, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd18, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd19, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd20, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd21, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd22, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd23, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd24, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd25, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd26, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd27, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd28, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd29, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd30, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd31, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd32, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd33, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd34, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd35, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd36, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd37, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd38, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd39, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd40, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd41, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd42, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd43, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd44, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd45, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd46, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd47, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd48, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd49, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd50, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd51, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd52, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd53, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd54, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd55, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd56, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd57, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd58, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd59, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd60, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd61, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd62, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd63, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd64, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd65, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd66, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd67, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd68, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd69, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd70, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd71, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd72, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd73, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd74, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd75, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd76, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd77, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd78, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd79, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd80, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd81, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd82, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd83, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd84, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd85, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd86, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd87, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd88, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd89, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd90, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd91, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd92, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd93, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd94, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd95, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd96, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd97, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd98, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd99, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd100, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd101, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd102, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd103, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd104, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd105, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd106, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd107, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd108, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd109, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd110, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd111, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd112, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd113, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd114, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd115, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd116, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd117, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd118, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd119, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd120, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd121, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd122, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd123, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd124, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd125, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd126, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd127, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd128, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd129, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd130, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd131, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd132, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd133, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd134, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd135, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd136, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd137, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd138, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd139, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd140, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd141, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd142, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd143, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd144, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd145, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd146, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd147, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd148, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd149, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd150, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd151, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd152, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd153, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd154, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd155, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd156, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd157, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd158, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd159, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd160, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd161, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd162, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd163, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd164, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd165, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd166, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd167, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd168, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd169, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd170, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd171, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd172, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd173, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd174, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd175, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd176, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd177, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd178, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd179, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd180, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd181, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd182, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd183, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd184, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd185, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd186, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd187, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd188, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd189, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd190, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd191, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd192, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd193, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd194, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd195, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd196, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd197, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd198, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd199, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd200, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd201, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd202, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd203, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd204, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd205, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd206, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd207, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd208, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd209, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd210, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd211, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd212, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd213, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd214, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd215, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd216, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd217, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd218, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd219, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd220, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd221, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd222, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd223, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd224, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd225, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd226, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd227, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd228, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd229, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd230, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd231, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd232, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd233, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd234, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd235, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd236, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd237, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd238, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd239, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd240, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd241, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd242, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd243, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd244, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd245, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd246, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd247, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd248, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd249, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd250, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd251, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd252, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd253, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd254, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd255, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd256, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd257, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd258, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd259, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd260, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd261, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd262, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd263, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd264, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd265, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd266, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd267, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd268, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd269, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd270, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd271, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd272, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd273, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd274, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd275, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd276, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd277, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd278, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd279, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd280, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd281, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd282, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd283, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd284, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd285, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd286, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd287, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd288, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd289, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd290, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd291, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd292, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd293, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd294, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd295, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd296, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd297, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd298, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd299, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd300, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd301, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd302, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd303, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd304, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd305, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd306, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd307, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd308, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd309, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd310, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd311, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd312, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd313, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd314, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd315, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd316, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd317, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd318, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd319, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd320, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd321, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd322, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd323, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd324, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd325, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd326, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd327, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd328, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd329, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd330, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd331, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd332, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd333, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd334, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd335, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd336, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd337, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd338, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd339, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd340, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd341, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd342, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd343, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd344, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd345, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd346, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd347, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd348, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd349, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd350, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd351, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd352, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd353, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd354, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd355, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd356, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd357, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd358, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd359, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd360, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd361, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd362, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd363, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd364, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd365, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd366, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd367, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd368, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd369, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd370, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd371, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd372, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd373, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd374, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd375, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd376, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd377, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd378, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd379, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd380, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd381, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd382, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd383, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd384, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd385, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd386, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd387, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd388, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd389, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd390, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd391, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd392, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd393, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd394, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd395, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd396, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd397, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd398, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd399, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd400, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd401, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd402, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd403, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd404, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd405, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd406, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd407, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd408, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd409, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd410, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd411, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd412, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd413, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd414, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd415, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd416, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd417, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd418, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd419, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd420, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd421, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd422, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd423, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd424, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd425, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd426, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd427, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd428, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd429, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd430, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd431, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd432, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd433, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd434, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd435, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd436, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd437, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd438, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd439, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd440, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd441, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd442, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd443, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd444, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd445, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd446, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd447, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd448, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd449, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd450, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd451, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd452, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd453, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd454, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd455, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd456, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd457, 0x64}, |
| {0x8, nt35590_qvga_cmd_on_cmd458, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd459, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd460, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd461, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd462, 0x00}, |
| {0x8, nt35590_qvga_cmd_on_cmd463, 0x78}, |
| {0xc, nt35590_qvga_cmd_on_cmd464, 0x00}, |
| {0xc, nt35590_qvga_cmd_on_cmd465, 0x00} |
| }; |
| |
| #define NT35590_QVGA_CMD_ON_COMMAND 466 |
| |
| |
| static char nt35590_qvga_cmdoff_cmd0[] = { |
| 0x28, 0x00, 0x05, 0x80 |
| }; |
| |
| static char nt35590_qvga_cmdoff_cmd1[] = { |
| 0x10, 0x00, 0x05, 0x80 |
| }; |
| |
| static struct mipi_dsi_cmd nt35590_qvga_cmd_off_command[] = { |
| {0x4, nt35590_qvga_cmdoff_cmd0, 0x32}, |
| {0x4, nt35590_qvga_cmdoff_cmd1, 0x78} |
| }; |
| |
| #define NT35590_QVGA_CMD_OFF_COMMAND 2 |
| |
| |
| static struct command_state nt35590_qvga_cmd_state = { |
| 0, 1 |
| }; |
| |
| /*---------------------------------------------------------------------------*/ |
| /* Command mode panel information */ |
| /*---------------------------------------------------------------------------*/ |
| static struct commandpanel_info nt35590_qvga_cmd_command_panel = { |
| 1, 1, 1, 0, 0, 0x2c, 0, 0, 0, 1, 0, 0 |
| }; |
| |
| /*---------------------------------------------------------------------------*/ |
| /* Video mode panel information */ |
| /*---------------------------------------------------------------------------*/ |
| static struct videopanel_info nt35590_qvga_cmd_video_panel = { |
| 1, 0, 0, 0, 1, 1, 2, 0, 0x9 |
| }; |
| |
| /*---------------------------------------------------------------------------*/ |
| /* Lane configuration */ |
| /*---------------------------------------------------------------------------*/ |
| static struct lane_configuration nt35590_qvga_cmd_lane_config = { |
| 1, 0, 1, 0, 0, 0, 0 |
| }; |
| |
| /*---------------------------------------------------------------------------*/ |
| /* Panel timing */ |
| /*---------------------------------------------------------------------------*/ |
| static const uint32_t nt35590_qvga_cmd_timings[] = { |
| 0x2D, 0x0E, 0x08, 0x00, 0x2C, 0x30, 0x0C, 0x12, 0x0B, 0x03, 0x04, 0x00 |
| }; |
| |
| static struct panel_timing nt35590_qvga_cmd_timing_info = { |
| 0, 4, 0x05, 0x0F |
| }; |
| |
| static struct panel_reset_sequence nt35590_qvga_cmd_panel_reset_seq = { |
| { 1, 0, 1, }, { 20, 20, 20, }, 2 |
| }; |
| |
| /*---------------------------------------------------------------------------*/ |
| /* Backlight setting */ |
| /*---------------------------------------------------------------------------*/ |
| static struct backlight nt35590_qvga_cmd_backlight = { |
| 1, 1, 4095, 100, 1, "PMIC_8941" |
| }; |
| |
| #endif /*_PANEL_NT35590_QVGA_CMD_H_*/ |