blob: a057df7da58cf862f2642db5da1fa5aa409c118e [file] [log] [blame]
Channagoud Kadabi0f3a4f72014-02-06 13:22:07 -08001/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
2 *
3 * Redistribution and use in source and binary forms, with or without
4 * modification, are permitted provided that the following conditions are
5 * met:
6 * * Redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer.
8 * * Redistributions in binary form must reproduce the above
9 * copyright notice, this list of conditions and the following
10 * disclaimer in the documentation and/or other materials provided
11 * with the distribution.
12 * * Neither the name of The Linux Foundation nor the names of its
13 * contributors may be used to endorse or promote products derived
14 * from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
23 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
25 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
26 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <debug.h>
30#include <platform/iomap.h>
31#include <platform/irqs.h>
32#include <platform/gpio.h>
33#include <reg.h>
34#include <target.h>
35#include <platform.h>
36#include <dload_util.h>
37#include <uart_dm.h>
38#include <mmc.h>
39#include <spmi.h>
40#include <board.h>
41#include <smem.h>
42#include <baseband.h>
43#include <dev/keys.h>
44#include <pm8x41.h>
45#include <crypto5_wrapper.h>
46#include <hsusb.h>
47#include <clock.h>
48#include <partition_parser.h>
49#include <scm.h>
50#include <platform/clock.h>
51#include <platform/gpio.h>
52#include <platform/timer.h>
53#include <stdlib.h>
54#include <ufs.h>
55
56#define PMIC_ARB_CHANNEL_NUM 0
57#define PMIC_ARB_OWNER_ID 0
58
59#define FASTBOOT_MODE 0x77665500
60
61#define BOOT_DEVICE_MASK(val) ((val & 0x3E) >>1)
62
63static void set_sdc_power_ctrl(void);
64static uint32_t mmc_pwrctl_base[] =
65 { MSM_SDC1_BASE, MSM_SDC2_BASE };
66
67static uint32_t mmc_sdhci_base[] =
68 { MSM_SDC1_SDHCI_BASE, MSM_SDC2_SDHCI_BASE };
69
70static uint32_t mmc_sdc_pwrctl_irq[] =
71 { SDCC1_PWRCTL_IRQ, SDCC2_PWRCTL_IRQ };
72
73struct mmc_device *dev;
74struct ufs_dev ufs_device;
75
76extern void ulpi_write(unsigned val, unsigned reg);
77
78void target_early_init(void)
79{
80#if WITH_DEBUG_UART
81 uart_dm_init(2, 0, BLSP1_UART1_BASE);
82#endif
83}
84
85/* Return 1 if vol_up pressed */
86static int target_volume_up()
87{
88 uint8_t status = 0;
89 struct pm8x41_gpio gpio;
90
91 /* Configure the GPIO */
92 gpio.direction = PM_GPIO_DIR_IN;
93 gpio.function = 0;
94 gpio.pull = PM_GPIO_PULL_UP_30;
95 gpio.vin_sel = 2;
96
97 pm8x41_gpio_config(3, &gpio);
98
99 /* Wait for the pmic gpio config to take effect */
100 thread_sleep(1);
101
102 /* Get status of P_GPIO_5 */
103 pm8x41_gpio_get(3, &status);
104
105 return !status; /* active low */
106}
107
108/* Return 1 if vol_down pressed */
109uint32_t target_volume_down()
110{
111 return pm8x41_resin_status();
112}
113
114static void target_keystatus()
115{
116 keys_init();
117
118 if(target_volume_down())
119 keys_post_event(KEY_VOLUMEDOWN, 1);
120
121 if(target_volume_up())
122 keys_post_event(KEY_VOLUMEUP, 1);
123}
124
125void target_uninit(void)
126{
127 if (target_is_emmc_boot())
128 mmc_put_card_to_sleep(dev);
129}
130
131/* Do target specific usb initialization */
132void target_usb_init(void)
133{
134 uint32_t val;
135
136 /* Select and enable external configuration with USB PHY */
137 ulpi_write(ULPI_MISC_A_VBUSVLDEXTSEL | ULPI_MISC_A_VBUSVLDEXT, ULPI_MISC_A_SET);
138
139 /* Enable sess_vld */
140 val = readl(USB_GENCONFIG_2) | GEN2_SESS_VLD_CTRL_EN;
141 writel(val, USB_GENCONFIG_2);
142
143 /* Enable external vbus configuration in the LINK */
144 val = readl(USB_USBCMD);
145 val |= SESS_VLD_CTRL;
146 writel(val, USB_USBCMD);
147}
148
149void target_usb_stop(void)
150{
151 /* Disable VBUS mimicing in the controller. */
152 ulpi_write(ULPI_MISC_A_VBUSVLDEXTSEL | ULPI_MISC_A_VBUSVLDEXT, ULPI_MISC_A_CLEAR);
153}
154
155static void set_sdc_power_ctrl()
156{
157 /* Drive strength configs for sdc pins */
158 struct tlmm_cfgs sdc1_hdrv_cfg[] =
159 {
160 { SDC1_CLK_HDRV_CTL_OFF, TLMM_CUR_VAL_16MA, TLMM_HDRV_MASK },
161 { SDC1_CMD_HDRV_CTL_OFF, TLMM_CUR_VAL_10MA, TLMM_HDRV_MASK },
162 { SDC1_DATA_HDRV_CTL_OFF, TLMM_CUR_VAL_10MA, TLMM_HDRV_MASK },
163 };
164
165 /* Pull configs for sdc pins */
166 struct tlmm_cfgs sdc1_pull_cfg[] =
167 {
168 { SDC1_CLK_PULL_CTL_OFF, TLMM_NO_PULL, TLMM_PULL_MASK },
169 { SDC1_CMD_PULL_CTL_OFF, TLMM_PULL_UP, TLMM_PULL_MASK },
170 { SDC1_DATA_PULL_CTL_OFF, TLMM_PULL_UP, TLMM_PULL_MASK },
171 };
172
173 /* Set the drive strength & pull control values */
174 tlmm_set_hdrive_ctrl(sdc1_hdrv_cfg, ARRAY_SIZE(sdc1_hdrv_cfg));
175 tlmm_set_pull_ctrl(sdc1_pull_cfg, ARRAY_SIZE(sdc1_pull_cfg));
176}
177
178void target_sdc_init()
179{
180 struct mmc_config_data config;
181
182 /* Set drive strength & pull ctrl values */
183 set_sdc_power_ctrl();
184
185 config.bus_width = DATA_BUS_WIDTH_8BIT;
186 config.max_clk_rate = MMC_CLK_192MHZ;
187
188 /* Try slot 1*/
189 config.slot = 1;
190 config.sdhc_base = mmc_sdhci_base[config.slot - 1];
191 config.pwrctl_base = mmc_pwrctl_base[config.slot - 1];
192 config.pwr_irq = mmc_sdc_pwrctl_irq[config.slot - 1];
193
194 if (!(dev = mmc_init(&config)))
195 {
196 /* Try slot 2 */
197 config.slot = 2;
198 config.max_clk_rate = MMC_CLK_200MHZ;
199 config.sdhc_base = mmc_sdhci_base[config.slot - 1];
200 config.pwrctl_base = mmc_pwrctl_base[config.slot - 1];
201 config.pwr_irq = mmc_sdc_pwrctl_irq[config.slot - 1];
202
203 if (!(dev = mmc_init(&config)))
204 {
205 dprintf(CRITICAL, "mmc init failed!");
206 ASSERT(0);
207 }
208 }
209}
210
211static uint32_t boot_device;
212static uint32_t target_read_boot_config()
213{
214 uint32_t val;
215
216 val = readl(BOOT_CONFIG_REG);
217
218 val = BOOT_DEVICE_MASK(val);
219
220 return val;
221}
222
223uint32_t target_get_boot_device()
224{
225 return boot_device;
226}
227
228/*
229 * Return 1 if boot from emmc else 0
230 */
231uint32_t target_boot_device_emmc()
232{
233 uint32_t boot_dev_type;
234
235 boot_dev_type = target_get_boot_device();
236
237 if (boot_dev_type == BOOT_EMMC || boot_dev_type == BOOT_DEFAULT)
238 boot_dev_type = 1;
239 else
240 boot_dev_type = 0;
241
242 return boot_dev_type;
243}
244
245void *target_mmc_device()
246{
247 if (target_boot_device_emmc())
248 return (void *) dev;
249 else
250 return (void *) &ufs_device;
251}
252
253void target_init(void)
254{
255 dprintf(INFO, "target_init()\n");
256
257 spmi_init(PMIC_ARB_CHANNEL_NUM, PMIC_ARB_OWNER_ID);
258
259 target_keystatus();
260
261 boot_device = target_read_boot_config();
262
263 if (target_boot_device_emmc())
264 {
265 target_sdc_init();
266 }
267 else
268 {
269 ufs_device.base = UFS_BASE;
270 ufs_init(&ufs_device);
271 }
272
273 /* Storage initialization is complete, read the partition table info */
274 if (partition_read_table())
275 {
276 dprintf(CRITICAL, "Error reading the partition table info\n");
277 ASSERT(0);
278 }
279}
280
281unsigned board_machtype(void)
282{
283 return LINUX_MACHTYPE_UNKNOWN;
284}
285
286/* Detect the target type */
287void target_detect(struct board_data *board)
288{
289 /* This is filled from board.c */
290}
291
292/* Detect the modem type */
293void target_baseband_detect(struct board_data *board)
294{
295 uint32_t platform;
296
297 platform = board->platform;
298
299 switch(platform) {
300 case MSMPLUTONIUM:
301 board->baseband = BASEBAND_MSM;
302 break;
303 default:
304 dprintf(CRITICAL, "Platform type: %u is not supported\n",platform);
305 ASSERT(0);
306 };
307}
308unsigned target_baseband()
309{
310 return board_baseband();
311}
312
313void target_serialno(unsigned char *buf)
314{
315 unsigned int serialno;
316 if (target_is_emmc_boot()) {
317 serialno = mmc_get_psn();
318 snprintf((char *)buf, 13, "%x", serialno);
319 }
320}
321
322unsigned check_reboot_mode(void)
323{
324 uint32_t restart_reason = 0;
325 uint32_t restart_reason_addr;
326
327 restart_reason_addr = RESTART_REASON_ADDR;
328
329 /* Read reboot reason and scrub it */
330 restart_reason = readl(restart_reason_addr);
331 writel(0x00, restart_reason_addr);
332
333 return restart_reason;
334}
335
336void reboot_device(unsigned reboot_reason)
337{
338 uint8_t reset_type = 0;
339
340 /* Write the reboot reason */
341 writel(reboot_reason, RESTART_REASON_ADDR);
342
343 if(reboot_reason == FASTBOOT_MODE)
344 reset_type = PON_PSHOLD_WARM_RESET;
345 else
346 reset_type = PON_PSHOLD_HARD_RESET;
347
348 pm8x41_reset_configure(reset_type);
349
350 /* Drop PS_HOLD for MSM */
351 writel(0x00, MPM2_MPM_PS_HOLD);
352
353 mdelay(5000);
354
355 dprintf(CRITICAL, "Rebooting failed\n");
356}
357
358int emmc_recovery_init(void)
359{
360 return _emmc_recovery_init();
361}