blob: c90718e59604eec0a0bb8dff3108772dc018ba65 [file] [log] [blame]
Channagoud Kadabi123c9722014-02-06 13:22:50 -08001/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
2 *
3 * Redistribution and use in source and binary forms, with or without
4 * modification, are permitted provided that the following conditions are
5 * met:
6 * * Redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer.
8 * * Redistributions in binary form must reproduce the above
9 * copyright notice, this list of conditions and the following
10 * disclaimer in the documentation and/or other materials provided
11 * with the distribution.
12 * * Neither the name of The Linux Foundation nor the names of its
13 * contributors may be used to endorse or promote products derived
14 * from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
23 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
25 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
26 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <stdint.h>
30#include <debug.h>
31#include <reg.h>
32#include <mmc.h>
33#include <clock.h>
34#include <platform/clock.h>
35#include <platform/iomap.h>
36
37void hsusb_clock_init(void)
38{
39 int ret;
40 struct clk *iclk, *cclk;
41
42 ret = clk_get_set_enable("usb_iface_clk", 0, 1);
43 if(ret)
44 {
45 dprintf(CRITICAL, "failed to set usb_iface_clk ret = %d\n", ret);
46 ASSERT(0);
47 }
48
49 ret = clk_get_set_enable("usb_core_clk", 75000000, 1);
50 if(ret)
51 {
52 dprintf(CRITICAL, "failed to set usb_core_clk ret = %d\n", ret);
53 ASSERT(0);
54 }
55
56 /* Wait for the clocks to be stable since we are disabling soon after. */
57 mdelay(1);
58
59 iclk = clk_get("usb_iface_clk");
60 cclk = clk_get("usb_core_clk");
61
62 clk_disable(iclk);
63 clk_disable(cclk);
64
65 /* Wait for the clock disable to complete. */
66 mdelay(1);
67
68 /* Start the block reset for usb */
69 writel(1, USB_HS_BCR);
70
71 /* Wait for reset to complete. */
72 mdelay(1);
73
74 /* Take usb block out of reset */
75 writel(0, USB_HS_BCR);
76
77 /* Wait for the block to be brought out of reset. */
78 mdelay(1);
79
80 ret = clk_enable(iclk);
81
82 if(ret)
83 {
84 dprintf(CRITICAL, "failed to set usb_iface_clk after async ret = %d\n", ret);
85 ASSERT(0);
86 }
87
88 ret = clk_enable(cclk);
89
90 if(ret)
91 {
92 dprintf(CRITICAL, "failed to set usb_iface_clk after async ret = %d\n", ret);
93 ASSERT(0);
94 }
95
96}
97
98void clock_init_mmc(uint32_t interface)
99{
100 char clk_name[64];
101 int ret;
102
103 snprintf(clk_name, sizeof(clk_name), "sdc%u_iface_clk", interface);
104
105 /* enable interface clock */
106 ret = clk_get_set_enable(clk_name, 0, 1);
107 if(ret)
108 {
109 dprintf(CRITICAL, "failed to set sdc%u_iface_clk ret = %d\n", interface, ret);
110 ASSERT(0);
111 }
112}
113
114/* Configure MMC clock */
115void clock_config_mmc(uint32_t interface, uint32_t freq)
116{
117 int ret;
118 uint32_t reg;
119 char clk_name[64];
120
121 snprintf(clk_name, sizeof(clk_name), "sdc%u_core_clk", interface);
122
123 if(freq == MMC_CLK_400KHZ)
124 {
125 ret = clk_get_set_enable(clk_name, 400000, 1);
126 }
127 else if(freq == MMC_CLK_50MHZ)
128 {
129 ret = clk_get_set_enable(clk_name, 50000000, 1);
130 }
131 else if(freq == MMC_CLK_96MHZ)
132 {
133 ret = clk_get_set_enable(clk_name, 100000000, 1);
134 }
135 else if(freq == MMC_CLK_192MHZ)
136 {
137 ret = clk_get_set_enable(clk_name, 192000000, 1);
138 }
139 else
140 {
141 dprintf(CRITICAL, "sdc frequency (%u) is not supported\n", freq);
142 ASSERT(0);
143 }
144
145
146 if(ret)
147 {
148 dprintf(CRITICAL, "failed to set sdc%u_core_clk ret = %d\n", interface, ret);
149 ASSERT(0);
150 }
151}
152
153/* Configure UART clock based on the UART block id*/
154void clock_config_uart_dm(uint8_t id)
155{
156 int ret;
157 char iclk[64];
158 char cclk[64];
159
160 snprintf(iclk, sizeof(iclk), "uart%u_iface_clk", id);
161 snprintf(cclk, sizeof(cclk), "uart%u_core_clk", id);
162
163 ret = clk_get_set_enable(iclk, 0, 1);
164 if(ret)
165 {
166 dprintf(CRITICAL, "failed to set uart%u_iface_clk ret = %d\n", id, ret);
167 ASSERT(0);
168 }
169
170 ret = clk_get_set_enable(cclk, 7372800, 1);
171 if(ret)
172 {
173 dprintf(CRITICAL, "failed to set uart%u_core_clk ret = %d\n", id, ret);
174 ASSERT(0);
175 }
176}
177
178/* Function to asynchronously reset CE (Crypto Engine).
179 * Function assumes that all the CE clocks are off.
180 */
181static void ce_async_reset(uint8_t instance)
182{
183}
184
185void clock_ce_enable(uint8_t instance)
186{
187}
188
189void clock_ce_disable(uint8_t instance)
190{
191}
192
193void clock_config_ce(uint8_t instance)
194{
195 /* Need to enable the clock before disabling since the clk_disable()
196 * has a check to default to nop when the clk_enable() is not called
197 * on that particular clock.
198 */
199 clock_ce_enable(instance);
200
201 clock_ce_disable(instance);
202
203 ce_async_reset(instance);
204
205 clock_ce_enable(instance);
206
207}