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Deepa Dinamani9d470af2012-06-29 18:27:17 -07001/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
2
3 * Redistribution and use in source and binary forms, with or without
4 * modification, are permitted provided that the following conditions are
5 * met:
6 * * Redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer.
8 * * Redistributions in binary form must reproduce the above
9 * copyright notice, this list of conditions and the following
10 * disclaimer in the documentation and/or other materials provided
11 * with the distribution.
12 * * Neither the name of Code Aurora Forum, Inc. nor the names of its
13 * contributors may be used to endorse or promote products derived
14 * from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
23 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
25 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
26 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#ifndef __PLATFORM_MSM_SHARED_BAM_H
30#define __PLATFORM_MSM_SHARED_BAM_H
31
32#include <stdint.h>
33#include <compiler.h>
34
35#define BAM_DESC_SIZE 8
36#define BAM_CE_SIZE 16
37#define BAM_MAX_DESC_DATA_LEN 0xFFFF
38#define BAM_DATA_READ 0
39#define BAM_DATA_WRITE 1
40
41#define BAM_CTRL_REG(x) (0x0000 + (x))
42#define BAM_SW_RST_BIT_MASK 1
43#define BAM_ENABLE_BIT_MASK (1 << 1)
44
45#define BAM_DESC_CNT_TRSHLD_REG(x) (0x0008 + (x))
46#define COUNT_TRESHOLD_MASK 0xFF
47#define BAM_IRQ_SRCS(x) (0x0000000C + (x))
48#define BAM_IRQ_SRCS_MSK(x) (0x00000010 + (x))
49#define BAM_IRQ_MASK (1 << 31)
50#define P_IRQ_MASK (1)
51
52/* Pipe Interrupt masks */
53enum p_int_type
54{
55 P_PRCSD_DESC_EN_MASK = 1,
56 P_OUT_OF_DESC_EN_MASK = (1 << 3),
57 P_ERR_EN_MASK = (1 << 4),
58 P_TRNSFR_END_EN_MASK = (1 << 5)
59};
60
61#define BAM_IRQ_STTS(x) (0x00000014 + (x))
62#define BAM_IRQ_SRCS_UNMASKED(x) (0x00000030 + (x))
63
64#define BAM_IRQ_EN_REG(x) (0x001C + (x))
65#define BAM_TIMER_EN_MASK (1 << 4)
66/* Available only in BAM-Lite */
67#define BAM_EMPTY_EN_MASK (1 << 3)
68#define BAM_ERROR_EN_MASK (1 << 2)
69/* Available only in BAM */
70#define BAM_HRESP_ERR_EN_MASK (1 << 1)
71
72#define BAM_TRUST_REG(x) (0x00000070 + (x))
73#define BAM_EE_MASK (7 << 0)
74#define BAM_RESET_BLK_MASK (1 << 7)
75#define BAM_LOCK_EE_CTRL_MASK (1 << 13)
76
77#define BAM_CNFG_BITS(x) (0x0000007C + (x))
78
79#define BAM_P_CTRLn(n, x) (0x00001000 + 0x1000 * (n) + (x))
80#define P_SYS_MODE_MASK (1 << 5)
81/* 1: Producer mode 0: Consumer mode */
82#define P_DIRECTION_SHIFT 3
83#define P_ENABLE (1 << 1)
84
85#define BAM_P_RSTn(n, x) (0x00001000 + 0x4 + 0x1000 * (n) + (x))
86#define BAM_P_IRQ_STTSn(n, x) (0x00001000 + 0x10 + 0x1000 * (n) + (x))
87#define BAM_P_IRQ_CLRn(n, x) (0x00001000 + 0x14 + 0x1000 * (n) + (x))
88#define BAM_P_IRQ_ENn(n, x) (0x00001000 + 0x18 + 0x1000 * (n) + (x))
89#define BAM_P_TRUST_REGn(n, x) (0x00001000 + 0x30 + 0x1000 * (n) + (x))
90#define BAM_P_SW_OFSTSn(n, x) (0x00001800 + 0x1000 * (n) + (x))
91#define BAM_P_EVNT_REGn(n, x) (0x00001818 + 0x1000 * (n) + (x))
92#define P_DESC_FIFO_PEER_OFST_MASK 0xFF
93
94#define BAM_P_DESC_FIFO_ADDRn(n, x) (0x0000181C + 0x1000 * (n) + (x))
95#define BAM_P_FIFO_SIZESn(n, x) (0x00001820 + 0x1000 * (n) + (x))
96
97/* Flags for descriptors */
98#define BAM_DESC_INT_FLAG (1 << 7)
99#define BAM_DESC_EOT_FLAG (1 << 6)
100#define BAM_DESC_EOB_FLAG (1 << 5)
101#define BAM_DESC_NWD_FLAG (1 << 4)
102#define BAM_DESC_CMD_FLAG (1 << 3)
103#define BAM_DESC_LOCK_FLAG (1 << 2)
104#define BAM_DESC_UNLOCK_FLAG (1 << 1)
105
106enum bam_ce_cmd_t{
107 CE_WRITE_TYPE = 0,
108 CE_READ_TYPE = 1
109};
110
111/* result type */
112typedef enum {
113 BAM_RESULT_SUCCESS = 0,
114 BAM_RESULT_FAILURE = 1,
115 BAM_RESULT_TIMEOUT = 2
116} bam_result_t;
117
118
119/* Enum to define the BAM type:
120 * BAM2BAM:Producer BAM to Consumer BAM.
121 * SYS2BAM:Producer System to Consumer BAM.
122 * BAM2SYS:Producer BAM to Consumer System.
123 */
124enum bam_transaction_type {
125 SYS2BAM,
126 BAM2SYS,
127 BAM2BAM,
128};
129
130/* Enum to define BAM mode:
131 * SPS:Use BAM pipes.
132 * DIRECT:Pipes are disabled.
133 * LEGACY:BAM is not used.
134 */
135enum bam_mode {
136 SPS,
137 DIRECT,
138 LEGACY,
139};
140
141/* Enum to define BAM pipe states:
142 * ENABLED:Producer and Consumer pipes are enabled.
143 * HALT:Consumer pipe is halted. (Preferred type)
144 * FULL_HALT:Both Producer and Consumer pipes are halted.
145 */
146enum bam_pipe_state {
147 ENABLED,
148 HALT,
149 FULL_HALT,
150};
151
152enum bam_type {
153 BAM_LITE,
154 BAM,
155};
156
157/* Structure to define BAM descriptors that describe the data
158 * descriptors written to the data FIFO.
159 * addr:Descriptor address.
160 * size:Each descriptor is 8 bytes. Size of the descriptor fifo must
161 * contain an integer number of Descriptors.
162 */
163struct bam_desc {
164 uint32_t addr;
165 uint16_t size;
166 uint8_t reserved;
167 uint8_t flags;
168} __PACKED;
169
170struct bam_desc_fifo {
171 struct bam_desc *head;
172 struct bam_desc *current;
173 uint16_t size;
174 uint16_t offset;
175};
176
177/* Structure to define BAM pipes
178 * pipe_state: BAM pipe states.
179 * trans_type: BAM tranaction type.
180 * evt_gen_threshold: This register configures the threshold value for
181 * Read/Write event generation by the BAM
182 * towards another BAM.
183 * fifo: Circular fifo associated with this pipe.
184 * num_pipe: Number of pipes used in this bam.
185 * pipe: Pipe number for this pipe.
186 * spi_num: SPI number for the BAM interrupt.
187 * int_mode: Specifies the pipe mode.
188 * 1: Interrupt mode
189 * 0: Polling mode
190 */
191struct bam_pipe {
192 enum bam_pipe_state state;
193 enum bam_transaction_type trans_type;
194 struct bam_desc_fifo fifo;
195 uint16_t evt_gen_threshold;
196 uint8_t pipe_num;
197 uint8_t spi_num;
198 uint8_t int_mode;
199 uint8_t initialized;
200};
201
202/* Structure to define a BAM instance being used
203 * base:Base address for the BAM.
204 * type:BAM type.
205 * mode:BAM mode.
206 * pipe_pair:The pipe pairs to be used to access the BAM.
207 * threshold:This Register holds a threshold value for the
208 * counter summing the Size of the Descriptors Provided.
209 * init:Pipe initialization status for the BAM.
210 */
211struct bam_instance {
212 uint32_t base;
213 enum bam_type type;
214 enum bam_mode mode;
215 uint8_t num_of_pipes;
216 struct bam_pipe pipe[3];
217 uint16_t threshold;
218 void (*callback)(int);
219};
220
221/* Command element(CE) structure*/
222struct cmd_element {
223 uint32_t addr_n_cmd;
224 uint32_t reg_data;
225 uint32_t reg_mask;
226 uint32_t reserve;
227} __PACKED;
228
229void bam_init(struct bam_instance *bam);
230void bam_sys_pipe_init(struct bam_instance *bam,
231 uint8_t pipe_num);
Deepa Dinamanie5ccd6c2012-08-16 11:41:06 -0700232int bam_pipe_fifo_init(struct bam_instance *bam,
233 uint8_t pipe_num);
Deepa Dinamani9d470af2012-06-29 18:27:17 -0700234struct cmd_element* bam_add_cmd_element(struct cmd_element *ptr,
235 uint32_t addr,
236 uint32_t data,
237 enum bam_ce_cmd_t cmd_type);
238int bam_add_desc(struct bam_instance *bam,
239 unsigned int pipe_num,
240 unsigned char *data_ptr,
Deepa Dinamanie5ccd6c2012-08-16 11:41:06 -0700241 unsigned int data_len,
242 unsigned flags);
243int bam_add_one_desc(struct bam_instance *bam,
Deepa Dinamani9d470af2012-06-29 18:27:17 -0700244 unsigned int pipe_num,
245 unsigned char*,
246 uint32_t len,
247 uint8_t flags);
248void bam_sys_gen_event(struct bam_instance *bam,
249 uint8_t pipe_num,
250 unsigned int num_desc);
251int bam_wait_for_interrupt(struct bam_instance *bam,
252 uint8_t pipe_num,
253 enum p_int_type interrupt);
Deepa Dinamanie5ccd6c2012-08-16 11:41:06 -0700254void bam_read_offset_update(struct bam_instance *bam, unsigned int pipe_num);
Deepa Dinamani87feab82012-10-04 14:28:05 -0700255void bam_pipe_reset(struct bam_instance *bam,
256 uint8_t pipe_num);
Deepa Dinamani9d470af2012-06-29 18:27:17 -0700257
258#endif