blob: cb3ea29d82db8507fa9d3b389a890dff26adcd17 [file] [log] [blame]
Travis Geiselbrecht1d0df692008-09-01 02:26:09 -07001/*
2 * Copyright (c) 2008 Travis Geiselbrecht
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining
5 * a copy of this software and associated documentation files
6 * (the "Software"), to deal in the Software without restriction,
7 * including without limitation the rights to use, copy, modify, merge,
8 * publish, distribute, sublicense, and/or sell copies of the Software,
9 * and to permit persons to whom the Software is furnished to do so,
10 * subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
18 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
19 * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
20 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
21 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23#include <stdarg.h>
24#include <reg.h>
25#include <debug.h>
26#include <printf.h>
27#include <kernel/thread.h>
28#include <platform/debug.h>
29#include <arch/ops.h>
30#include <platform/omap5912.h>
31
32static void write_uart_reg(int uart, int reg, unsigned char data)
33{
34 unsigned long base;
35 int mul = 4;
36
37 switch(uart) {
38 case 0: base = UART0_BASE; break;
39 case 1: base = UART1_BASE; break;
40 case 2: base = UART2_BASE; break;
41 default: return;
42 }
43
44 *(volatile unsigned char *)(base + reg * mul) = data;
45}
46
47static unsigned char read_uart_reg(int uart, int reg)
48{
49 unsigned long base;
50 int mul = 4;
51
52 switch(uart) {
53 case 0: base = UART0_BASE; break;
54 case 1: base = UART1_BASE; break;
55 case 2: base = UART2_BASE; break;
56 default: return 0;
57 }
58
59 return *(volatile unsigned char *)(base + reg * mul);
60}
61
62static int uart_init(void)
63{
64 /* clear the tx & rx fifo and disable */
65 write_uart_reg(0, UART_FCR, 0x6);
66
67 return 0;
68}
69
70static int uart_putc(int port, char c )
71{
72 while (!(read_uart_reg(port, UART_LSR) & (1<<6))) // wait for the shift register to empty
73 ;
74 write_uart_reg(port, UART_THR, c);
75 return 0;
76}
77
78static int uart_getc(int port, bool wait) /* returns -1 if no data available */
79{
80 if (wait) {
81 while (!(read_uart_reg(port, UART_LSR) & (1<<0))) // wait for data to show up in the rx fifo
82 ;
83 } else {
84 if (!(read_uart_reg(port, UART_LSR) & (1<<0)))
85 return -1;
86 }
87 return read_uart_reg(port, UART_RHR);
88}
89
90void dputc(char c)
91{
92 if (c == '\n')
93 uart_putc(0, '\r');
94 uart_putc(0, c);
95}
96
97int dgetc(char *c)
98{
99 int _c;
100
101 if ((_c = uart_getc(0, false)) < 0)
102 return -1;
103
104 *c = _c;
105 return 0;
106}
107
108void debug_dump_regs(void)
109{
110 PANIC_UNIMPLEMENTED;
111}
112
113void debug_halt(void)
114{
115 dprintf("HALT: spinning forever...\n");
116 for(;;);
117}
118
119void debug_dump_memory_bytes(void *mem, int len)
120{
121 PANIC_UNIMPLEMENTED;
122}
123
124void debug_dump_memory_halfwords(void *mem, int len)
125{
126 PANIC_UNIMPLEMENTED;
127}
128
129void debug_dump_memory_words(void *mem, int len)
130{
131 PANIC_UNIMPLEMENTED;
132}
133
134void debug_set_trace_level(int trace_type, int level)
135{
136 PANIC_UNIMPLEMENTED;
137}
138
139uint32_t debug_cycle_count(void)
140{
141// PANIC_UNIMPLEMENTED;
142 return 0;
143}