Dima Zavin | 03cf431 | 2009-01-23 16:38:30 -0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2008, Google Inc. |
| 3 | * All rights reserved. |
| 4 | * |
| 5 | * Redistribution and use in source and binary forms, with or without |
| 6 | * modification, are permitted provided that the following conditions |
| 7 | * are met: |
| 8 | * * Redistributions of source code must retain the above copyright |
| 9 | * notice, this list of conditions and the following disclaimer. |
| 10 | * * Redistributions in binary form must reproduce the above copyright |
| 11 | * notice, this list of conditions and the following disclaimer in |
| 12 | * the documentation and/or other materials provided with the |
| 13 | * distribution. |
| 14 | * |
| 15 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
| 16 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
| 17 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
| 18 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
| 19 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 20 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
| 21 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS |
| 22 | * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED |
| 23 | * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| 24 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT |
| 25 | * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
| 26 | * SUCH DAMAGE. |
| 27 | */ |
| 28 | |
| 29 | #ifndef __PLATFORM_MSM_SHARED_DMOV_H |
| 30 | #define __PLATFORM_MSM_SHARED_DMOV_H |
| 31 | |
Ajay Dudani | 232ce81 | 2009-12-02 00:14:11 -0800 | [diff] [blame] | 32 | #ifdef PLATFORM_MSM7X30 |
| 33 | #define MSM_DMOV_BASE 0xAC400000 |
| 34 | #else |
| 35 | #define MSM_DMOV_BASE 0xA9700000 |
| 36 | #endif |
Dima Zavin | 03cf431 | 2009-01-23 16:38:30 -0800 | [diff] [blame] | 37 | |
| 38 | /* see 80-VA736-2 C pp 415-439 */ |
| 39 | |
Ajay Dudani | 232ce81 | 2009-12-02 00:14:11 -0800 | [diff] [blame] | 40 | #define DMOV_SD0(off, ch) (MSM_DMOV_BASE + 0x0000 + (off) + ((ch) << 2)) |
| 41 | #define DMOV_SD1(off, ch) (MSM_DMOV_BASE + 0x0400 + (off) + ((ch) << 2)) |
| 42 | #define DMOV_SD2(off, ch) (MSM_DMOV_BASE + 0x0800 + (off) + ((ch) << 2)) |
| 43 | #define DMOV_SD3(off, ch) (MSM_DMOV_BASE + 0x0C00 + (off) + ((ch) << 2)) |
| 44 | |
| 45 | #ifdef PLATFORM_MSM7X30 |
| 46 | #define DMOV_SDn DMOV_SD2 |
| 47 | #else |
| 48 | #define DMOV_SDn DMOV_SD3 |
| 49 | #endif |
| 50 | |
| 51 | |
Dima Zavin | 03cf431 | 2009-01-23 16:38:30 -0800 | [diff] [blame] | 52 | |
| 53 | /* only security domain 3 is available to the ARM11 |
| 54 | ** |
| 55 | ** SD0 -> mARM trusted, SD1 -> mARM nontrusted, SD2 -> aDSP, SD3 -> aARM |
| 56 | ** |
| 57 | */ |
| 58 | |
Ajay Dudani | 232ce81 | 2009-12-02 00:14:11 -0800 | [diff] [blame] | 59 | #define DMOV_CMD_PTR(ch) DMOV_SDn(0x000, ch) |
Dima Zavin | 03cf431 | 2009-01-23 16:38:30 -0800 | [diff] [blame] | 60 | #define DMOV_CMD_LIST (0 << 29) /* does not work */ |
| 61 | #define DMOV_CMD_PTR_LIST (1 << 29) /* works */ |
| 62 | #define DMOV_CMD_INPUT_CFG (2 << 29) /* untested */ |
| 63 | #define DMOV_CMD_OUTPUT_CFG (3 << 29) /* untested */ |
| 64 | #define DMOV_CMD_ADDR(addr) ((addr) >> 3) |
| 65 | |
Ajay Dudani | 232ce81 | 2009-12-02 00:14:11 -0800 | [diff] [blame] | 66 | #define DMOV_RSLT(ch) DMOV_SDn(0x040, ch) |
Dima Zavin | 03cf431 | 2009-01-23 16:38:30 -0800 | [diff] [blame] | 67 | #define DMOV_RSLT_VALID (1 << 31) /* 0 == host has empties result fifo */ |
| 68 | #define DMOV_RSLT_ERROR (1 << 3) |
| 69 | #define DMOV_RSLT_FLUSH (1 << 2) |
| 70 | #define DMOV_RSLT_DONE (1 << 1) /* top pointer done */ |
| 71 | #define DMOV_RSLT_USER (1 << 0) /* command with FR force result */ |
| 72 | |
Ajay Dudani | 232ce81 | 2009-12-02 00:14:11 -0800 | [diff] [blame] | 73 | #define DMOV_FLUSH0(ch) DMOV_SDn(0x080, ch) |
| 74 | #define DMOV_FLUSH1(ch) DMOV_SDn(0x0C0, ch) |
| 75 | #define DMOV_FLUSH2(ch) DMOV_SDn(0x100, ch) |
| 76 | #define DMOV_FLUSH3(ch) DMOV_SDn(0x140, ch) |
| 77 | #define DMOV_FLUSH4(ch) DMOV_SDn(0x180, ch) |
| 78 | #define DMOV_FLUSH5(ch) DMOV_SDn(0x1C0, ch) |
Dima Zavin | 03cf431 | 2009-01-23 16:38:30 -0800 | [diff] [blame] | 79 | |
Ajay Dudani | 232ce81 | 2009-12-02 00:14:11 -0800 | [diff] [blame] | 80 | #define DMOV_STATUS(ch) DMOV_SDn(0x200, ch) |
Dima Zavin | 03cf431 | 2009-01-23 16:38:30 -0800 | [diff] [blame] | 81 | #define DMOV_STATUS_RSLT_COUNT(n) (((n) >> 29)) |
| 82 | #define DMOV_STATUS_CMD_COUNT(n) (((n) >> 27) & 3) |
| 83 | #define DMOV_STATUS_RSLT_VALID (1 << 1) |
| 84 | #define DMOV_STATUS_CMD_PTR_RDY (1 << 0) |
| 85 | |
Ajay Dudani | 232ce81 | 2009-12-02 00:14:11 -0800 | [diff] [blame] | 86 | #define DMOV_ISR DMOV_SDn(0x380, 0) |
Dima Zavin | 03cf431 | 2009-01-23 16:38:30 -0800 | [diff] [blame] | 87 | |
Ajay Dudani | 232ce81 | 2009-12-02 00:14:11 -0800 | [diff] [blame] | 88 | #define DMOV_CONFIG(ch) DMOV_SDn(0x300, ch) |
Dima Zavin | 03cf431 | 2009-01-23 16:38:30 -0800 | [diff] [blame] | 89 | #define DMOV_CONFIG_FORCE_TOP_PTR_RSLT (1 << 2) |
| 90 | #define DMOV_CONFIG_FOREC_FLUSH_RSLT (1 << 1) |
| 91 | #define DMOV_CONFIG_IRQ_EN (1 << 0) |
| 92 | |
| 93 | /* channel assignments - from qc/dmov_7500.h */ |
| 94 | |
| 95 | #define DMOV_NAND_CHAN 7 |
| 96 | #define DMOV_NAND_CRCI_CMD 5 |
| 97 | #define DMOV_NAND_CRCI_DATA 4 |
| 98 | |
| 99 | #define DMOV_SDC1_CHAN 8 |
| 100 | #define DMOV_SDC1_CRCI 6 |
| 101 | |
| 102 | #define DMOV_SDC2_CHAN 8 |
| 103 | #define DMOV_SDC2_CRCI 7 |
| 104 | |
| 105 | #define DMOV_TSIF_CHAN 10 |
| 106 | #define DMOV_TSIF_CRCI 10 |
| 107 | |
| 108 | #define DMOV_USB_CHAN 11 |
| 109 | |
| 110 | /* no client rate control ifc (eg, ram) */ |
| 111 | #define DMOV_NONE_CRCI 0 |
| 112 | |
| 113 | |
| 114 | /* If the CMD_PTR register has CMD_PTR_LIST selected, the data mover |
| 115 | ** is going to walk a list of 32bit pointers as described below. Each |
| 116 | ** pointer points to a *array* of dmov_s, etc structs. The last pointer |
| 117 | ** in the list is marked with CMD_PTR_LP. The last struct in each array |
| 118 | ** is marked with CMD_LC (see below). |
| 119 | */ |
| 120 | #define CMD_PTR_ADDR(addr) ((addr) >> 3) |
| 121 | #define CMD_PTR_LP (1 << 31) /* last pointer */ |
| 122 | #define CMD_PTR_PT (3 << 29) /* ? */ |
| 123 | |
| 124 | |
| 125 | /* Single Item Mode -- seems to work as expected */ |
| 126 | typedef struct { |
| 127 | unsigned cmd; |
| 128 | unsigned src; |
| 129 | unsigned dst; |
| 130 | unsigned len; |
| 131 | } dmov_s; |
| 132 | |
| 133 | /* Scatter/Gather Mode -- does this work?*/ |
| 134 | typedef struct { |
| 135 | unsigned cmd; |
| 136 | unsigned src_dscr; |
| 137 | unsigned dst_dscr; |
| 138 | unsigned _reserved; |
| 139 | } dmov_sg; |
| 140 | |
| 141 | /* bits for the cmd field of the above structures */ |
| 142 | |
| 143 | #define CMD_LC (1 << 31) /* last command */ |
| 144 | #define CMD_FR (1 << 22) /* force result -- does not work? */ |
| 145 | #define CMD_OCU (1 << 21) /* other channel unblock */ |
| 146 | #define CMD_OCB (1 << 20) /* other channel block */ |
| 147 | #define CMD_TCB (1 << 19) /* ? */ |
| 148 | #define CMD_DAH (1 << 18) /* destination address hold -- does not work?*/ |
| 149 | #define CMD_SAH (1 << 17) /* source address hold -- does not work? */ |
| 150 | |
| 151 | #define CMD_MODE_SINGLE (0 << 0) /* dmov_s structure used */ |
| 152 | #define CMD_MODE_SG (1 << 0) /* untested */ |
| 153 | #define CMD_MODE_IND_SG (2 << 0) /* untested */ |
| 154 | #define CMD_MODE_BOX (3 << 0) /* untested */ |
| 155 | |
| 156 | #define CMD_DST_SWAP_BYTES (1 << 14) /* exchange each byte n with byte n+1 */ |
| 157 | #define CMD_DST_SWAP_SHORTS (1 << 15) /* exchange each short n with short n+1 */ |
| 158 | #define CMD_DST_SWAP_WORDS (1 << 16) /* exchange each word n with word n+1 */ |
| 159 | |
| 160 | #define CMD_SRC_SWAP_BYTES (1 << 11) /* exchange each byte n with byte n+1 */ |
| 161 | #define CMD_SRC_SWAP_SHORTS (1 << 12) /* exchange each short n with short n+1 */ |
| 162 | #define CMD_SRC_SWAP_WORDS (1 << 13) /* exchange each word n with word n+1 */ |
| 163 | |
| 164 | #define CMD_DST_CRCI(n) (((n) & 15) << 7) |
| 165 | #define CMD_SRC_CRCI(n) (((n) & 15) << 3) |
| 166 | |
| 167 | |
| 168 | /* NOTES: |
| 169 | ** |
| 170 | ** Looks like Channels 4, 5, 6, 7, 8, 10, 11 are available to the ARM11 |
| 171 | ** |
| 172 | */ |
| 173 | #endif /* __PLATFORM_MSM_SHARED_DMOV_H */ |