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Ashish Garg22001a92017-08-07 14:46:54 +05301/* Copyright (c) 2014-2017, The Linux Foundation. All rights reserved.
Sundarajan Srinivasanae6ece02014-07-01 14:01:29 -07002 *
3 * Redistribution and use in source and binary forms, with or without
4 * modification, are permitted provided that the following conditions are
5 * met:
6 * * Redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer.
8 * * Redistributions in binary form must reproduce the above
9 * copyright notice, this list of conditions and the following
10 * disclaimer in the documentation and/or other materials provided
11 * with the distribution.
12 * * Neither the name of The Linux Fundation, Inc. nor the names of its
13 * contributors may be used to endorse or promote products derived
14 * from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
23 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
25 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
26 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 */
29
30#ifndef __REGULATOR_H
31#define __REGULATOR_H
32
Casey Piperd2af07b2015-04-01 18:01:58 -070033#include <stdint.h>
34
Devendra Patelabd51972014-10-21 17:57:33 -070035#define GENERIC_DISABLE 0
36#define GENERIC_ENABLE 1
37#define SW_MODE_LDO_IPEAK 1
38#define LDOA_RES_TYPE 0x616F646C //aodl
39#define SMPS_RES_TYPE 0x61706D73 //apms
40
Sundarajan Srinivasanae6ece02014-07-01 14:01:29 -070041#define KEY_SOFTWARE_ENABLE 0x6E657773 // swen - software enable
42#define KEY_LDO_SOFTWARE_MODE 0X646D736C // lsmd - LDO software mode
43#define KEY_SMPS_SOFTWARE_MODE 0X646D7373 // ssmd - SMPS software mode
44#define KEY_PIN_CTRL_ENABLE 0x6E656370 //pcen - pin control enable
45#define KEY_PIN_CTRL_POWER_MODE 0x646d6370 // pcmd - pin control mode
46#define KEY_CURRENT 0x616D //ma
47#define KEY_MICRO_VOLT 0x7675 //uv
48#define KEY_FREQUENCY 0x71657266 //freq
49#define KEY_FREQUENCY_REASON 0x6E736572 //resn
50#define KEY_FOLLOW_QUIET_MODE 0x6D71 //qm
51#define KEY_HEAD_ROOM 0x7268 // hr
52#define KEY_PIN_CTRL_CLK_BUFFER_ENABLE_KEY 0x62636370 // pccb - clk buffer pin control
53#define KEY_BYPASS_ALLOWED_KEY 0x61707962 //bypa - bypass allowed
54#define KEY_CORNER_LEVEL_KEY 0x6E726F63 // corn - coner voltage
55#define KEY_ACTIVE_FLOOR 0x636676
Aparna Mallavarapu1f468e22014-09-24 11:46:45 +053056#define GENERIC_DISABLE 0
57#define GENERIC_ENABLE 1
58#define SW_MODE_LDO_IPEAK 1
59#define LDOA_RES_TYPE 0x616F646C //aodl
60#define SMPS_RES_TYPE 0x61706D73 //apms
Sundarajan Srinivasanae6ece02014-07-01 14:01:29 -070061
Channagoud Kadabi9453deb2014-11-10 13:19:14 -080062/* RPM clock helper macros */
63#define RPM_CLK_BUFFER_A_REQ 0x616B6C63 //aklc
64#define RPM_KEY_PIN_CTRL_CLK_BUFFER_ENABLE_KEY 0x62636370 //pccb - clk buffer pin control
65#define LNBB_CLK_ID 0x8
66#define RPM_CLK_BUFFER_PIN_CONTROL_ENABLE_NONE 0x0
67
Unnati Gandhi378ee5e2015-05-29 14:08:55 +053068#define REG_LDO1 BIT(0)
Casey Piperd2af07b2015-04-01 18:01:58 -070069#define REG_LDO2 BIT(1)
Ashish Garg22001a92017-08-07 14:46:54 +053070#define REG_LDO5 BIT(4)
Casey Piperd2af07b2015-04-01 18:01:58 -070071#define REG_LDO6 BIT(5)
Ashish Garg22001a92017-08-07 14:46:54 +053072#define REG_LDO11 BIT(10)
Casey Piperd2af07b2015-04-01 18:01:58 -070073#define REG_LDO12 BIT(11)
74#define REG_LDO14 BIT(13)
75#define REG_LDO17 BIT(16)
Ashish Garg22001a92017-08-07 14:46:54 +053076#define REG_LDO18 BIT(17)
Casey Piperd2af07b2015-04-01 18:01:58 -070077#define REG_LDO28 BIT(27)
Jayant Shekhar81d3b652016-01-19 12:49:30 +053078#define REG_SMPS3 BIT(7)
79#define REG_LDO3 BIT(2)
Mayank Grover6372b6b2017-03-03 17:55:24 +053080#define REG_LDO4 BIT(4)
Casey Piperd2af07b2015-04-01 18:01:58 -070081
82void regulator_enable(uint32_t enable);
83void regulator_disable(uint32_t enable);
Sundarajan Srinivasanae6ece02014-07-01 14:01:29 -070084
85#endif