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Shashank Mittal246f8d02011-01-21 17:12:27 -08001/*
2 * Copyright (c) 2008, Google Inc.
3 * All rights reserved.
4 *
5 * Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in
14 * the documentation and/or other materials provided with the
15 * distribution.
16 * * Neither the name of Google, Inc. nor the names of its contributors
17 * may be used to endorse or promote products derived from this
18 * software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
23 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
24 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
26 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
27 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
28 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
30 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 */
33
Amol Jadiaeda4e62011-07-19 18:07:29 -070034#include <reg.h>
Shashank Mittal246f8d02011-01-21 17:12:27 -080035#include <debug.h>
36#include <kernel/thread.h>
37#include <platform/debug.h>
Amol Jadiaeda4e62011-07-19 18:07:29 -070038#include <platform/iomap.h>
Shashank Mittal246f8d02011-01-21 17:12:27 -080039#include <mddi.h>
40#include <dev/fbcon.h>
Channagoud Kadabi21992692011-08-12 14:59:38 +053041#include <dev/gpio.h>
Aparna Mallavarapu45869c32011-08-05 13:22:35 +053042#include <smem.h>
Shashank Mittal246f8d02011-01-21 17:12:27 -080043
44static struct fbcon_config *fb_config;
45
Amol Jadiaeda4e62011-07-19 18:07:29 -070046static uint32_t ticks_per_sec = 0;
47
Shashank Mittal246f8d02011-01-21 17:12:27 -080048void platform_init_interrupts(void);
49void platform_init_timer();
50
51void uart3_clock_init(void);
52void uart_init(void);
53
54void acpu_clock_init(void);
55
56void mddi_clock_init(unsigned num, unsigned rate);
57
Aparna Mallavarapuf712f5e2011-08-04 21:11:00 +053058extern void mipi_dsi_shutdown(void);
59
Aparna Mallavarapu45869c32011-08-05 13:22:35 +053060unsigned board_msm_id(void);
61
Shashank Mittal246f8d02011-01-21 17:12:27 -080062void platform_early_init(void)
63{
Shashank Mittal2fad67f2011-04-08 19:45:10 -070064#if WITH_DEBUG_UART
65 uart1_clock_init();
66 uart_init();
67#endif
Shashank Mittal246f8d02011-01-21 17:12:27 -080068 platform_init_interrupts();
69 platform_init_timer();
70}
71
72void platform_init(void)
73{
74 dprintf(INFO, "platform_init()\n");
Shashank Mittal246f8d02011-01-21 17:12:27 -080075 acpu_clock_init();
Shashank Mittal246f8d02011-01-21 17:12:27 -080076}
77
78void display_init(void)
79{
80#if DISPLAY_TYPE_MDDI
81 fb_config = mddi_init();
82 ASSERT(fb_config);
83 fbcon_setup(fb_config);
84#endif
85#if DISPLAY_TYPE_LCDC
86 fb_config = lcdc_init();
87 ASSERT(fb_config);
88 fbcon_setup(fb_config);
89#endif
Aparna Mallavarapuf712f5e2011-08-04 21:11:00 +053090#if DISPLAY_TYPE_MIPI
Channagoud Kadabi21992692011-08-12 14:59:38 +053091 dprintf(SPEW, "display_init()\n");
92 panel_dsi_init();
93 fb_config = mipi_init();
94 ASSERT(fb_config);
95 fbcon_setup(fb_config);
Aparna Mallavarapuf712f5e2011-08-04 21:11:00 +053096#endif
97}
98
99void display_shutdown(void)
100{
101#if DISPLAY_TYPE_MIPI
Channagoud Kadabi21992692011-08-12 14:59:38 +0530102 dprintf(SPEW, "display_shutdown()\n");
103 mipi_dsi_shutdown();
104 /* Power down DSI bridge chip */
105 gpio_set(128,0x1);
Aparna Mallavarapuf712f5e2011-08-04 21:11:00 +0530106#endif
107
Shashank Mittal246f8d02011-01-21 17:12:27 -0800108}
Amol Jadi4421e652011-06-16 15:00:48 -0700109
110void platform_uninit(void)
111{
112 platform_uninit_timer();
113#if DISPLAY_SPLASH_SCREEN
114 display_shutdown();
115#endif
116}
Amol Jadiaeda4e62011-07-19 18:07:29 -0700117
118/* Initialize DGT timer */
119void platform_init_timer(void)
120{
121 /* disable timer */
122 writel(0, DGT_ENABLE);
123
124 ticks_per_sec = 19200000; /* Uses TCXO (19.2 MHz) */
125}
126
127/* Returns timer ticks per sec */
128uint32_t platform_tick_rate(void)
129{
130 return ticks_per_sec;
131}
Aparna Mallavarapu45869c32011-08-05 13:22:35 +0530132bool machine_is_7x25a(void)
133{
134 if ((board_msm_id() == MSM7225A) || (board_msm_id() == MSM7625A))
135 return 1;
136 else
137 return 0;
138}
Channagoud Kadabi21992692011-08-12 14:59:38 +0530139
140/* Toggle RESET pin of the DSI Client before sending
141 * panel init commands
142 */
143void panel_dsi_init(void)
144{
Aparna Mallavarapu34144df2011-08-20 21:16:03 +0530145 gpio_set(128,0x1);
146 mdelay(5);
147 gpio_set(128,0x0);
Channagoud Kadabi21992692011-08-12 14:59:38 +0530148 gpio_set(129,0x1);
149 gpio_config(129, GPIO_OUTPUT);
150 gpio_set(129,0x0);
151 gpio_set(129,0x1);
152 mdelay(10);
153}