V S Ramanjaneya Kumar T | 713be57 | 2013-08-02 11:00:10 +0530 | [diff] [blame] | 1 | /* Copyright (c) 2013, The Linux Foundation. All rights reserved. |
| 2 | * |
| 3 | * Redistribution and use in source and binary forms, with or without |
| 4 | * modification, are permitted provided that the following conditions are |
| 5 | * met: |
| 6 | * * Redistributions of source code must retain the above copyright |
| 7 | * notice, this list of conditions and the following disclaimer. |
| 8 | * * Redistributions in binary form must reproduce the above |
| 9 | * copyright notice, this list of conditions and the following |
| 10 | * disclaimer in the documentation and/or other materials provided |
| 11 | * with the distribution. |
| 12 | * * Neither the name of The Linux Foundation nor the names of its |
| 13 | * contributors may be used to endorse or promote products derived |
| 14 | * from this software without specific prior written permission. |
| 15 | * |
| 16 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 17 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 18 | * IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
| 19 | * NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR |
| 20 | * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, |
| 21 | * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, |
| 22 | * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; |
| 23 | * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, |
| 24 | * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR |
| 25 | * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF |
| 26 | * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 27 | */ |
| 28 | |
| 29 | #include <debug.h> |
| 30 | #include <reg.h> |
| 31 | #include <platform/iomap.h> |
| 32 | #include <qgic.h> |
| 33 | #include <qtimer.h> |
| 34 | #include <platform/clock.h> |
| 35 | #include <mmu.h> |
| 36 | #include <arch/arm/mmu.h> |
| 37 | #include <smem.h> |
| 38 | #include <board.h> |
| 39 | #include <boot_stats.h> |
| 40 | |
| 41 | #define MB (1024*1024) |
| 42 | |
| 43 | #define MSM_IOMAP_SIZE ((MSM_IOMAP_END - MSM_IOMAP_BASE)/MB) |
| 44 | |
| 45 | /* LK memory - cacheable, write through */ |
| 46 | #define LK_MEMORY (MMU_MEMORY_TYPE_NORMAL_WRITE_THROUGH | \ |
| 47 | MMU_MEMORY_AP_READ_WRITE) |
| 48 | |
| 49 | /* Peripherals - non-shared device */ |
| 50 | #define IOMAP_MEMORY (MMU_MEMORY_TYPE_DEVICE_SHARED | \ |
| 51 | MMU_MEMORY_AP_READ_WRITE | MMU_MEMORY_XN) |
| 52 | |
| 53 | /* IMEM memory - cacheable, write through */ |
| 54 | #define IMEM_MEMORY (MMU_MEMORY_TYPE_NORMAL_WRITE_THROUGH | \ |
| 55 | MMU_MEMORY_AP_READ_WRITE | MMU_MEMORY_XN) |
| 56 | |
| 57 | static mmu_section_t mmu_section_table[] = { |
| 58 | /* Physical addr, Virtual addr, Size (in MB), Flags */ |
| 59 | {MEMBASE, MEMBASE, (MEMSIZE / MB), LK_MEMORY}, |
| 60 | {MSM_IOMAP_BASE, MSM_IOMAP_BASE, MSM_IOMAP_SIZE, IOMAP_MEMORY}, |
| 61 | /* IMEM needs a seperate entry in the table as it's length is only 0x8000. */ |
| 62 | {SYSTEM_IMEM_BASE, SYSTEM_IMEM_BASE, 1, IMEM_MEMORY}, |
| 63 | }; |
| 64 | |
| 65 | static struct smem_ram_ptable ram_ptable; |
| 66 | |
| 67 | /* Boot timestamps */ |
| 68 | #define BS_INFO_OFFSET (0x6B0) |
| 69 | #define BS_INFO_ADDR_V1 (RPM_MSG_RAM_BASE + BS_INFO_OFFSET) |
| 70 | #define BS_INFO_ADDR_V2 (MSM_SHARED_IMEM_BASE + BS_INFO_OFFSET) |
| 71 | |
| 72 | void platform_early_init(void) |
| 73 | { |
| 74 | board_init(); |
| 75 | platform_clock_init(); |
| 76 | qgic_init(); |
| 77 | qtimer_init(); |
| 78 | } |
| 79 | |
| 80 | void platform_init(void) |
| 81 | { |
| 82 | dprintf(INFO, "platform_init()\n"); |
| 83 | } |
| 84 | |
| 85 | uint32_t platform_get_sclk_count(void) |
| 86 | { |
| 87 | return readl(MPM2_MPM_SLEEP_TIMETICK_COUNT_VAL); |
| 88 | } |
| 89 | |
| 90 | addr_t get_bs_info_addr() |
| 91 | { |
| 92 | uint32_t soc_ver = board_soc_version(); |
| 93 | |
| 94 | if (soc_ver < BOARD_SOC_VERSION2) |
| 95 | return ((addr_t)BS_INFO_ADDR_V1); |
| 96 | else |
| 97 | return ((addr_t)BS_INFO_ADDR_V2); |
| 98 | |
| 99 | } |
| 100 | |
| 101 | void platform_uninit(void) |
| 102 | { |
| 103 | qtimer_uninit(); |
| 104 | } |
| 105 | |
| 106 | int platform_use_identity_mmu_mappings(void) |
| 107 | { |
| 108 | /* Use only the mappings specified in this file. */ |
| 109 | return 0; |
| 110 | } |
| 111 | |
| 112 | addr_t platform_get_virt_to_phys_mapping(addr_t virt_addr) |
| 113 | { |
| 114 | /* Return same address as we are using 1-1 mapping. */ |
| 115 | return virt_addr; |
| 116 | } |
| 117 | |
| 118 | addr_t platform_get_phys_to_virt_mapping(addr_t phys_addr) |
| 119 | { |
| 120 | /* Return same address as we are using 1-1 mapping. */ |
| 121 | return phys_addr; |
| 122 | } |
| 123 | |
| 124 | |
| 125 | /* Setup memory for this platform */ |
| 126 | void platform_init_mmu_mappings(void) |
| 127 | { |
| 128 | uint32_t i; |
| 129 | uint32_t sections; |
| 130 | uint32_t table_size = ARRAY_SIZE(mmu_section_table); |
| 131 | |
| 132 | ASSERT(smem_ram_ptable_init(&ram_ptable)); |
| 133 | |
| 134 | /* Configure the MMU page entries for SDRAM and IMEM memory read |
| 135 | from the smem ram table*/ |
| 136 | for(i = 0; i < ram_ptable.len; i++) |
| 137 | { |
| 138 | if(ram_ptable.parts[i].type == SYS_MEMORY) |
| 139 | { |
| 140 | if((ram_ptable.parts[i].category == SDRAM) || |
| 141 | (ram_ptable.parts[i].category == IMEM)) |
| 142 | { |
| 143 | /* Check to ensure that start address is 1MB aligned */ |
| 144 | ASSERT((ram_ptable.parts[i].start & 0xFFFFF) == 0); |
| 145 | |
| 146 | sections = (ram_ptable.parts[i].size) / MB; |
| 147 | while(sections--) { |
| 148 | arm_mmu_map_section(ram_ptable.parts[i].start + |
| 149 | sections * MB, |
| 150 | ram_ptable.parts[i].start + |
| 151 | sections * MB, |
| 152 | (MMU_MEMORY_TYPE_NORMAL_WRITE_THROUGH | \ |
| 153 | MMU_MEMORY_AP_READ_WRITE | MMU_MEMORY_XN)); |
| 154 | } |
| 155 | } |
| 156 | } |
| 157 | } |
| 158 | /* Configure the MMU page entries for memory read from the |
| 159 | mmu_section_table */ |
| 160 | for (i = 0; i < table_size; i++) { |
| 161 | sections = mmu_section_table[i].num_of_sections; |
| 162 | |
| 163 | while (sections--) { |
| 164 | arm_mmu_map_section(mmu_section_table[i].paddress + |
| 165 | sections * MB, |
| 166 | mmu_section_table[i].vaddress + |
| 167 | sections * MB, |
| 168 | mmu_section_table[i].flags); |
| 169 | } |
| 170 | } |
| 171 | } |