Sachin Bhayare | 316c8c2 | 2018-04-02 15:27:34 +0530 | [diff] [blame] | 1 | /* Copyright (c) 2014-2015, 2017-2018, The Linux Foundation. All rights reserved. |
Shivaraj Shetty | f9e10c4 | 2014-09-17 04:21:15 +0530 | [diff] [blame] | 2 | * |
| 3 | * Redistribution and use in source and binary forms, with or without |
| 4 | * modification, are permitted provided that the following conditions |
| 5 | * are met: |
| 6 | * * Redistributions of source code must retain the above copyright |
| 7 | * notice, this list of conditions and the following disclaimer. |
| 8 | * * Redistributions in binary form must reproduce the above copyright |
| 9 | * notice, this list of conditions and the following disclaimer in |
| 10 | * the documentation and/or other materials provided with the |
| 11 | * distribution. |
| 12 | * * Neither the name of The Linux Foundation nor the names of its |
| 13 | * contributors may be used to endorse or promote products derived |
| 14 | * from this software without specific prior written permission. |
| 15 | * |
| 16 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
| 17 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
| 18 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
| 19 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
| 20 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
| 22 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS |
| 23 | * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED |
| 24 | * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| 25 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT |
| 26 | * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
| 27 | * SUCH DAMAGE. |
| 28 | */ |
| 29 | |
| 30 | #include <debug.h> |
| 31 | #include <err.h> |
| 32 | #include <smem.h> |
| 33 | #include <msm_panel.h> |
| 34 | #include <board.h> |
| 35 | #include <mipi_dsi.h> |
| 36 | #include <target/display.h> |
| 37 | #include "include/panel.h" |
| 38 | #include "panel_display.h" |
| 39 | |
| 40 | #include "include/panel_hx8394d_720p_video.h" |
Ray Zhang | a59d972 | 2014-10-23 16:19:07 +0800 | [diff] [blame] | 41 | #include "include/panel_hx8379a_fwvga_skua_video.h" |
Shivaraj Shetty | f9daa72 | 2014-11-17 17:29:49 +0530 | [diff] [blame] | 42 | #include "include/panel_sharp_qhd_video.h" |
Sandeep Panda | 9d9079f | 2014-11-24 18:46:25 +0530 | [diff] [blame] | 43 | #include "include/panel_truly_wvga_cmd.h" |
Ray Zhang | afc8666 | 2014-11-07 11:23:57 +0800 | [diff] [blame] | 44 | #include "include/panel_ili9806e_fwvga_video.h" |
Ray Zhang | 6da38ca | 2014-11-18 16:02:11 +0800 | [diff] [blame] | 45 | #include "include/panel_hx8379c_fwvga_video.h" |
Shivaraj Shetty | cecaa0f | 2014-11-21 14:51:38 +0530 | [diff] [blame] | 46 | #include "include/panel_hx8394d_qhd_video.h" |
Yang | e194df9 | 2015-06-09 15:41:01 +0800 | [diff] [blame] | 47 | #include "include/panel_fl10802_fwvga_video.h" |
Sachin Bhayare | 3068e6e | 2017-02-15 15:05:44 +0530 | [diff] [blame] | 48 | #include "include/panel_auo_qvga_cmd.h" |
| 49 | #include "include/panel_auo_cx_qvga_cmd.h" |
| 50 | #include "include/panel_auo_400p_cmd.h" |
Ashish Garg | 22001a9 | 2017-08-07 14:46:54 +0530 | [diff] [blame] | 51 | #include "include/panel_auo_390p_cmd.h" |
Wenjun Zhang | a083eea | 2018-02-01 03:32:03 -0500 | [diff] [blame] | 52 | #include "include/panel_st7789v2_qvga_spi_cmd.h" |
Shivaraj Shetty | f9e10c4 | 2014-09-17 04:21:15 +0530 | [diff] [blame] | 53 | |
| 54 | #define DISPLAY_MAX_PANEL_DETECTION 0 |
Sandeep Panda | 419bfbb | 2015-01-09 19:29:20 +0530 | [diff] [blame] | 55 | #define ILI9806E_FWVGA_VIDEO_PANEL_POST_INIT_DELAY 68 |
Shivaraj Shetty | f9e10c4 | 2014-09-17 04:21:15 +0530 | [diff] [blame] | 56 | |
Ray Zhang | a59d972 | 2014-10-23 16:19:07 +0800 | [diff] [blame] | 57 | enum { |
| 58 | QRD_SKUA = 0x00, |
| 59 | QRD_SKUC = 0x08, |
| 60 | QRD_SKUE = 0x09, |
Yang | e194df9 | 2015-06-09 15:41:01 +0800 | [diff] [blame] | 61 | QRD_SKUT = 0x0A, |
Ray Zhang | a59d972 | 2014-10-23 16:19:07 +0800 | [diff] [blame] | 62 | }; |
| 63 | |
Shivaraj Shetty | f9e10c4 | 2014-09-17 04:21:15 +0530 | [diff] [blame] | 64 | /*---------------------------------------------------------------------------*/ |
| 65 | /* static panel selection variable */ |
| 66 | /*---------------------------------------------------------------------------*/ |
| 67 | static uint32_t auto_pan_loop = 0; |
| 68 | |
| 69 | enum { |
| 70 | HX8394D_720P_VIDEO_PANEL, |
Ray Zhang | a59d972 | 2014-10-23 16:19:07 +0800 | [diff] [blame] | 71 | HX8379A_FWVGA_SKUA_VIDEO_PANEL, |
Shivaraj Shetty | f9daa72 | 2014-11-17 17:29:49 +0530 | [diff] [blame] | 72 | SHARP_QHD_VIDEO_PANEL, |
Sandeep Panda | 9d9079f | 2014-11-24 18:46:25 +0530 | [diff] [blame] | 73 | TRULY_WVGA_CMD_PANEL, |
Ray Zhang | afc8666 | 2014-11-07 11:23:57 +0800 | [diff] [blame] | 74 | ILI9806E_FWVGA_VIDEO_PANEL, |
Ray Zhang | 6da38ca | 2014-11-18 16:02:11 +0800 | [diff] [blame] | 75 | HX8379C_FWVGA_VIDEO_PANEL, |
Shivaraj Shetty | cecaa0f | 2014-11-21 14:51:38 +0530 | [diff] [blame] | 76 | HX8394D_QHD_VIDEO_PANEL, |
Yang | e194df9 | 2015-06-09 15:41:01 +0800 | [diff] [blame] | 77 | FL10802_FWVGA_VIDEO_PANEL, |
Sachin Bhayare | 3068e6e | 2017-02-15 15:05:44 +0530 | [diff] [blame] | 78 | AUO_QVGA_CMD_PANEL, |
| 79 | AUO_CX_QVGA_CMD_PANEL, |
| 80 | AUO_400P_CMD_PANEL, |
Ashish Garg | 22001a9 | 2017-08-07 14:46:54 +0530 | [diff] [blame] | 81 | AUO_390P_CMD_PANEL, |
Wenjun Zhang | a083eea | 2018-02-01 03:32:03 -0500 | [diff] [blame] | 82 | ST7789v2_QVGA_SPI_CMD_PANEL, |
Shivaraj Shetty | f9e10c4 | 2014-09-17 04:21:15 +0530 | [diff] [blame] | 83 | UNKNOWN_PANEL |
| 84 | }; |
| 85 | |
| 86 | /* |
| 87 | * The list of panels that are supported on this target. |
| 88 | * Any panel in this list can be selected using fastboot oem command. |
| 89 | */ |
| 90 | static struct panel_list supp_panels[] = { |
Ray Zhang | a59d972 | 2014-10-23 16:19:07 +0800 | [diff] [blame] | 91 | {"hx8394d_720p_video", HX8394D_720P_VIDEO_PANEL}, |
| 92 | {"hx8379a_fwvga_skua_video", HX8379A_FWVGA_SKUA_VIDEO_PANEL}, |
Ray Zhang | afc8666 | 2014-11-07 11:23:57 +0800 | [diff] [blame] | 93 | {"sharp_qhd_video", SHARP_QHD_VIDEO_PANEL}, |
Sandeep Panda | 9d9079f | 2014-11-24 18:46:25 +0530 | [diff] [blame] | 94 | {"truly_wvga_cmd", TRULY_WVGA_CMD_PANEL}, |
Ray Zhang | afc8666 | 2014-11-07 11:23:57 +0800 | [diff] [blame] | 95 | {"ili9806e_fwvga_video",ILI9806E_FWVGA_VIDEO_PANEL}, |
Ray Zhang | 6da38ca | 2014-11-18 16:02:11 +0800 | [diff] [blame] | 96 | {"hx8379c_fwvga_video",HX8379C_FWVGA_VIDEO_PANEL}, |
Yang | e194df9 | 2015-06-09 15:41:01 +0800 | [diff] [blame] | 97 | {"hx8394d_qhd_video", HX8394D_QHD_VIDEO_PANEL}, |
Sachin Bhayare | 3068e6e | 2017-02-15 15:05:44 +0530 | [diff] [blame] | 98 | {"fl10802_fwvga_video", FL10802_FWVGA_VIDEO_PANEL}, |
| 99 | {"auo_qvga_cmd", AUO_QVGA_CMD_PANEL}, |
| 100 | {"auo_cx_qvga_cmd", AUO_CX_QVGA_CMD_PANEL}, |
| 101 | {"auo_400p_cmd", AUO_400P_CMD_PANEL}, |
Ashish Garg | 22001a9 | 2017-08-07 14:46:54 +0530 | [diff] [blame] | 102 | {"auo_390p_cmd", AUO_390P_CMD_PANEL}, |
Wenjun Zhang | a083eea | 2018-02-01 03:32:03 -0500 | [diff] [blame] | 103 | {"ST7789V2_qvga_cmd", ST7789v2_QVGA_SPI_CMD_PANEL}, |
Shivaraj Shetty | f9e10c4 | 2014-09-17 04:21:15 +0530 | [diff] [blame] | 104 | }; |
| 105 | |
| 106 | static uint32_t panel_id; |
| 107 | |
| 108 | int oem_panel_rotation() |
| 109 | { |
| 110 | return NO_ERROR; |
| 111 | } |
| 112 | |
| 113 | int oem_panel_on() |
| 114 | { |
| 115 | /* |
| 116 | * OEM can keep there panel specific on instructions in this |
| 117 | * function |
| 118 | */ |
Sandeep Panda | 419bfbb | 2015-01-09 19:29:20 +0530 | [diff] [blame] | 119 | if (panel_id == ILI9806E_FWVGA_VIDEO_PANEL) |
| 120 | mdelay(ILI9806E_FWVGA_VIDEO_PANEL_POST_INIT_DELAY); |
| 121 | |
Shivaraj Shetty | f9e10c4 | 2014-09-17 04:21:15 +0530 | [diff] [blame] | 122 | return NO_ERROR; |
| 123 | } |
| 124 | |
| 125 | int oem_panel_off() |
| 126 | { |
| 127 | /* |
| 128 | * OEM can keep their panel specific off instructions |
| 129 | * in this function |
| 130 | */ |
| 131 | return NO_ERROR; |
| 132 | } |
| 133 | |
| 134 | static int init_panel_data(struct panel_struct *panelstruct, |
| 135 | struct msm_panel_info *pinfo, |
| 136 | struct mdss_dsi_phy_ctrl *phy_db) |
| 137 | { |
| 138 | int pan_type = PANEL_TYPE_DSI; |
| 139 | |
| 140 | switch (panel_id) { |
| 141 | case HX8394D_720P_VIDEO_PANEL: |
| 142 | panelstruct->paneldata = &hx8394d_720p_video_panel_data; |
| 143 | panelstruct->panelres = &hx8394d_720p_video_panel_res; |
| 144 | panelstruct->color = &hx8394d_720p_video_color; |
| 145 | panelstruct->videopanel = &hx8394d_720p_video_video_panel; |
| 146 | panelstruct->commandpanel = &hx8394d_720p_video_command_panel; |
| 147 | panelstruct->state = &hx8394d_720p_video_state; |
| 148 | panelstruct->laneconfig = &hx8394d_720p_video_lane_config; |
| 149 | panelstruct->paneltiminginfo |
| 150 | = &hx8394d_720p_video_timing_info; |
| 151 | panelstruct->panelresetseq |
| 152 | = &hx8394d_720p_video_panel_reset_seq; |
| 153 | panelstruct->backlightinfo = &hx8394d_720p_video_backlight; |
Padmanabhan Komanduru | b3d3184 | 2014-11-04 15:47:53 +0530 | [diff] [blame] | 154 | pinfo->mipi.panel_on_cmds |
Shivaraj Shetty | f9e10c4 | 2014-09-17 04:21:15 +0530 | [diff] [blame] | 155 | = hx8394d_720p_video_on_command; |
Padmanabhan Komanduru | b3d3184 | 2014-11-04 15:47:53 +0530 | [diff] [blame] | 156 | pinfo->mipi.num_of_panel_on_cmds |
Shivaraj Shetty | f9e10c4 | 2014-09-17 04:21:15 +0530 | [diff] [blame] | 157 | = HX8394D_720P_VIDEO_ON_COMMAND; |
Padmanabhan Komanduru | b3d3184 | 2014-11-04 15:47:53 +0530 | [diff] [blame] | 158 | pinfo->mipi.panel_off_cmds |
| 159 | = hx8394d_720p_video_off_command; |
| 160 | pinfo->mipi.num_of_panel_off_cmds |
| 161 | = HX8394D_720P_VIDEO_OFF_COMMAND; |
Shivaraj Shetty | f9e10c4 | 2014-09-17 04:21:15 +0530 | [diff] [blame] | 162 | memcpy(phy_db->timing, |
| 163 | hx8394d_720p_video_timings, TIMING_SIZE); |
| 164 | pinfo->mipi.signature = HX8394D_720P_VIDEO_SIGNATURE; |
| 165 | break; |
Ray Zhang | a59d972 | 2014-10-23 16:19:07 +0800 | [diff] [blame] | 166 | case HX8379A_FWVGA_SKUA_VIDEO_PANEL: |
| 167 | panelstruct->paneldata = &hx8379a_fwvga_skua_video_panel_data; |
| 168 | panelstruct->panelres = &hx8379a_fwvga_skua_video_panel_res; |
| 169 | panelstruct->color = &hx8379a_fwvga_skua_video_color; |
| 170 | panelstruct->videopanel = &hx8379a_fwvga_skua_video_video_panel; |
| 171 | panelstruct->commandpanel = &hx8379a_fwvga_skua_video_command_panel; |
| 172 | panelstruct->state = &hx8379a_fwvga_skua_video_state; |
| 173 | panelstruct->laneconfig = &hx8379a_fwvga_skua_video_lane_config; |
| 174 | panelstruct->paneltiminginfo |
| 175 | = &hx8379a_fwvga_skua_video_timing_info; |
| 176 | panelstruct->panelresetseq |
| 177 | = &hx8379a_fwvga_skua_video_reset_seq; |
| 178 | panelstruct->backlightinfo = &hx8379a_fwvga_skua_video_backlight; |
Ray Zhang | 790af75 | 2014-11-14 18:39:10 +0800 | [diff] [blame] | 179 | pinfo->mipi.panel_on_cmds |
Ray Zhang | a59d972 | 2014-10-23 16:19:07 +0800 | [diff] [blame] | 180 | = hx8379a_fwvga_skua_video_on_command; |
Ray Zhang | 790af75 | 2014-11-14 18:39:10 +0800 | [diff] [blame] | 181 | pinfo->mipi.num_of_panel_on_cmds |
Ray Zhang | a59d972 | 2014-10-23 16:19:07 +0800 | [diff] [blame] | 182 | = HX8379A_FWVGA_SKUA_VIDEO_ON_COMMAND; |
Ray Zhang | 790af75 | 2014-11-14 18:39:10 +0800 | [diff] [blame] | 183 | pinfo->mipi.panel_off_cmds |
| 184 | = hx8379a_fwvga_skua_video_off_command; |
| 185 | pinfo->mipi.num_of_panel_off_cmds |
| 186 | = HX8379A_FWVGA_SKUA_VIDEO_OFF_COMMAND; |
Ray Zhang | a59d972 | 2014-10-23 16:19:07 +0800 | [diff] [blame] | 187 | memcpy(phy_db->timing, |
| 188 | hx8379a_fwvga_skua_video_timings, TIMING_SIZE); |
| 189 | pinfo->mipi.signature = HX8379A_FWVGA_SKUA_VIDEO_SIGNATURE; |
| 190 | break; |
Shivaraj Shetty | f9daa72 | 2014-11-17 17:29:49 +0530 | [diff] [blame] | 191 | case SHARP_QHD_VIDEO_PANEL: |
| 192 | panelstruct->paneldata = &sharp_qhd_video_panel_data; |
| 193 | panelstruct->panelres = &sharp_qhd_video_panel_res; |
| 194 | panelstruct->color = &sharp_qhd_video_color; |
| 195 | panelstruct->videopanel = &sharp_qhd_video_video_panel; |
| 196 | panelstruct->commandpanel = &sharp_qhd_video_command_panel; |
| 197 | panelstruct->state = &sharp_qhd_video_state; |
| 198 | panelstruct->laneconfig = &sharp_qhd_video_lane_config; |
| 199 | panelstruct->paneltiminginfo |
| 200 | = &sharp_qhd_video_timing_info; |
| 201 | panelstruct->panelresetseq |
| 202 | = &sharp_qhd_video_panel_reset_seq; |
| 203 | panelstruct->backlightinfo = &sharp_qhd_video_backlight; |
| 204 | pinfo->mipi.panel_on_cmds |
| 205 | = sharp_qhd_video_on_command; |
| 206 | pinfo->mipi.num_of_panel_on_cmds |
| 207 | = SHARP_QHD_VIDEO_ON_COMMAND; |
| 208 | pinfo->mipi.panel_off_cmds |
| 209 | = sharp_qhd_video_off_command; |
| 210 | pinfo->mipi.num_of_panel_off_cmds |
| 211 | = SHARP_QHD_VIDEO_OFF_COMMAND; |
| 212 | memcpy(phy_db->timing, sharp_qhd_video_timings, TIMING_SIZE); |
| 213 | break; |
Sandeep Panda | 9d9079f | 2014-11-24 18:46:25 +0530 | [diff] [blame] | 214 | case TRULY_WVGA_CMD_PANEL: |
| 215 | panelstruct->paneldata = &truly_wvga_cmd_panel_data; |
| 216 | panelstruct->panelres = &truly_wvga_cmd_panel_res; |
| 217 | panelstruct->color = &truly_wvga_cmd_color; |
| 218 | panelstruct->videopanel = &truly_wvga_cmd_video_panel; |
| 219 | panelstruct->commandpanel = &truly_wvga_cmd_command_panel; |
| 220 | panelstruct->state = &truly_wvga_cmd_state; |
| 221 | panelstruct->laneconfig = &truly_wvga_cmd_lane_config; |
| 222 | panelstruct->paneltiminginfo |
| 223 | = &truly_wvga_cmd_timing_info; |
| 224 | panelstruct->panelresetseq |
| 225 | = &truly_wvga_cmd_reset_seq; |
| 226 | panelstruct->backlightinfo = &truly_wvga_cmd_backlight; |
Shivaraj Shetty | 0dc27c4 | 2015-02-18 12:35:23 +0530 | [diff] [blame] | 227 | pinfo->mipi.panel_on_cmds |
Sandeep Panda | 9d9079f | 2014-11-24 18:46:25 +0530 | [diff] [blame] | 228 | = truly_wvga_cmd_on_command; |
Shivaraj Shetty | 0dc27c4 | 2015-02-18 12:35:23 +0530 | [diff] [blame] | 229 | pinfo->mipi.num_of_panel_on_cmds |
Sandeep Panda | 9d9079f | 2014-11-24 18:46:25 +0530 | [diff] [blame] | 230 | = TRULY_WVGA_CMD_ON_COMMAND; |
Shivaraj Shetty | 0dc27c4 | 2015-02-18 12:35:23 +0530 | [diff] [blame] | 231 | pinfo->mipi.panel_off_cmds |
| 232 | = truly_wvga_cmd_off_command; |
| 233 | pinfo->mipi.num_of_panel_off_cmds |
| 234 | = TRULY_WVGA_CMD_OFF_COMMAND; |
Sandeep Panda | 9d9079f | 2014-11-24 18:46:25 +0530 | [diff] [blame] | 235 | memcpy(phy_db->timing, |
| 236 | truly_wvga_cmd_timings, TIMING_SIZE); |
| 237 | break; |
Ray Zhang | afc8666 | 2014-11-07 11:23:57 +0800 | [diff] [blame] | 238 | case ILI9806E_FWVGA_VIDEO_PANEL: |
| 239 | panelstruct->paneldata = &ili9806e_fwvga_video_panel_data; |
| 240 | panelstruct->panelres = &ili9806e_fwvga_video_panel_res; |
| 241 | panelstruct->color = &ili9806e_fwvga_video_color; |
| 242 | panelstruct->videopanel = &ili9806e_fwvga_video_video_panel; |
| 243 | panelstruct->commandpanel = &ili9806e_fwvga_video_command_panel; |
| 244 | panelstruct->state = &ili9806e_fwvga_video_state; |
| 245 | panelstruct->laneconfig = &ili9806e_fwvga_video_lane_config; |
| 246 | panelstruct->paneltiminginfo |
| 247 | = &ili9806e_fwvga_video_timing_info; |
| 248 | panelstruct->panelresetseq |
| 249 | = &ili9806e_fwvga_video_reset_seq; |
| 250 | panelstruct->backlightinfo = &ili9806e_fwvga_video_backlight; |
| 251 | pinfo->mipi.panel_on_cmds |
| 252 | = ili9806e_fwvga_video_on_command; |
| 253 | pinfo->mipi.num_of_panel_on_cmds |
| 254 | = ILI9806E_FWVGA_VIDEO_ON_COMMAND; |
| 255 | pinfo->mipi.panel_off_cmds |
| 256 | = ili9806e_fwvga_video_off_command; |
| 257 | pinfo->mipi.num_of_panel_off_cmds |
| 258 | = ILI9806E_FWVGA_VIDEO_OFF_COMMAND; |
| 259 | memcpy(phy_db->timing, |
| 260 | ili9806e_fwvga_video_timings, TIMING_SIZE); |
| 261 | pinfo->mipi.signature = ILI9806E_FWVGA_VIDEO_SIGNATURE; |
| 262 | break; |
Ray Zhang | 6da38ca | 2014-11-18 16:02:11 +0800 | [diff] [blame] | 263 | case HX8379C_FWVGA_VIDEO_PANEL: |
| 264 | panelstruct->paneldata = &hx8379c_fwvga_video_panel_data; |
| 265 | panelstruct->panelres = &hx8379c_fwvga_video_panel_res; |
| 266 | panelstruct->color = &hx8379c_fwvga_video_color; |
| 267 | panelstruct->videopanel = &hx8379c_fwvga_video_video_panel; |
| 268 | panelstruct->commandpanel = &hx8379c_fwvga_video_command_panel; |
| 269 | panelstruct->state = &hx8379c_fwvga_video_state; |
| 270 | panelstruct->laneconfig = &hx8379c_fwvga_video_lane_config; |
| 271 | panelstruct->paneltiminginfo |
| 272 | = &hx8379c_fwvga_video_timing_info; |
| 273 | panelstruct->panelresetseq |
| 274 | = &hx8379c_fwvga_video_reset_seq; |
| 275 | panelstruct->backlightinfo = &hx8379c_fwvga_video_backlight; |
| 276 | pinfo->mipi.panel_on_cmds |
| 277 | = hx8379c_fwvga_video_on_command; |
| 278 | pinfo->mipi.num_of_panel_on_cmds |
| 279 | = HX8379C_FWVGA_VIDEO_ON_COMMAND; |
| 280 | pinfo->mipi.panel_off_cmds |
| 281 | = hx8379c_fwvga_video_off_command; |
| 282 | pinfo->mipi.num_of_panel_off_cmds |
| 283 | = HX8379C_FWVGA_VIDEO_OFF_COMMAND; |
| 284 | memcpy(phy_db->timing, |
| 285 | hx8379c_fwvga_video_timings, TIMING_SIZE); |
| 286 | pinfo->mipi.signature = HX8379C_FWVGA_VIDEO_SIGNATURE; |
| 287 | break; |
Shivaraj Shetty | cecaa0f | 2014-11-21 14:51:38 +0530 | [diff] [blame] | 288 | case HX8394D_QHD_VIDEO_PANEL: |
| 289 | panelstruct->paneldata = &hx8394d_qhd_video_panel_data; |
| 290 | panelstruct->panelres = &hx8394d_qhd_video_panel_res; |
| 291 | panelstruct->color = &hx8394d_qhd_video_color; |
| 292 | panelstruct->videopanel = &hx8394d_qhd_video_video_panel; |
| 293 | panelstruct->commandpanel = &hx8394d_qhd_video_command_panel; |
| 294 | panelstruct->state = &hx8394d_qhd_video_state; |
| 295 | panelstruct->laneconfig = &hx8394d_qhd_video_lane_config; |
| 296 | panelstruct->paneltiminginfo |
| 297 | = &hx8394d_qhd_video_timing_info; |
| 298 | panelstruct->panelresetseq |
| 299 | = &hx8394d_qhd_video_panel_reset_seq; |
| 300 | panelstruct->backlightinfo = &hx8394d_qhd_video_backlight; |
Shivaraj Shetty | 0dc27c4 | 2015-02-18 12:35:23 +0530 | [diff] [blame] | 301 | pinfo->mipi.panel_on_cmds |
Shivaraj Shetty | cecaa0f | 2014-11-21 14:51:38 +0530 | [diff] [blame] | 302 | = hx8394d_qhd_video_on_command; |
Shivaraj Shetty | 0dc27c4 | 2015-02-18 12:35:23 +0530 | [diff] [blame] | 303 | pinfo->mipi.num_of_panel_on_cmds |
Shivaraj Shetty | cecaa0f | 2014-11-21 14:51:38 +0530 | [diff] [blame] | 304 | = HX8394D_QHD_VIDEO_ON_COMMAND; |
Shivaraj Shetty | 0dc27c4 | 2015-02-18 12:35:23 +0530 | [diff] [blame] | 305 | pinfo->mipi.panel_off_cmds |
| 306 | = hx8394d_qhd_video_off_command; |
| 307 | pinfo->mipi.num_of_panel_off_cmds |
| 308 | = HX8394D_QHD_VIDEO_OFF_COMMAND; |
Shivaraj Shetty | cecaa0f | 2014-11-21 14:51:38 +0530 | [diff] [blame] | 309 | memcpy(phy_db->timing, |
| 310 | hx8394d_qhd_video_timings, TIMING_SIZE); |
| 311 | pinfo->mipi.signature = HX8394D_QHD_VIDEO_SIGNATURE; |
| 312 | break; |
Yang | e194df9 | 2015-06-09 15:41:01 +0800 | [diff] [blame] | 313 | case FL10802_FWVGA_VIDEO_PANEL: |
| 314 | panelstruct->paneldata = &fl10802_fwvga_video_panel_data; |
| 315 | panelstruct->panelres = &fl10802_fwvga_video_panel_res; |
| 316 | panelstruct->color = &fl10802_fwvga_video_color; |
| 317 | panelstruct->videopanel = &fl10802_fwvga_video_video_panel; |
| 318 | panelstruct->commandpanel = &fl10802_fwvga_video_command_panel; |
| 319 | panelstruct->state = &fl10802_fwvga_video_state; |
| 320 | panelstruct->laneconfig = &fl10802_fwvga_video_lane_config; |
| 321 | panelstruct->paneltiminginfo |
| 322 | = &fl10802_fwvga_video_timing_info; |
| 323 | panelstruct->panelresetseq |
| 324 | = &fl10802_fwvga_video_reset_seq; |
| 325 | panelstruct->backlightinfo = &fl10802_fwvga_video_backlight; |
| 326 | pinfo->mipi.panel_on_cmds |
| 327 | = fl10802_fwvga_video_on_command; |
| 328 | pinfo->mipi.num_of_panel_on_cmds |
| 329 | = FL10802_FWVGA_VIDEO_ON_COMMAND; |
| 330 | pinfo->mipi.panel_off_cmds |
| 331 | = fl10802_fwvga_video_off_command; |
| 332 | pinfo->mipi.num_of_panel_off_cmds |
| 333 | = FL10802_FWVGA_VIDEO_OFF_COMMAND; |
| 334 | memcpy(phy_db->timing, |
| 335 | fl10802_fwvga_video_timings, TIMING_SIZE); |
| 336 | pinfo->mipi.signature = FL10802_FWVGA_VIDEO_SIGNATURE; |
Yang Xu | fbca05e | 2015-08-04 16:19:51 +0800 | [diff] [blame] | 337 | pinfo->mipi.cmds_post_tg = 1; |
Yang | e194df9 | 2015-06-09 15:41:01 +0800 | [diff] [blame] | 338 | break; |
Sachin Bhayare | 3068e6e | 2017-02-15 15:05:44 +0530 | [diff] [blame] | 339 | case AUO_QVGA_CMD_PANEL: |
| 340 | panelstruct->paneldata = &auo_qvga_cmd_panel_data; |
| 341 | panelstruct->panelres = &auo_qvga_cmd_panel_res; |
| 342 | panelstruct->color = &auo_qvga_cmd_color; |
| 343 | panelstruct->videopanel = &auo_qvga_cmd_video_panel; |
| 344 | panelstruct->commandpanel = &auo_qvga_cmd_command_panel; |
| 345 | panelstruct->state = &auo_qvga_cmd_state; |
| 346 | panelstruct->laneconfig = &auo_qvga_cmd_lane_config; |
| 347 | panelstruct->paneltiminginfo |
| 348 | = &auo_qvga_cmd_timing_info; |
| 349 | panelstruct->panelresetseq |
| 350 | = &auo_qvga_cmd_panel_reset_seq; |
| 351 | panelstruct->backlightinfo |
| 352 | = &auo_qvga_cmd_backlight; |
| 353 | pinfo->mipi.panel_on_cmds |
| 354 | = auo_qvga_cmd_on_command; |
| 355 | pinfo->mipi.num_of_panel_on_cmds |
| 356 | = auo_QVGA_CMD_ON_COMMAND; |
| 357 | pinfo->mipi.panel_off_cmds |
| 358 | = auo_qvga_cmd_off_command; |
| 359 | pinfo->mipi.num_of_panel_off_cmds |
| 360 | = auo_QVGA_CMD_OFF_COMMAND; |
| 361 | memcpy(phy_db->timing, auo_qvga_cmd_timings, TIMING_SIZE); |
| 362 | break; |
| 363 | case AUO_CX_QVGA_CMD_PANEL: |
| 364 | panelstruct->paneldata = &auo_cx_qvga_cmd_panel_data; |
| 365 | panelstruct->panelres = &auo_cx_qvga_cmd_panel_res; |
| 366 | panelstruct->color = &auo_cx_qvga_cmd_color; |
| 367 | panelstruct->videopanel = &auo_cx_qvga_cmd_video_panel; |
| 368 | panelstruct->commandpanel = &auo_cx_qvga_cmd_command_panel; |
| 369 | panelstruct->state = &auo_cx_qvga_cmd_state; |
| 370 | panelstruct->laneconfig = &auo_cx_qvga_cmd_lane_config; |
| 371 | panelstruct->paneltiminginfo |
| 372 | = &auo_cx_qvga_cmd_timing_info; |
| 373 | panelstruct->panelresetseq |
| 374 | = &auo_cx_qvga_cmd_panel_reset_seq; |
| 375 | panelstruct->backlightinfo |
| 376 | = &auo_cx_qvga_cmd_backlight; |
| 377 | pinfo->mipi.panel_on_cmds |
| 378 | = auo_cx_qvga_cmd_on_command; |
| 379 | pinfo->mipi.num_of_panel_on_cmds |
| 380 | = auo_cx_QVGA_CMD_ON_COMMAND; |
| 381 | pinfo->mipi.panel_off_cmds |
| 382 | = auo_cx_qvga_cmd_off_command; |
| 383 | pinfo->mipi.num_of_panel_off_cmds |
| 384 | = auo_cx_QVGA_CMD_OFF_COMMAND; |
| 385 | memcpy(phy_db->timing, auo_cx_qvga_cmd_timings, TIMING_SIZE); |
| 386 | break; |
| 387 | case AUO_400P_CMD_PANEL: |
| 388 | panelstruct->paneldata = &auo_400p_cmd_panel_data; |
| 389 | panelstruct->panelres = &auo_400p_cmd_panel_res; |
| 390 | panelstruct->color = &auo_400p_cmd_color; |
| 391 | panelstruct->videopanel = &auo_400p_cmd_video_panel; |
| 392 | panelstruct->commandpanel = &auo_400p_cmd_command_panel; |
| 393 | panelstruct->state = &auo_400p_cmd_state; |
| 394 | panelstruct->laneconfig = &auo_400p_cmd_lane_config; |
| 395 | panelstruct->paneltiminginfo |
| 396 | = &auo_400p_cmd_timing_info; |
| 397 | panelstruct->panelresetseq |
| 398 | = &auo_400p_cmd_panel_reset_seq; |
| 399 | panelstruct->backlightinfo |
| 400 | = &auo_400p_cmd_backlight; |
| 401 | pinfo->mipi.panel_on_cmds |
| 402 | = auo_400p_cmd_on_command; |
| 403 | pinfo->mipi.num_of_panel_on_cmds |
| 404 | = auo_400P_CMD_ON_COMMAND; |
| 405 | pinfo->mipi.panel_off_cmds |
| 406 | = auo_400p_cmd_off_command; |
| 407 | pinfo->mipi.num_of_panel_off_cmds |
| 408 | = auo_400P_CMD_OFF_COMMAND; |
| 409 | memcpy(phy_db->timing, auo_400p_cmd_timings, TIMING_SIZE); |
| 410 | break; |
Ashish Garg | 22001a9 | 2017-08-07 14:46:54 +0530 | [diff] [blame] | 411 | case AUO_390P_CMD_PANEL: |
| 412 | panelstruct->paneldata = &auo_390p_cmd_panel_data; |
| 413 | panelstruct->panelres = &auo_390p_cmd_panel_res; |
| 414 | panelstruct->color = &auo_390p_cmd_color; |
| 415 | panelstruct->videopanel = &auo_390p_cmd_video_panel; |
| 416 | panelstruct->commandpanel = &auo_390p_cmd_command_panel; |
| 417 | panelstruct->state = &auo_390p_cmd_state; |
| 418 | panelstruct->laneconfig = &auo_390p_cmd_lane_config; |
| 419 | panelstruct->paneltiminginfo |
| 420 | = &auo_390p_cmd_timing_info; |
| 421 | panelstruct->panelresetseq |
| 422 | = &auo_390p_cmd_panel_reset_seq; |
| 423 | panelstruct->backlightinfo |
| 424 | = &auo_390p_cmd_backlight; |
| 425 | pinfo->mipi.panel_on_cmds |
| 426 | = auo_390p_cmd_on_command; |
| 427 | pinfo->mipi.num_of_panel_on_cmds |
| 428 | = AUO_390P_CMD_ON_COMMAND; |
| 429 | pinfo->mipi.panel_off_cmds |
| 430 | = auo_390p_cmd_off_command; |
| 431 | pinfo->mipi.num_of_panel_off_cmds |
| 432 | = AUO_390P_CMD_OFF_COMMAND; |
| 433 | memcpy(phy_db->timing, auo_390p_cmd_timings, TIMING_SIZE); |
| 434 | break; |
Wenjun Zhang | a083eea | 2018-02-01 03:32:03 -0500 | [diff] [blame] | 435 | case ST7789v2_QVGA_SPI_CMD_PANEL: |
| 436 | panelstruct->paneldata = &st7789v2_qvga_cmd_panel_data; |
| 437 | panelstruct->panelres = &st7789v2_qvga_cmd_panel_res; |
| 438 | panelstruct->color = &st7789v2_qvga_cmd_color; |
| 439 | panelstruct->panelresetseq = &st7789v2_qvga_cmd_reset_seq; |
| 440 | panelstruct->backlightinfo = &st7789v2_qvga_cmd_backlight; |
| 441 | pinfo->spi.panel_cmds = st7789v2_qvga_cmd_on_command; |
| 442 | pinfo->spi.num_of_panel_cmds= ST7789v2_QVGA_CMD_ON_COMMAND; |
| 443 | pinfo->spi.signature_addr = &st7789v2_signature_addr; |
| 444 | pinfo->spi.signature = st7789v2_signature; |
| 445 | pinfo->spi.signature_len = st7789v2_signature_len; |
| 446 | pan_type = PANEL_TYPE_SPI; |
| 447 | break; |
Shivaraj Shetty | f9e10c4 | 2014-09-17 04:21:15 +0530 | [diff] [blame] | 448 | case UNKNOWN_PANEL: |
| 449 | default: |
| 450 | memset(panelstruct, 0, sizeof(struct panel_struct)); |
Padmanabhan Komanduru | b3d3184 | 2014-11-04 15:47:53 +0530 | [diff] [blame] | 451 | memset(pinfo->mipi.panel_on_cmds, 0, |
| 452 | sizeof(struct mipi_dsi_cmd)); |
| 453 | pinfo->mipi.num_of_panel_on_cmds = 0; |
| 454 | memset(pinfo->mipi.panel_off_cmds, 0, |
| 455 | sizeof(struct mipi_dsi_cmd)); |
| 456 | pinfo->mipi.num_of_panel_off_cmds = 0; |
Shivaraj Shetty | f9e10c4 | 2014-09-17 04:21:15 +0530 | [diff] [blame] | 457 | memset(phy_db->timing, 0, TIMING_SIZE); |
| 458 | pan_type = PANEL_TYPE_UNKNOWN; |
| 459 | break; |
| 460 | } |
| 461 | return pan_type; |
| 462 | } |
| 463 | |
| 464 | uint32_t oem_panel_max_auto_detect_panels() |
| 465 | { |
| 466 | return target_panel_auto_detect_enabled() ? |
| 467 | DISPLAY_MAX_PANEL_DETECTION : 0; |
| 468 | } |
| 469 | |
| 470 | int oem_panel_select(const char *panel_name, struct panel_struct *panelstruct, |
| 471 | struct msm_panel_info *pinfo, |
| 472 | struct mdss_dsi_phy_ctrl *phy_db) |
| 473 | { |
| 474 | uint32_t hw_id = board_hardware_id(); |
Sachin Bhayare | 316c8c2 | 2018-04-02 15:27:34 +0530 | [diff] [blame] | 475 | uint32_t platform_type = board_platform_id(); |
Ray Zhang | a59d972 | 2014-10-23 16:19:07 +0800 | [diff] [blame] | 476 | uint32_t platform_subtype = board_hardware_subtype(); |
Shivaraj Shetty | f9e10c4 | 2014-09-17 04:21:15 +0530 | [diff] [blame] | 477 | int32_t panel_override_id; |
| 478 | |
| 479 | if (panel_name) { |
| 480 | panel_override_id = panel_name_to_id(supp_panels, |
| 481 | ARRAY_SIZE(supp_panels), panel_name); |
| 482 | |
| 483 | if (panel_override_id < 0) { |
| 484 | dprintf(CRITICAL, "Not able to search the panel:%s\n", |
Padmanabhan Komanduru | bccbcdc | 2015-06-30 16:19:24 +0530 | [diff] [blame] | 485 | panel_name); |
Shivaraj Shetty | f9e10c4 | 2014-09-17 04:21:15 +0530 | [diff] [blame] | 486 | } else if (panel_override_id < UNKNOWN_PANEL) { |
| 487 | /* panel override using fastboot oem command */ |
| 488 | panel_id = panel_override_id; |
| 489 | |
| 490 | dprintf(INFO, "OEM panel override:%s\n", |
Padmanabhan Komanduru | bccbcdc | 2015-06-30 16:19:24 +0530 | [diff] [blame] | 491 | panel_name); |
Shivaraj Shetty | f9e10c4 | 2014-09-17 04:21:15 +0530 | [diff] [blame] | 492 | goto panel_init; |
| 493 | } |
| 494 | } |
| 495 | switch (hw_id) { |
| 496 | case HW_PLATFORM_SURF: |
Shivaraj Shetty | af4c607 | 2014-11-04 16:25:31 +0530 | [diff] [blame] | 497 | case HW_PLATFORM_MTP: |
Sandeep Panda | 8ede650 | 2014-12-02 10:56:16 +0530 | [diff] [blame] | 498 | case HW_PLATFORM_RCM: |
Vishnuvardhan Prodduturi | f558685 | 2017-05-25 22:17:03 +0530 | [diff] [blame] | 499 | switch (platform_subtype) { |
Swetha Vucha | e3baf91 | 2017-12-20 15:49:28 +0530 | [diff] [blame] | 500 | case HW_PLATFORM_SUBTYPE_8909_PM660_V1: |
| 501 | case HW_PLATFORM_SUBTYPE_8909_PM660: |
| 502 | case HW_PLATFORM_SUBTYPE_8909_COMPAL_ALPHA: |
Sachin Bhayare | 316c8c2 | 2018-04-02 15:27:34 +0530 | [diff] [blame] | 503 | if ((platform_type == MSM8909W) || |
| 504 | (platform_type == APQ8009W)) |
| 505 | panel_id = AUO_390P_CMD_PANEL; |
| 506 | break; |
| 507 | case HW_PLATFORM_SUBTYPE_SWOC_TP_CIRC: |
| 508 | case HW_PLATFORM_SUBTYPE_SWOC_NOWGR_CIRC: |
| 509 | if ((platform_type == MSM8909W) || |
| 510 | (platform_type == APQ8009W)) |
| 511 | panel_id = AUO_400P_CMD_PANEL; |
| 512 | break; |
| 513 | case HW_PLATFORM_SUBTYPE_SWOC_WEAR: |
| 514 | if ((platform_type == MSM8909W) || |
| 515 | (platform_type == APQ8009W)) |
| 516 | panel_id = AUO_CX_QVGA_CMD_PANEL; |
Vishnuvardhan Prodduturi | f558685 | 2017-05-25 22:17:03 +0530 | [diff] [blame] | 517 | break; |
| 518 | default: |
| 519 | panel_id = HX8394D_720P_VIDEO_PANEL; |
| 520 | break; |
| 521 | } |
Shivaraj Shetty | f9e10c4 | 2014-09-17 04:21:15 +0530 | [diff] [blame] | 522 | break; |
Ray Zhang | a59d972 | 2014-10-23 16:19:07 +0800 | [diff] [blame] | 523 | case HW_PLATFORM_QRD: |
| 524 | switch (platform_subtype) { |
| 525 | case QRD_SKUA: |
| 526 | panel_id = HX8379A_FWVGA_SKUA_VIDEO_PANEL; |
| 527 | break; |
| 528 | case QRD_SKUC: |
Ray Zhang | afc8666 | 2014-11-07 11:23:57 +0800 | [diff] [blame] | 529 | panel_id = ILI9806E_FWVGA_VIDEO_PANEL; |
| 530 | break; |
Ray Zhang | a59d972 | 2014-10-23 16:19:07 +0800 | [diff] [blame] | 531 | case QRD_SKUE: |
Ray Zhang | 6da38ca | 2014-11-18 16:02:11 +0800 | [diff] [blame] | 532 | panel_id = HX8379C_FWVGA_VIDEO_PANEL; |
| 533 | break; |
Yang | e194df9 | 2015-06-09 15:41:01 +0800 | [diff] [blame] | 534 | case QRD_SKUT: |
| 535 | panel_id = FL10802_FWVGA_VIDEO_PANEL; |
| 536 | break; |
Ray Zhang | a59d972 | 2014-10-23 16:19:07 +0800 | [diff] [blame] | 537 | default: |
| 538 | dprintf(CRITICAL, "QRD Display not enabled for %d type\n", |
| 539 | platform_subtype); |
| 540 | return PANEL_TYPE_UNKNOWN; |
| 541 | } |
| 542 | break; |
Shivaraj Shetty | f9e10c4 | 2014-09-17 04:21:15 +0530 | [diff] [blame] | 543 | default: |
| 544 | dprintf(CRITICAL, "Display not enabled for %d HW type\n", |
| 545 | hw_id); |
| 546 | return PANEL_TYPE_UNKNOWN; |
| 547 | } |
| 548 | |
| 549 | panel_init: |
Shivaraj Shetty | af4c607 | 2014-11-04 16:25:31 +0530 | [diff] [blame] | 550 | phy_db->regulator_mode = DSI_PHY_REGULATOR_LDO_MODE; |
Shivaraj Shetty | f9e10c4 | 2014-09-17 04:21:15 +0530 | [diff] [blame] | 551 | return init_panel_data(panelstruct, pinfo, phy_db); |
| 552 | } |