blob: 1b97cbcb7f96e99c76a888148b0148f247f0c48b [file] [log] [blame]
Deepa Dinamani645e9b12012-12-21 14:23:40 -08001/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
2 *
3 * Redistribution and use in source and binary forms, with or without
4 * modification, are permitted provided that the following conditions are
5 * met:
6 * * Redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer.
8 * * Redistributions in binary form must reproduce the above
9 * copyright notice, this list of conditions and the following
10 * disclaimer in the documentation and/or other materials provided
11 * with the distribution.
12 * * Neither the name of The Linux Foundation nor the names of its
13 * contributors may be used to endorse or promote products derived
14 * from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
19 * NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
20 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
21 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
22 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
23 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
25 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
26 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <debug.h>
30#include <reg.h>
31#include <platform/iomap.h>
32#include <qgic.h>
33#include <qtimer.h>
Deepa Dinamanid1260ed2013-03-06 14:24:01 -080034#include <platform/clock.h>
35#include <mmu.h>
36#include <arch/arm/mmu.h>
37#include <smem.h>
38#include <board.h>
sundarajan srinivasan432010b2013-05-10 14:24:53 -070039#include <boot_stats.h>
Deepa Dinamanid1260ed2013-03-06 14:24:01 -080040
41#define MB (1024*1024)
42
43#define MSM_IOMAP_SIZE ((MSM_IOMAP_END - MSM_IOMAP_BASE)/MB)
44
45/* LK memory - cacheable, write through */
46#define LK_MEMORY (MMU_MEMORY_TYPE_NORMAL_WRITE_THROUGH | \
47 MMU_MEMORY_AP_READ_WRITE)
48
49/* Peripherals - non-shared device */
50#define IOMAP_MEMORY (MMU_MEMORY_TYPE_DEVICE_SHARED | \
51 MMU_MEMORY_AP_READ_WRITE | MMU_MEMORY_XN)
52
53static mmu_section_t mmu_section_table[] = {
54/* Physical addr, Virtual addr, Size (in MB), Flags */
55 { MEMBASE, MEMBASE, (MEMSIZE / MB), LK_MEMORY},
56 { MSM_IOMAP_BASE, MSM_IOMAP_BASE, MSM_IOMAP_SIZE, IOMAP_MEMORY},
57};
58
59static struct smem_ram_ptable ram_ptable;
Deepa Dinamani645e9b12012-12-21 14:23:40 -080060
61void platform_early_init(void)
62{
aiqunyb7f1cb12013-03-02 11:40:05 -080063 board_init();
Deepa Dinamanieb182372013-02-04 15:53:58 -080064 platform_clock_init();
Deepa Dinamani645e9b12012-12-21 14:23:40 -080065 qgic_init();
66 qtimer_init();
67}
68
69void platform_init(void)
70{
71 dprintf(INFO, "platform_init()\n");
72}
73
74void platform_uninit(void)
75{
76 qtimer_uninit();
77}
Deepa Dinamanid1260ed2013-03-06 14:24:01 -080078
sundarajan srinivasan432010b2013-05-10 14:24:53 -070079uint32_t platform_get_sclk_count(void)
80{
81 return readl(MPM2_MPM_SLEEP_TIMETICK_COUNT_VAL);
82}
83
84addr_t get_bs_info_addr()
85{
86 return ((addr_t)BS_INFO_ADDR);
87}
88
Deepa Dinamanid1260ed2013-03-06 14:24:01 -080089/* Setup memory for this platform */
90void platform_init_mmu_mappings(void)
91{
92 uint32_t i;
93 uint32_t sections;
94 uint32_t table_size = ARRAY_SIZE(mmu_section_table);
95
96 ASSERT(smem_ram_ptable_init(&ram_ptable));
97
98 /* Configure the MMU page entries for SDRAM and IMEM memory read
99 from the smem ram table*/
100 for(i = 0; i < ram_ptable.len; i++)
101 {
102 if(ram_ptable.parts[i].type == SYS_MEMORY)
103 {
104 if((ram_ptable.parts[i].category == SDRAM) ||
105 (ram_ptable.parts[i].category == IMEM))
106 {
107 /* Check to ensure that start address is 1MB aligned */
108 ASSERT((ram_ptable.parts[i].start & 0xFFFFF) == 0);
109
110 sections = (ram_ptable.parts[i].size) / MB;
111 while(sections--)
112 {
113 arm_mmu_map_section(ram_ptable.parts[i].start +
114 sections * MB,
115 ram_ptable.parts[i].start +
116 sections * MB,
117 (MMU_MEMORY_TYPE_NORMAL_WRITE_THROUGH | \
118 MMU_MEMORY_AP_READ_WRITE | MMU_MEMORY_XN));
119 }
120 }
121 }
122 }
123
124 /* Configure the MMU page entries for memory read from the
125 mmu_section_table */
126 for (i = 0; i < table_size; i++)
127 {
128 sections = mmu_section_table[i].num_of_sections;
129
130 while (sections--)
131 {
132 arm_mmu_map_section(mmu_section_table[i].paddress +
133 sections * MB,
134 mmu_section_table[i].vaddress +
135 sections * MB,
136 mmu_section_table[i].flags);
137 }
138 }
139}