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Travis Geiselbrecht1d0df692008-09-01 02:26:09 -07001/*
2 * Copyright (c) 2008 Travis Geiselbrecht
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining
5 * a copy of this software and associated documentation files
6 * (the "Software"), to deal in the Software without restriction,
7 * including without limitation the rights to use, copy, modify, merge,
8 * publish, distribute, sublicense, and/or sell copies of the Software,
9 * and to permit persons to whom the Software is furnished to do so,
10 * subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
18 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
19 * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
20 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
21 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23#ifndef __ARCH_ARM_H
24#define __ARCH_ARM_H
25
26#include <sys/types.h>
27#include <arch/arm/cores.h>
28
29#if defined(__cplusplus)
30extern "C" {
31#endif
32
33void arm_context_switch(vaddr_t *old_sp, vaddr_t new_sp);
34
35static inline uint32_t read_cpsr() {
36 uint32_t cpsr;
37
38 __asm__ volatile("mrs %0, cpsr" : "=r" (cpsr));
39 return cpsr;
40}
41
42struct arm_iframe {
43 uint32_t spsr;
44 uint32_t r0;
45 uint32_t r1;
46 uint32_t r2;
47 uint32_t r3;
48 uint32_t r12;
49 uint32_t lr;
50 uint32_t pc;
51};
52
53struct arm_fault_frame {
54 uint32_t spsr;
55 uint32_t usp;
56 uint32_t ulr;
57 uint32_t r[13];
58 uint32_t pc;
59};
60
61#define MODE_MASK 0x1f
62#define MODE_USR 0x10
63#define MODE_FIQ 0x11
64#define MODE_IRQ 0x12
65#define MODE_SVC 0x13
66#define MODE_MON 0x16
67#define MODE_ABT 0x17
68#define MODE_UND 0x1b
69#define MODE_SYS 0x1f
70
71struct arm_mode_regs {
72 uint32_t fiq_r13, fiq_r14;
73 uint32_t irq_r13, irq_r14;
74 uint32_t svc_r13, svc_r14;
75 uint32_t abt_r13, abt_r14;
76 uint32_t und_r13, und_r14;
77 uint32_t sys_r13, sys_r14;
78};
79
80void arm_save_mode_regs(struct arm_mode_regs *regs);
81
82uint32_t arm_read_cr1(void);
83void arm_write_cr1(uint32_t val);
84uint32_t arm_read_cr1_aux(void);
85void arm_write_cr1_aux(uint32_t val);
86void arm_write_ttbr(uint32_t val);
87void arm_write_dacr(uint32_t val);
88void arm_invalidate_tlb(void);
89
90#if defined(__cplusplus)
91}
92#endif
93
94#endif