Dima Zavin | 0f88be2 | 2009-01-20 19:25:50 -0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2008, Google Inc. |
| 3 | * All rights reserved. |
| 4 | * |
Chandan Uddaraju | 5fa471a | 2009-12-02 17:31:34 -0800 | [diff] [blame^] | 5 | * Copyright (c) 2009, Code Aurora Forum. All rights reserved. |
| 6 | * |
Dima Zavin | 0f88be2 | 2009-01-20 19:25:50 -0800 | [diff] [blame] | 7 | * Redistribution and use in source and binary forms, with or without |
| 8 | * modification, are permitted provided that the following conditions |
| 9 | * are met: |
| 10 | * * Redistributions of source code must retain the above copyright |
| 11 | * notice, this list of conditions and the following disclaimer. |
| 12 | * * Redistributions in binary form must reproduce the above copyright |
| 13 | * notice, this list of conditions and the following disclaimer in |
| 14 | * the documentation and/or other materials provided with the |
| 15 | * distribution. |
| 16 | * * Neither the name of Google, Inc. nor the names of its contributors |
| 17 | * may be used to endorse or promote products derived from this |
| 18 | * software without specific prior written permission. |
| 19 | * |
| 20 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
| 21 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
| 22 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
| 23 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
| 24 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 25 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
| 26 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS |
| 27 | * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED |
| 28 | * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| 29 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT |
| 30 | * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
| 31 | * SUCH DAMAGE. |
| 32 | */ |
| 33 | |
| 34 | #ifndef __DEV_GPIO_KEYPAD_H |
| 35 | #define __DEV_GPIO_KEYPAD_H |
| 36 | |
| 37 | #include <sys/types.h> |
| 38 | |
| 39 | /* unset: drive active output low, set: drive active output high */ |
| 40 | #define GPIOKPF_ACTIVE_HIGH (1U << 0) |
| 41 | #define GPIOKPF_DRIVE_INACTIVE (1U << 1) |
| 42 | |
| 43 | struct gpio_keypad_info { |
| 44 | /* size must be ninputs * noutputs */ |
| 45 | const uint16_t *keymap; |
| 46 | unsigned *input_gpios; |
| 47 | unsigned *output_gpios; |
| 48 | int ninputs; |
| 49 | int noutputs; |
| 50 | /* time to wait before reading inputs after driving each output */ |
| 51 | time_t settle_time; |
| 52 | time_t poll_time; |
| 53 | unsigned flags; |
| 54 | }; |
| 55 | |
| 56 | void gpio_keypad_init(struct gpio_keypad_info *kpinfo); |
| 57 | |
Chandan Uddaraju | 5fa471a | 2009-12-02 17:31:34 -0800 | [diff] [blame^] | 58 | //Macros for SSBI Qwerty keypad for 7x30 |
| 59 | |
| 60 | /* SSBI 2.0 controller registers */ |
| 61 | #define MSM_SSBI_BASE 0xAD900000 |
| 62 | #define SMEM_BASE 0x100000 |
| 63 | |
| 64 | #define SSBI_TIMEOUT_US 100 |
| 65 | |
| 66 | #define SSBI2_CTL 0x0000 |
| 67 | #define SSBI2_RESET 0x0004 |
| 68 | #define SSBI2_CMD 0x0008 |
| 69 | #define SSBI2_RD 0x0010 |
| 70 | #define SSBI2_STATUS 0x0014 |
| 71 | #define SSBI2_PRIORITIES 0x0018 |
| 72 | #define SSBI2_MODE2 0x001C |
| 73 | |
| 74 | /* SSBI_CMD fields */ |
| 75 | #define SSBI_CMD_SEND_TERM_SYM (0x01 << 27) |
| 76 | #define SSBI_CMD_WAKEUP_SLAVE (0x01 << 26) |
| 77 | #define SSBI_CMD_USE_ENABLE (0x01 << 25) |
| 78 | #define SSBI_CMD_RDWRN (0x01 << 24) |
| 79 | #define SSBI_CMD_REG_ADDR_SHFT (0x10) |
| 80 | #define SSBI_CMD_REG_ADDR_MASK (0xFF << SSBI_CMD_REG_ADDR_SHFT) |
| 81 | #define SSBI_CMD_REG_DATA_SHFT (0x00) |
| 82 | #define SSBI_CMD_REG_DATA_MASK (0xFF << SSBI_CMD_REG_DATA_SHFT) |
| 83 | |
| 84 | /* SSBI_STATUS fields */ |
| 85 | #define SSBI_STATUS_DATA_IN 0x10 |
| 86 | #define SSBI_STATUS_RD_CLOBBERED 0x08 |
| 87 | #define SSBI_STATUS_RD_READY 0x04 |
| 88 | #define SSBI_STATUS_READY 0x02 |
| 89 | #define SSBI_STATUS_MCHN_BUSY 0x01 |
| 90 | |
| 91 | /* SSBI_RD fields */ |
| 92 | #define SSBI_RD_USE_ENABLE 0x02000000 |
| 93 | #define SSBI_RD_RDWRN 0x01000000 |
| 94 | #define SSBI_RD_REG_ADDR_SHFT 0x10 |
| 95 | #define SSBI_RD_REG_ADDR_MASK (0xFF << SSBI_RD_REG_ADDR_SHFT) |
| 96 | #define SSBI_RD_REG_DATA_SHFT (0x00) |
| 97 | #define SSBI_RD_REG_DATA_MASK (0xFF << SSBI_RD_REG_DATA_SHFT) |
| 98 | |
| 99 | /* SSBI_MODE2 fields */ |
| 100 | #define SSBI_MODE2_REG_ADDR_15_8_SHFT 0x04 |
| 101 | #define SSBI_MODE2_REG_ADDR_15_8_MASK (0x7F << SSBI_MODE2_REG_ADDR_15_8_SHFT) |
| 102 | #define SSBI_MODE2_ADDR_WIDTH_SHFT 0x01 |
| 103 | #define SSBI_MODE2_ADDR_WIDTH_MASK (0x07 << SSBI_MODE2_ADDR_WIDTH_SHFT) |
| 104 | #define SSBI_MODE2_SSBI2_MODE 0x00000001 |
| 105 | |
| 106 | //Keypad controller configurations |
| 107 | #define SSBI_REG_KYPD_CNTL_ADDR 0x148 |
| 108 | #define SSBI_REG_KYPD_SCAN_ADDR 0x149 |
| 109 | #define SSBI_REG_KYPD_TEST_ADDR 0x14A |
| 110 | #define SSBI_REG_KYPD_REC_DATA_ADDR 0x14B |
| 111 | #define SSBI_REG_KYPD_OLD_DATA_ADDR 0x14C |
| 112 | |
| 113 | // GPIO configurations |
| 114 | |
| 115 | #define SSBI_REG_ADDR_GPIO_BASE 0x150 |
| 116 | #define SSBI_OFFSET_ADDR_GPIO_KYPD_SNS 0x000 |
| 117 | #define SSBI_OFFSET_ADDR_GPIO_KYPD_DRV 0x008 |
| 118 | #define SSBI_REG_ADDR_GPIO(n) (SSBI_REG_ADDR_GPIO_BASE + n) |
| 119 | |
| 120 | #define PM_GPIO_DIR_OUT 0x01 |
| 121 | #define PM_GPIO_DIR_IN 0x02 |
| 122 | #define PM_GPIO_DIR_BOTH (PM_GPIO_DIR_OUT | PM_GPIO_DIR_IN) |
| 123 | |
| 124 | #define PM_GPIO_PULL_UP1 2 |
| 125 | #define PM_GPIO_PULL_UP2 3 |
| 126 | #define PM_GPIO_PULL_DN 4 |
| 127 | #define PM_GPIO_PULL_NO 5 |
| 128 | |
| 129 | #define PM_GPIO_STRENGTH_NO 0 |
| 130 | #define PM_GPIO_STRENGTH_HIGH 1 |
| 131 | #define PM_GPIO_STRENGTH_MED 2 |
| 132 | #define PM_GPIO_STRENGTH_LOW 3 |
| 133 | |
| 134 | #define PM_GPIO_FUNC_NORMAL 0 |
| 135 | #define PM_GPIO_FUNC_PAIRED 1 |
| 136 | #define PM_GPIO_FUNC_1 2 |
| 137 | #define PM_GPIO_FUNC_2 3 |
| 138 | |
| 139 | #define PM8058_GPIO_BANK_MASK 0x70 |
| 140 | #define PM8058_GPIO_BANK_SHIFT 4 |
| 141 | #define PM8058_GPIO_WRITE 0x80 |
| 142 | |
| 143 | /* Bank 0 */ |
| 144 | #define PM8058_GPIO_VIN_MASK 0x0E |
| 145 | #define PM8058_GPIO_VIN_SHIFT 1 |
| 146 | #define PM8058_GPIO_MODE_ENABLE 0x01 |
| 147 | |
| 148 | /* Bank 1 */ |
| 149 | #define PM8058_GPIO_MODE_MASK 0x0C |
| 150 | #define PM8058_GPIO_MODE_SHIFT 2 |
| 151 | #define PM8058_GPIO_OUT_BUFFER 0x02 |
| 152 | #define PM8058_GPIO_OUT_INVERT 0x01 |
| 153 | |
| 154 | #define PM8058_GPIO_MODE_OFF 3 |
| 155 | #define PM8058_GPIO_MODE_OUTPUT 2 |
| 156 | #define PM8058_GPIO_MODE_INPUT 0 |
| 157 | #define PM8058_GPIO_MODE_BOTH 1 |
| 158 | |
| 159 | /* Bank 2 */ |
| 160 | #define PM8058_GPIO_PULL_MASK 0x0E |
| 161 | #define PM8058_GPIO_PULL_SHIFT 1 |
| 162 | |
| 163 | /* Bank 3 */ |
| 164 | #define PM8058_GPIO_OUT_STRENGTH_MASK 0x0C |
| 165 | #define PM8058_GPIO_OUT_STRENGTH_SHIFT 2 |
| 166 | |
| 167 | /* Bank 4 */ |
| 168 | #define PM8058_GPIO_FUNC_MASK 0x0E |
| 169 | #define PM8058_GPIO_FUNC_SHIFT 1 |
| 170 | |
| 171 | #define NUM_OF_SSBI_READS 15 |
| 172 | #define NUM_OF_KYPD_DRV_GPIOS 12 |
| 173 | #define NUM_OF_KYPD_SNS_GPIOS 8 |
| 174 | |
| 175 | struct pm8058_gpio { |
| 176 | int direction; |
| 177 | int pull; |
| 178 | int vin_sel; /* 0..7 */ |
| 179 | int out_strength; |
| 180 | int function; |
| 181 | int inv_int_pol; /* invert interrupt polarity */ |
| 182 | }; |
| 183 | |
| 184 | struct qwerty_keypad_info { |
| 185 | /* size must be ninputs * noutputs */ |
| 186 | unsigned int *keymap; |
| 187 | unsigned char *old_keys; |
| 188 | unsigned char *rec_keys; |
| 189 | unsigned int rows; |
| 190 | unsigned int columns; |
| 191 | /* time to wait before reading inputs after driving each output */ |
| 192 | time_t settle_time; |
| 193 | time_t poll_time; |
| 194 | unsigned flags; |
| 195 | }; |
| 196 | |
| 197 | #define SSBI_CMD_READ(AD) \ |
| 198 | (SSBI_CMD_RDWRN | (((AD) & 0xFF) << SSBI_CMD_REG_ADDR_SHFT)) |
| 199 | |
| 200 | #define SSBI_CMD_WRITE(AD, DT) \ |
| 201 | ((((AD) & 0xFF) << SSBI_CMD_REG_ADDR_SHFT) | \ |
| 202 | (((DT) & 0xFF) << SSBI_CMD_REG_DATA_SHFT)) |
| 203 | |
| 204 | #define SSBI_MODE2_REG_ADDR_15_8(MD, AD) \ |
| 205 | (((MD) & 0x0F) | ((((AD) >> 8) << SSBI_MODE2_REG_ADDR_15_8_SHFT) & \ |
| 206 | SSBI_MODE2_REG_ADDR_15_8_MASK)) |
| 207 | |
| 208 | void ssbi_keypad_init (struct qwerty_keypad_info *); |
| 209 | |
Dima Zavin | 0f88be2 | 2009-01-20 19:25:50 -0800 | [diff] [blame] | 210 | #endif /* __DEV_GPIO_KEYPAD_H */ |