Umang Chheda | 62f409f | 2019-10-30 17:37:56 +0530 | [diff] [blame^] | 1 | /* Copyright (c) 2015, 2019, The Linux Foundation. All rights reserved. |
| 2 | |
| 3 | * Redistribution and use in source and binary forms, with or without |
| 4 | * modification, are permitted provided that the following conditions are |
| 5 | * met: |
| 6 | * * Redistributions of source code must retain the above copyright |
| 7 | * notice, this list of conditions and the following disclaimer. |
| 8 | * * Redistributions in binary form must reproduce the above |
| 9 | * copyright notice, this list of conditions and the following |
| 10 | * disclaimer in the documentation and/or other materials provided |
| 11 | * with the distribution. |
| 12 | * * Neither the name of The Linux Foundation nor the names of its |
| 13 | * contributors may be used to endorse or promote products derived |
| 14 | * from this software without specific prior written permission. |
| 15 | * |
| 16 | * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED |
| 17 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| 18 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT |
| 19 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS |
| 20 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 21 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 22 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR |
| 23 | * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, |
| 24 | * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE |
| 25 | * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN |
| 26 | * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 27 | */ |
| 28 | |
| 29 | #include <bits.h> |
| 30 | #include <debug.h> |
| 31 | #include <stdlib.h> |
| 32 | #include <pm8x41.h> |
| 33 | #include <pm8x41_hw.h> |
| 34 | #include <qpnp-fg-gen3.h> |
| 35 | #include <reg.h> |
| 36 | |
| 37 | #define BATT_INFO_VBATT_LSB 0x41A0 |
| 38 | #define BATT_INFO_VBATT_MSB 0x41A1 |
| 39 | #define BATT_INFO_CURR_LSB 0x41A2 |
| 40 | #define BATT_INFO_CURR_MSB 0x41A3 |
| 41 | |
| 42 | #define BATT_VOLTAGE_NUMR 122070 |
| 43 | #define BATT_VOLTAGE_DENR 1000 |
| 44 | #define BATT_CURRENT_NUMR 488281 |
| 45 | #define BATT_CURRENT_DENR 1000 |
| 46 | |
| 47 | #define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d)) |
| 48 | |
| 49 | static int64_t twos_compliment_extend(int64_t val, int sign_bit_pos) |
| 50 | { |
| 51 | int i, nbytes = DIV_ROUND_UP(sign_bit_pos, 8); |
| 52 | int64_t mask, val_out; |
| 53 | |
| 54 | val_out = val; |
| 55 | mask = 1 << sign_bit_pos; |
| 56 | if (val & mask) { |
| 57 | for (i = 8; i > nbytes; i--) { |
| 58 | mask = 0xFFLL << ((i - 1) * 8); |
| 59 | val_out |= mask; |
| 60 | } |
| 61 | |
| 62 | if ((nbytes * 8) - 1 > sign_bit_pos) { |
| 63 | mask = 1 << sign_bit_pos; |
| 64 | for (i = 1; i <= (nbytes * 8) - sign_bit_pos; i++) |
| 65 | val_out |= mask << i; |
| 66 | } |
| 67 | } |
| 68 | |
| 69 | return val_out; |
| 70 | } |
| 71 | |
| 72 | uint32_t fg_gen3_get_battery_voltage(void) |
| 73 | { |
| 74 | uint8_t buff[2]; |
| 75 | uint16_t temp; |
| 76 | uint32_t vbat = 0; |
| 77 | |
| 78 | buff[0] = REG_READ(BATT_INFO_VBATT_LSB); |
| 79 | buff[1] = REG_READ(BATT_INFO_VBATT_MSB); |
| 80 | temp = buff[1] << 8 | buff[0]; |
| 81 | /* {MSB,LSB} to decode the voltage level, refer register description. */ |
| 82 | vbat = (((uint64_t)temp)*BATT_VOLTAGE_NUMR/BATT_VOLTAGE_DENR); |
| 83 | |
| 84 | return vbat; |
| 85 | } |
| 86 | |
| 87 | int fg_gen3_get_battery_current(void) |
| 88 | { |
| 89 | uint8_t buff[2]; |
| 90 | int current = 0; |
| 91 | int64_t temp = 0; |
| 92 | |
| 93 | buff[0] = REG_READ(BATT_INFO_CURR_LSB); |
| 94 | buff[1] = REG_READ(BATT_INFO_CURR_MSB); |
| 95 | temp = buff[1] << 8 | buff[0]; |
| 96 | /* Sign bit is bit 15 */ |
| 97 | temp = twos_compliment_extend(temp, 15); |
| 98 | current = (((int64_t)temp)*BATT_CURRENT_NUMR/BATT_CURRENT_DENR); |
| 99 | |
| 100 | return current; |
| 101 | } |