Ashish Garg | 4094dcc | 2017-05-24 12:55:53 +0530 | [diff] [blame] | 1 | /* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved. |
Padmanabhan Komanduru | 0104a89 | 2016-01-22 16:58:10 +0530 | [diff] [blame] | 2 | * |
| 3 | * Redistribution and use in source and binary forms, with or without |
| 4 | * modification, are permitted provided that the following conditions are |
| 5 | * met: |
| 6 | * * Redistributions of source code must retain the above copyright |
| 7 | * notice, this list of conditions and the following disclaimer. |
| 8 | * * Redistributions in binary form must reproduce the above |
| 9 | * copyright notice, this list of conditions and the following |
| 10 | * disclaimer in the documentation and/or other materials provided |
| 11 | * with the distribution. |
| 12 | * * Neither the name of The Linux Foundation nor the names of its |
| 13 | * contributors may be used to endorse or promote products derived |
| 14 | * from this software without specific prior written permission. |
| 15 | * |
| 16 | * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED |
| 17 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| 18 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT |
| 19 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS |
| 20 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 21 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 22 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR |
| 23 | * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, |
| 24 | * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE |
| 25 | * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN |
| 26 | * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 27 | * |
| 28 | */ |
| 29 | |
| 30 | |
| 31 | #include <debug.h> |
| 32 | #include <string.h> |
| 33 | #include <smem.h> |
| 34 | #include <err.h> |
| 35 | #include <msm_panel.h> |
| 36 | #include <mipi_dsi.h> |
| 37 | #include <pm8x41.h> |
| 38 | #include <pm8x41_wled.h> |
| 39 | #include <qpnp_wled.h> |
| 40 | #include <board.h> |
| 41 | #include <mdp5.h> |
| 42 | #include <scm.h> |
| 43 | #include <regulator.h> |
| 44 | #include <platform/clock.h> |
| 45 | #include <platform/gpio.h> |
| 46 | #include <platform/iomap.h> |
| 47 | #include <target/display.h> |
| 48 | #include <mipi_dsi_autopll_thulium.h> |
| 49 | #include <qtimer.h> |
| 50 | #include <platform.h> |
| 51 | |
| 52 | #include "include/panel.h" |
| 53 | #include "include/display_resource.h" |
| 54 | #include "gcdb_display.h" |
| 55 | |
Ashish Garg | 59607c5 | 2016-09-30 16:10:57 +0530 | [diff] [blame] | 56 | #define TRULY_1080P_VID_PANEL "truly_1080p_video" |
| 57 | #define TRULY_1080P_CMD_PANEL "truly_1080p_cmd" |
| 58 | |
| 59 | #define HDMI_ADV_PANEL_STRING "1:dsi:0:none:1:qcom,mdss_dsi_adv7533_1080p:cfg:single_dsi" |
| 60 | #define TRULY_VID_PANEL_STRING "1:dsi:0:qcom,mdss_dsi_truly_1080p_video:1:none:cfg:single_dsi" |
| 61 | #define TRULY_CMD_PANEL_STRING "1:dsi:0:qcom,mdss_dsi_truly_1080p_cmd:1:none:cfg:single_dsi" |
| 62 | |
Padmanabhan Komanduru | 0104a89 | 2016-01-22 16:58:10 +0530 | [diff] [blame] | 63 | #define MAX_POLL_READS 15 |
| 64 | #define POLL_TIMEOUT_US 1000 |
| 65 | #define STRENGTH_SIZE_IN_BYTES 10 |
| 66 | #define REGULATOR_SIZE_IN_BYTES 5 |
| 67 | #define LANE_SIZE_IN_BYTES 20 |
| 68 | /*---------------------------------------------------------------------------*/ |
| 69 | /* GPIO configuration */ |
| 70 | /*---------------------------------------------------------------------------*/ |
| 71 | static struct gpio_pin reset_gpio = { |
| 72 | "msmgpio", 61, 3, 1, 0, 1 |
| 73 | }; |
| 74 | |
| 75 | static struct gpio_pin bkl_gpio = { |
| 76 | "msmgpio", 59, 3, 1, 0, 1 |
| 77 | }; |
| 78 | |
Padmanabhan Komanduru | c2a81e9 | 2016-02-03 16:00:42 +0530 | [diff] [blame] | 79 | static struct gpio_pin enable_gpio = { |
| 80 | "msmgpio", 12, 3, 1, 0, 1 |
| 81 | }; |
| 82 | |
Padmanabhan Komanduru | 0104a89 | 2016-01-22 16:58:10 +0530 | [diff] [blame] | 83 | |
| 84 | #define VCO_DELAY_USEC 1000 |
| 85 | #define GPIO_STATE_LOW 0 |
| 86 | #define GPIO_STATE_HIGH 2 |
| 87 | #define RESET_GPIO_SEQ_LEN 3 |
| 88 | #define PMIC_WLED_SLAVE_ID 3 |
| 89 | |
| 90 | static uint32_t dsi_pll_lock_status(uint32_t pll_base, uint32_t off, |
| 91 | uint32_t bit) |
| 92 | { |
| 93 | uint32_t cnt, status; |
| 94 | |
| 95 | /* check pll lock first */ |
| 96 | for (cnt = 0; cnt < MAX_POLL_READS; cnt++) { |
| 97 | status = readl(pll_base + off); |
| 98 | dprintf(SPEW, "%s: pll_base=%x cnt=%d status=%x\n", |
| 99 | __func__, pll_base, cnt, status); |
| 100 | status &= BIT(bit); /* bit 5 */ |
| 101 | if (status) |
| 102 | break; |
| 103 | udelay(POLL_TIMEOUT_US); |
| 104 | } |
| 105 | |
| 106 | return status; |
| 107 | } |
| 108 | |
| 109 | static uint32_t dsi_pll_enable_seq(uint32_t phy_base, uint32_t pll_base) |
| 110 | { |
| 111 | uint32_t pll_locked; |
| 112 | |
| 113 | writel(0x10, phy_base + 0x45c); |
| 114 | writel(0x01, phy_base + 0x48); |
| 115 | |
| 116 | pll_locked = dsi_pll_lock_status(pll_base, 0xcc, 5); |
| 117 | if (pll_locked) |
| 118 | pll_locked = dsi_pll_lock_status(pll_base, 0xcc, 0); |
| 119 | |
| 120 | if (!pll_locked) |
| 121 | dprintf(ERROR, "%s: DSI PLL lock failed\n", __func__); |
| 122 | else |
| 123 | dprintf(SPEW, "%s: DSI PLL lock Success\n", __func__); |
| 124 | |
| 125 | return pll_locked; |
| 126 | } |
| 127 | |
| 128 | static int wled_backlight_ctrl(uint8_t enable) |
| 129 | { |
| 130 | uint8_t slave_id = PMIC_WLED_SLAVE_ID; /* pmi */ |
| 131 | |
| 132 | pm8x41_wled_config_slave_id(slave_id); |
| 133 | qpnp_wled_enable_backlight(enable); |
| 134 | qpnp_ibb_enable(enable); |
| 135 | return NO_ERROR; |
| 136 | } |
| 137 | |
| 138 | int target_backlight_ctrl(struct backlight *bl, uint8_t enable) |
| 139 | { |
| 140 | uint32_t ret = NO_ERROR; |
| 141 | |
| 142 | if (bl->bl_interface_type == BL_DCS) |
| 143 | return ret; |
| 144 | |
| 145 | ret = wled_backlight_ctrl(enable); |
| 146 | |
| 147 | return ret; |
| 148 | } |
| 149 | |
| 150 | |
| 151 | int target_panel_clock(uint8_t enable, struct msm_panel_info *pinfo) |
| 152 | { |
| 153 | int32_t ret = 0, flags, dsi_phy_pll_out; |
| 154 | struct dfps_pll_codes *pll_codes = &pinfo->mipi.pll_codes; |
| 155 | struct mdss_dsi_pll_config *pll_data; |
| 156 | dprintf(SPEW, "target_panel_clock\n"); |
| 157 | |
| 158 | pll_data = pinfo->mipi.dsi_pll_config; |
| 159 | |
| 160 | if (pinfo->dest == DISPLAY_2) { |
| 161 | flags = MMSS_DSI_CLKS_FLAG_DSI1; |
| 162 | if (pinfo->mipi.dual_dsi) |
| 163 | flags |= MMSS_DSI_CLKS_FLAG_DSI0; |
| 164 | } else { |
| 165 | flags = MMSS_DSI_CLKS_FLAG_DSI0; |
| 166 | if (pinfo->mipi.dual_dsi) |
| 167 | flags |= MMSS_DSI_CLKS_FLAG_DSI1; |
| 168 | } |
| 169 | |
| 170 | if (enable) { |
| 171 | mdp_gdsc_ctrl(enable); |
| 172 | mdss_bus_clocks_enable(); |
| 173 | mdp_clock_enable(); |
| 174 | ret = restore_secure_cfg(SECURE_DEVICE_MDSS); |
| 175 | if (ret) { |
| 176 | dprintf(CRITICAL, |
| 177 | "%s: Failed to restore MDP security configs", |
| 178 | __func__); |
| 179 | mdp_clock_disable(); |
| 180 | mdss_bus_clocks_disable(); |
| 181 | mdp_gdsc_ctrl(0); |
| 182 | return ret; |
| 183 | } |
| 184 | |
| 185 | mdss_dsi_auto_pll_thulium_config(pinfo); |
| 186 | |
| 187 | if (!dsi_pll_enable_seq(pinfo->mipi.phy_base, |
| 188 | pinfo->mipi.pll_base)) { |
| 189 | ret = ERROR; |
| 190 | dprintf(CRITICAL, "PLL failed to lock!\n"); |
| 191 | mmss_dsi_clock_disable(flags); |
| 192 | mdp_clock_disable(); |
| 193 | mdss_bus_clocks_disable(); |
| 194 | return ret; |
| 195 | } |
| 196 | |
| 197 | pll_codes->codes[0] = readl_relaxed(pinfo->mipi.pll_base + |
| 198 | MMSS_DSI_PHY_PLL_CORE_KVCO_CODE); |
| 199 | pll_codes->codes[1] = readl_relaxed(pinfo->mipi.pll_base + |
| 200 | MMSS_DSI_PHY_PLL_CORE_VCO_TUNE); |
| 201 | dprintf(SPEW, "codes %d %d\n", pll_codes->codes[0], |
| 202 | pll_codes->codes[1]); |
| 203 | |
| 204 | if (pinfo->mipi.use_dsi1_pll) |
| 205 | dsi_phy_pll_out = DSI1_PHY_PLL_OUT; |
| 206 | else |
| 207 | dsi_phy_pll_out = DSI0_PHY_PLL_OUT; |
| 208 | mmss_dsi_clock_enable(dsi_phy_pll_out, flags, |
| 209 | pll_data->pclk_m, pll_data->pclk_n, pll_data->pclk_d); |
| 210 | |
| 211 | } else if(!target_cont_splash_screen()) { |
| 212 | /* stop pll */ |
| 213 | writel(0x0, pinfo->mipi.phy_base + 0x48); |
| 214 | |
| 215 | mmss_dsi_clock_disable(flags); |
| 216 | mdp_clock_disable(); |
| 217 | mdss_bus_clocks_disable(); |
| 218 | mdp_gdsc_ctrl(enable); |
| 219 | } |
| 220 | |
| 221 | return 0; |
| 222 | |
| 223 | } |
| 224 | |
| 225 | int target_panel_reset(uint8_t enable, struct panel_reset_sequence *resetseq, |
| 226 | struct msm_panel_info *pinfo) |
| 227 | { |
| 228 | int ret = NO_ERROR; |
Mao Flynn | a80980c | 2016-03-03 09:46:31 +0800 | [diff] [blame] | 229 | uint32_t hw_id = board_hardware_id(); |
Padmanabhan Komanduru | 0104a89 | 2016-01-22 16:58:10 +0530 | [diff] [blame] | 230 | |
| 231 | if (enable) { |
| 232 | |
Padmanabhan Komanduru | c2a81e9 | 2016-02-03 16:00:42 +0530 | [diff] [blame] | 233 | if (pinfo->mipi.use_enable_gpio) { |
| 234 | gpio_tlmm_config(enable_gpio.pin_id, 0, |
| 235 | enable_gpio.pin_direction, enable_gpio.pin_pull, |
| 236 | enable_gpio.pin_strength, |
| 237 | enable_gpio.pin_state); |
| 238 | |
| 239 | gpio_set_dir(enable_gpio.pin_id, 2); |
| 240 | } |
| 241 | |
Mao Flynn | a80980c | 2016-03-03 09:46:31 +0800 | [diff] [blame] | 242 | if (hw_id != HW_PLATFORM_QRD) { |
| 243 | gpio_tlmm_config(bkl_gpio.pin_id, 0, |
Padmanabhan Komanduru | 0104a89 | 2016-01-22 16:58:10 +0530 | [diff] [blame] | 244 | bkl_gpio.pin_direction, bkl_gpio.pin_pull, |
| 245 | bkl_gpio.pin_strength, bkl_gpio.pin_state); |
| 246 | |
Mao Flynn | a80980c | 2016-03-03 09:46:31 +0800 | [diff] [blame] | 247 | gpio_set_dir(bkl_gpio.pin_id, 2); |
| 248 | } |
Padmanabhan Komanduru | 0104a89 | 2016-01-22 16:58:10 +0530 | [diff] [blame] | 249 | |
| 250 | gpio_tlmm_config(reset_gpio.pin_id, 0, |
| 251 | reset_gpio.pin_direction, reset_gpio.pin_pull, |
| 252 | reset_gpio.pin_strength, reset_gpio.pin_state); |
| 253 | |
| 254 | gpio_set_dir(reset_gpio.pin_id, 2); |
| 255 | |
| 256 | /* reset */ |
| 257 | for (int i = 0; i < RESET_GPIO_SEQ_LEN; i++) { |
| 258 | if (resetseq->pin_state[i] == GPIO_STATE_LOW) |
| 259 | gpio_set_dir(reset_gpio.pin_id, GPIO_STATE_LOW); |
| 260 | else |
| 261 | gpio_set_dir(reset_gpio.pin_id, GPIO_STATE_HIGH); |
| 262 | mdelay(resetseq->sleep[i]); |
| 263 | } |
| 264 | |
| 265 | } else if(!target_cont_splash_screen()) { |
| 266 | gpio_set_dir(reset_gpio.pin_id, 0); |
Padmanabhan Komanduru | c2a81e9 | 2016-02-03 16:00:42 +0530 | [diff] [blame] | 267 | gpio_set_dir(enable_gpio.pin_id, 0); |
Padmanabhan Komanduru | 0104a89 | 2016-01-22 16:58:10 +0530 | [diff] [blame] | 268 | } |
| 269 | |
| 270 | return ret; |
| 271 | } |
| 272 | |
| 273 | static void wled_init(struct msm_panel_info *pinfo) |
| 274 | { |
| 275 | struct qpnp_wled_config_data config = {0}; |
| 276 | struct labibb_desc *labibb; |
| 277 | int display_type = 0; |
P.V. Phani Kumar | 3dd859b | 2016-02-12 15:46:51 +0530 | [diff] [blame] | 278 | bool swire_control = 0; |
| 279 | bool wled_avdd_control = 0; |
Padmanabhan Komanduru | 0104a89 | 2016-01-22 16:58:10 +0530 | [diff] [blame] | 280 | |
| 281 | labibb = pinfo->labibb; |
| 282 | |
| 283 | if (labibb) |
| 284 | display_type = labibb->amoled_panel; |
| 285 | |
P.V. Phani Kumar | 3dd859b | 2016-02-12 15:46:51 +0530 | [diff] [blame] | 286 | if (display_type) { |
| 287 | swire_control = labibb->swire_control; |
| 288 | wled_avdd_control = true; |
| 289 | } else { |
| 290 | swire_control = false; |
| 291 | wled_avdd_control = false; |
| 292 | } |
| 293 | |
Padmanabhan Komanduru | 0104a89 | 2016-01-22 16:58:10 +0530 | [diff] [blame] | 294 | config.display_type = display_type; |
| 295 | config.lab_init_volt = 4600000; /* fixed, see pmi register */ |
| 296 | config.ibb_init_volt = 1400000; /* fixed, see pmi register */ |
P.V. Phani Kumar | 3dd859b | 2016-02-12 15:46:51 +0530 | [diff] [blame] | 297 | config.lab_ibb_swire_control = swire_control; |
| 298 | config.wled_avdd_control = wled_avdd_control; |
Padmanabhan Komanduru | 0104a89 | 2016-01-22 16:58:10 +0530 | [diff] [blame] | 299 | |
P.V. Phani Kumar | 3dd859b | 2016-02-12 15:46:51 +0530 | [diff] [blame] | 300 | if (!swire_control) { |
| 301 | if (labibb && labibb->force_config) { |
| 302 | config.lab_min_volt = labibb->lab_min_volt; |
| 303 | config.lab_max_volt = labibb->lab_max_volt; |
| 304 | config.ibb_min_volt = labibb->ibb_min_volt; |
| 305 | config.ibb_max_volt = labibb->ibb_max_volt; |
| 306 | config.pwr_up_delay = labibb->pwr_up_delay; |
| 307 | config.pwr_down_delay = labibb->pwr_down_delay; |
| 308 | config.ibb_discharge_en = labibb->ibb_discharge_en; |
| 309 | } else { |
| 310 | /* default */ |
| 311 | config.pwr_up_delay = 3; |
| 312 | config.pwr_down_delay = 3; |
| 313 | config.ibb_discharge_en = 1; |
| 314 | if (display_type) { /* amoled */ |
| 315 | config.lab_min_volt = 4600000; |
| 316 | config.lab_max_volt = 4600000; |
| 317 | config.ibb_min_volt = 4000000; |
| 318 | config.ibb_max_volt = 4000000; |
| 319 | } else { /* lcd */ |
| 320 | config.lab_min_volt = 5500000; |
| 321 | config.lab_max_volt = 5500000; |
| 322 | config.ibb_min_volt = 5500000; |
| 323 | config.ibb_max_volt = 5500000; |
| 324 | } |
Padmanabhan Komanduru | 0104a89 | 2016-01-22 16:58:10 +0530 | [diff] [blame] | 325 | } |
| 326 | } |
| 327 | |
| 328 | dprintf(SPEW, "%s: %d %d %d %d %d %d %d %d %d %d\n", __func__, |
| 329 | config.display_type, |
| 330 | config.lab_min_volt, config.lab_max_volt, |
| 331 | config.ibb_min_volt, config.ibb_max_volt, |
| 332 | config.lab_init_volt, config.ibb_init_volt, |
| 333 | config.pwr_up_delay, config.pwr_down_delay, |
| 334 | config.ibb_discharge_en); |
| 335 | |
| 336 | /* QPNP WLED init for display backlight */ |
| 337 | pm8x41_wled_config_slave_id(PMIC_WLED_SLAVE_ID); |
| 338 | |
| 339 | qpnp_wled_init(&config); |
| 340 | } |
| 341 | |
| 342 | int target_dsi_phy_config(struct mdss_dsi_phy_ctrl *phy_db) |
| 343 | { |
| 344 | memcpy(phy_db->strength, panel_strength_ctrl, STRENGTH_SIZE_IN_BYTES * |
| 345 | sizeof(uint32_t)); |
| 346 | memcpy(phy_db->regulator, panel_regulator_settings, |
| 347 | REGULATOR_SIZE_IN_BYTES * sizeof(uint32_t)); |
| 348 | memcpy(phy_db->laneCfg, panel_lane_config, LANE_SIZE_IN_BYTES); |
| 349 | return NO_ERROR; |
| 350 | } |
| 351 | |
| 352 | |
| 353 | int target_display_get_base_offset(uint32_t base) |
| 354 | { |
| 355 | return 0; |
| 356 | } |
| 357 | |
| 358 | int target_ldo_ctrl(uint8_t enable, struct msm_panel_info *pinfo) |
| 359 | { |
Mao Flynn | a80980c | 2016-03-03 09:46:31 +0800 | [diff] [blame] | 360 | uint32_t ldo_num = REG_LDO6 | REG_LDO3 | REG_SMPS3; |
| 361 | uint32_t hw_id = board_hardware_id(); |
Padmanabhan Komanduru | 0104a89 | 2016-01-22 16:58:10 +0530 | [diff] [blame] | 362 | |
| 363 | if (enable) { |
Mao Flynn | a80980c | 2016-03-03 09:46:31 +0800 | [diff] [blame] | 364 | if (hw_id != HW_PLATFORM_QRD) |
| 365 | ldo_num |= REG_LDO17; |
| 366 | |
Padmanabhan Komanduru | 0104a89 | 2016-01-22 16:58:10 +0530 | [diff] [blame] | 367 | regulator_enable(ldo_num); |
| 368 | mdelay(10); |
| 369 | wled_init(pinfo); |
| 370 | qpnp_ibb_enable(true); /*5V boost*/ |
| 371 | mdelay(50); |
| 372 | } else { |
| 373 | /* |
| 374 | * LDO6, LDO3 and SMPS3 are shared with other subsystems. |
| 375 | * Do not disable them. |
| 376 | */ |
Mao Flynn | a80980c | 2016-03-03 09:46:31 +0800 | [diff] [blame] | 377 | if (hw_id != HW_PLATFORM_QRD) |
| 378 | regulator_disable(REG_LDO17); |
Padmanabhan Komanduru | 0104a89 | 2016-01-22 16:58:10 +0530 | [diff] [blame] | 379 | } |
| 380 | |
| 381 | return NO_ERROR; |
| 382 | } |
| 383 | |
| 384 | bool target_display_panel_node(char *pbuf, uint16_t buf_size) |
| 385 | { |
Ashish Garg | 59607c5 | 2016-09-30 16:10:57 +0530 | [diff] [blame] | 386 | int prefix_string_len = strlen(DISPLAY_CMDLINE_PREFIX); |
| 387 | bool ret = true; |
| 388 | struct oem_panel_data oem = mdss_dsi_get_oem_data(); |
| 389 | uint32_t platform_subtype = board_hardware_subtype(); |
| 390 | |
Ashish Garg | 4094dcc | 2017-05-24 12:55:53 +0530 | [diff] [blame] | 391 | /* |
| 392 | * if disable config is passed irrespective of |
| 393 | * platform type, disable DSI controllers |
| 394 | */ |
| 395 | if (!strcmp(oem.panel, DISABLE_PANEL_CONFIG)) { |
| 396 | if (buf_size < (prefix_string_len + |
| 397 | strlen(DISABLE_PANEL_STRING))) { |
| 398 | dprintf(CRITICAL, "Disable command line argument \ |
| 399 | is greater than buffer size\n"); |
| 400 | return false; |
| 401 | } |
| 402 | strlcpy(pbuf, DISPLAY_CMDLINE_PREFIX, buf_size); |
| 403 | buf_size -= prefix_string_len; |
| 404 | pbuf += prefix_string_len; |
| 405 | strlcpy(pbuf, DISABLE_PANEL_STRING, buf_size); |
| 406 | } else if (platform_subtype == HW_PLATFORM_SUBTYPE_IOT) { |
| 407 | /* default to hdmi for apq iot */ |
Ashish Garg | 59607c5 | 2016-09-30 16:10:57 +0530 | [diff] [blame] | 408 | if (!strcmp(oem.panel, "")) { |
| 409 | if (buf_size < (prefix_string_len + |
| 410 | strlen(HDMI_ADV_PANEL_STRING))) { |
| 411 | dprintf(CRITICAL, "HDMI command line argument \ |
| 412 | is greater than buffer size\n"); |
| 413 | return false; |
| 414 | } |
| 415 | strlcpy(pbuf, DISPLAY_CMDLINE_PREFIX, buf_size); |
| 416 | buf_size -= prefix_string_len; |
| 417 | pbuf += prefix_string_len; |
| 418 | strlcpy(pbuf, HDMI_ADV_PANEL_STRING, buf_size); |
| 419 | } else if (!strcmp(oem.panel, TRULY_1080P_VID_PANEL)) { |
| 420 | if (buf_size < (prefix_string_len + |
| 421 | strlen(TRULY_VID_PANEL_STRING))) { |
| 422 | dprintf(CRITICAL, "TRULY VIDEO command line \ |
| 423 | argument is greater than \ |
| 424 | buffer size\n"); |
| 425 | return false; |
| 426 | } |
| 427 | strlcpy(pbuf, DISPLAY_CMDLINE_PREFIX, buf_size); |
| 428 | buf_size -= prefix_string_len; |
| 429 | pbuf += prefix_string_len; |
| 430 | strlcpy(pbuf, TRULY_VID_PANEL_STRING, buf_size); |
| 431 | } else if (!strcmp(oem.panel, TRULY_1080P_CMD_PANEL)) { |
| 432 | if (buf_size < (prefix_string_len + |
| 433 | strlen(TRULY_CMD_PANEL_STRING))) { |
| 434 | dprintf(CRITICAL, "TRULY CMD command line argument \ |
| 435 | argument is greater than \ |
| 436 | buffer size\n"); |
| 437 | return false; |
| 438 | } |
| 439 | strlcpy(pbuf, DISPLAY_CMDLINE_PREFIX, buf_size); |
| 440 | buf_size -= prefix_string_len; |
| 441 | pbuf += prefix_string_len; |
| 442 | strlcpy(pbuf, TRULY_CMD_PANEL_STRING, buf_size); |
| 443 | } |
| 444 | } else { |
| 445 | ret = gcdb_display_cmdline_arg(pbuf, buf_size); |
| 446 | } |
| 447 | |
| 448 | return ret; |
Padmanabhan Komanduru | 0104a89 | 2016-01-22 16:58:10 +0530 | [diff] [blame] | 449 | } |
| 450 | |
| 451 | void target_display_init(const char *panel_name) |
| 452 | { |
| 453 | struct oem_panel_data oem; |
| 454 | int32_t ret = 0; |
| 455 | uint32_t panel_loop = 0; |
Ashish Garg | 59607c5 | 2016-09-30 16:10:57 +0530 | [diff] [blame] | 456 | uint32_t platform_subtype = board_hardware_subtype(); |
Padmanabhan Komanduru | 0104a89 | 2016-01-22 16:58:10 +0530 | [diff] [blame] | 457 | |
| 458 | set_panel_cmd_string(panel_name); |
| 459 | oem = mdss_dsi_get_oem_data(); |
| 460 | |
| 461 | if (!strcmp(oem.panel, NO_PANEL_CONFIG) |
| 462 | || !strcmp(oem.panel, SIM_VIDEO_PANEL) |
Sandeep Panda | 45d8d0a | 2016-03-16 12:39:57 +0530 | [diff] [blame] | 463 | || !strcmp(oem.panel, SIM_DUALDSI_VIDEO_PANEL) |
Padmanabhan Komanduru | 0104a89 | 2016-01-22 16:58:10 +0530 | [diff] [blame] | 464 | || !strcmp(oem.panel, SIM_CMD_PANEL) |
Sandeep Panda | 45d8d0a | 2016-03-16 12:39:57 +0530 | [diff] [blame] | 465 | || !strcmp(oem.panel, SIM_DUALDSI_CMD_PANEL) |
Padmanabhan Komanduru | 0104a89 | 2016-01-22 16:58:10 +0530 | [diff] [blame] | 466 | || oem.skip) { |
| 467 | dprintf(INFO, "Selected panel: %s\nSkip panel configuration\n", |
| 468 | oem.panel); |
Sandeep Panda | 45d8d0a | 2016-03-16 12:39:57 +0530 | [diff] [blame] | 469 | oem.cont_splash = false; |
Padmanabhan Komanduru | 0104a89 | 2016-01-22 16:58:10 +0530 | [diff] [blame] | 470 | } |
| 471 | |
Ashish Garg | 4094dcc | 2017-05-24 12:55:53 +0530 | [diff] [blame] | 472 | /* skip splash screen completely not just cont splash */ |
| 473 | if ((platform_subtype == HW_PLATFORM_SUBTYPE_IOT) |
| 474 | || !strcmp(oem.panel, DISABLE_PANEL_CONFIG)) { |
Ashish Garg | 59607c5 | 2016-09-30 16:10:57 +0530 | [diff] [blame] | 475 | dprintf(INFO, "%s: Platform subtype %d\n", |
| 476 | __func__, platform_subtype); |
| 477 | return; |
| 478 | } |
| 479 | |
Padmanabhan Komanduru | 0104a89 | 2016-01-22 16:58:10 +0530 | [diff] [blame] | 480 | do { |
| 481 | target_force_cont_splash_disable(false); |
| 482 | ret = gcdb_display_init(oem.panel, MDP_REV_50, (void *)MIPI_FB_ADDR); |
| 483 | if (!ret || ret == ERR_NOT_SUPPORTED) { |
| 484 | break; |
| 485 | } else { |
| 486 | target_force_cont_splash_disable(true); |
| 487 | msm_display_off(); |
| 488 | } |
| 489 | } while (++panel_loop <= oem_panel_max_auto_detect_panels()); |
| 490 | |
| 491 | if (!oem.cont_splash) { |
| 492 | dprintf(INFO, "Forcing continuous splash disable\n"); |
| 493 | target_force_cont_splash_disable(true); |
| 494 | } |
| 495 | } |
| 496 | |
| 497 | void target_display_shutdown(void) |
| 498 | { |
| 499 | gcdb_display_shutdown(); |
| 500 | } |