Padmanabhan Komanduru | 0104a89 | 2016-01-22 16:58:10 +0530 | [diff] [blame] | 1 | /* Copyright (c) 2016, The Linux Foundation. All rights reserved. |
| 2 | * |
| 3 | * Redistribution and use in source and binary forms, with or without |
| 4 | * modification, are permitted provided that the following conditions are |
| 5 | * met: |
| 6 | * * Redistributions of source code must retain the above copyright |
| 7 | * notice, this list of conditions and the following disclaimer. |
| 8 | * * Redistributions in binary form must reproduce the above |
| 9 | * copyright notice, this list of conditions and the following |
| 10 | * disclaimer in the documentation and/or other materials provided |
| 11 | * with the distribution. |
| 12 | * * Neither the name of The Linux Foundation nor the names of its |
| 13 | * contributors may be used to endorse or promote products derived |
| 14 | * from this software without specific prior written permission. |
| 15 | * |
| 16 | * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED |
| 17 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| 18 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT |
| 19 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS |
| 20 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 21 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 22 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR |
| 23 | * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, |
| 24 | * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE |
| 25 | * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN |
| 26 | * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 27 | * |
| 28 | */ |
| 29 | |
| 30 | |
| 31 | #include <debug.h> |
| 32 | #include <string.h> |
| 33 | #include <smem.h> |
| 34 | #include <err.h> |
| 35 | #include <msm_panel.h> |
| 36 | #include <mipi_dsi.h> |
| 37 | #include <pm8x41.h> |
| 38 | #include <pm8x41_wled.h> |
| 39 | #include <qpnp_wled.h> |
| 40 | #include <board.h> |
| 41 | #include <mdp5.h> |
| 42 | #include <scm.h> |
| 43 | #include <regulator.h> |
| 44 | #include <platform/clock.h> |
| 45 | #include <platform/gpio.h> |
| 46 | #include <platform/iomap.h> |
| 47 | #include <target/display.h> |
| 48 | #include <mipi_dsi_autopll_thulium.h> |
| 49 | #include <qtimer.h> |
| 50 | #include <platform.h> |
| 51 | |
| 52 | #include "include/panel.h" |
| 53 | #include "include/display_resource.h" |
| 54 | #include "gcdb_display.h" |
| 55 | |
| 56 | #define MAX_POLL_READS 15 |
| 57 | #define POLL_TIMEOUT_US 1000 |
| 58 | #define STRENGTH_SIZE_IN_BYTES 10 |
| 59 | #define REGULATOR_SIZE_IN_BYTES 5 |
| 60 | #define LANE_SIZE_IN_BYTES 20 |
| 61 | /*---------------------------------------------------------------------------*/ |
| 62 | /* GPIO configuration */ |
| 63 | /*---------------------------------------------------------------------------*/ |
| 64 | static struct gpio_pin reset_gpio = { |
| 65 | "msmgpio", 61, 3, 1, 0, 1 |
| 66 | }; |
| 67 | |
| 68 | static struct gpio_pin bkl_gpio = { |
| 69 | "msmgpio", 59, 3, 1, 0, 1 |
| 70 | }; |
| 71 | |
Padmanabhan Komanduru | c2a81e9 | 2016-02-03 16:00:42 +0530 | [diff] [blame] | 72 | static struct gpio_pin enable_gpio = { |
| 73 | "msmgpio", 12, 3, 1, 0, 1 |
| 74 | }; |
| 75 | |
Padmanabhan Komanduru | 0104a89 | 2016-01-22 16:58:10 +0530 | [diff] [blame] | 76 | |
| 77 | #define VCO_DELAY_USEC 1000 |
| 78 | #define GPIO_STATE_LOW 0 |
| 79 | #define GPIO_STATE_HIGH 2 |
| 80 | #define RESET_GPIO_SEQ_LEN 3 |
| 81 | #define PMIC_WLED_SLAVE_ID 3 |
| 82 | |
| 83 | static uint32_t dsi_pll_lock_status(uint32_t pll_base, uint32_t off, |
| 84 | uint32_t bit) |
| 85 | { |
| 86 | uint32_t cnt, status; |
| 87 | |
| 88 | /* check pll lock first */ |
| 89 | for (cnt = 0; cnt < MAX_POLL_READS; cnt++) { |
| 90 | status = readl(pll_base + off); |
| 91 | dprintf(SPEW, "%s: pll_base=%x cnt=%d status=%x\n", |
| 92 | __func__, pll_base, cnt, status); |
| 93 | status &= BIT(bit); /* bit 5 */ |
| 94 | if (status) |
| 95 | break; |
| 96 | udelay(POLL_TIMEOUT_US); |
| 97 | } |
| 98 | |
| 99 | return status; |
| 100 | } |
| 101 | |
| 102 | static uint32_t dsi_pll_enable_seq(uint32_t phy_base, uint32_t pll_base) |
| 103 | { |
| 104 | uint32_t pll_locked; |
| 105 | |
| 106 | writel(0x10, phy_base + 0x45c); |
| 107 | writel(0x01, phy_base + 0x48); |
| 108 | |
| 109 | pll_locked = dsi_pll_lock_status(pll_base, 0xcc, 5); |
| 110 | if (pll_locked) |
| 111 | pll_locked = dsi_pll_lock_status(pll_base, 0xcc, 0); |
| 112 | |
| 113 | if (!pll_locked) |
| 114 | dprintf(ERROR, "%s: DSI PLL lock failed\n", __func__); |
| 115 | else |
| 116 | dprintf(SPEW, "%s: DSI PLL lock Success\n", __func__); |
| 117 | |
| 118 | return pll_locked; |
| 119 | } |
| 120 | |
| 121 | static int wled_backlight_ctrl(uint8_t enable) |
| 122 | { |
| 123 | uint8_t slave_id = PMIC_WLED_SLAVE_ID; /* pmi */ |
| 124 | |
| 125 | pm8x41_wled_config_slave_id(slave_id); |
| 126 | qpnp_wled_enable_backlight(enable); |
| 127 | qpnp_ibb_enable(enable); |
| 128 | return NO_ERROR; |
| 129 | } |
| 130 | |
| 131 | int target_backlight_ctrl(struct backlight *bl, uint8_t enable) |
| 132 | { |
| 133 | uint32_t ret = NO_ERROR; |
| 134 | |
| 135 | if (bl->bl_interface_type == BL_DCS) |
| 136 | return ret; |
| 137 | |
| 138 | ret = wled_backlight_ctrl(enable); |
| 139 | |
| 140 | return ret; |
| 141 | } |
| 142 | |
| 143 | |
| 144 | int target_panel_clock(uint8_t enable, struct msm_panel_info *pinfo) |
| 145 | { |
| 146 | int32_t ret = 0, flags, dsi_phy_pll_out; |
| 147 | struct dfps_pll_codes *pll_codes = &pinfo->mipi.pll_codes; |
| 148 | struct mdss_dsi_pll_config *pll_data; |
| 149 | dprintf(SPEW, "target_panel_clock\n"); |
| 150 | |
| 151 | pll_data = pinfo->mipi.dsi_pll_config; |
| 152 | |
| 153 | if (pinfo->dest == DISPLAY_2) { |
| 154 | flags = MMSS_DSI_CLKS_FLAG_DSI1; |
| 155 | if (pinfo->mipi.dual_dsi) |
| 156 | flags |= MMSS_DSI_CLKS_FLAG_DSI0; |
| 157 | } else { |
| 158 | flags = MMSS_DSI_CLKS_FLAG_DSI0; |
| 159 | if (pinfo->mipi.dual_dsi) |
| 160 | flags |= MMSS_DSI_CLKS_FLAG_DSI1; |
| 161 | } |
| 162 | |
| 163 | if (enable) { |
| 164 | mdp_gdsc_ctrl(enable); |
| 165 | mdss_bus_clocks_enable(); |
| 166 | mdp_clock_enable(); |
| 167 | ret = restore_secure_cfg(SECURE_DEVICE_MDSS); |
| 168 | if (ret) { |
| 169 | dprintf(CRITICAL, |
| 170 | "%s: Failed to restore MDP security configs", |
| 171 | __func__); |
| 172 | mdp_clock_disable(); |
| 173 | mdss_bus_clocks_disable(); |
| 174 | mdp_gdsc_ctrl(0); |
| 175 | return ret; |
| 176 | } |
| 177 | |
| 178 | mdss_dsi_auto_pll_thulium_config(pinfo); |
| 179 | |
| 180 | if (!dsi_pll_enable_seq(pinfo->mipi.phy_base, |
| 181 | pinfo->mipi.pll_base)) { |
| 182 | ret = ERROR; |
| 183 | dprintf(CRITICAL, "PLL failed to lock!\n"); |
| 184 | mmss_dsi_clock_disable(flags); |
| 185 | mdp_clock_disable(); |
| 186 | mdss_bus_clocks_disable(); |
| 187 | return ret; |
| 188 | } |
| 189 | |
| 190 | pll_codes->codes[0] = readl_relaxed(pinfo->mipi.pll_base + |
| 191 | MMSS_DSI_PHY_PLL_CORE_KVCO_CODE); |
| 192 | pll_codes->codes[1] = readl_relaxed(pinfo->mipi.pll_base + |
| 193 | MMSS_DSI_PHY_PLL_CORE_VCO_TUNE); |
| 194 | dprintf(SPEW, "codes %d %d\n", pll_codes->codes[0], |
| 195 | pll_codes->codes[1]); |
| 196 | |
| 197 | if (pinfo->mipi.use_dsi1_pll) |
| 198 | dsi_phy_pll_out = DSI1_PHY_PLL_OUT; |
| 199 | else |
| 200 | dsi_phy_pll_out = DSI0_PHY_PLL_OUT; |
| 201 | mmss_dsi_clock_enable(dsi_phy_pll_out, flags, |
| 202 | pll_data->pclk_m, pll_data->pclk_n, pll_data->pclk_d); |
| 203 | |
| 204 | } else if(!target_cont_splash_screen()) { |
| 205 | /* stop pll */ |
| 206 | writel(0x0, pinfo->mipi.phy_base + 0x48); |
| 207 | |
| 208 | mmss_dsi_clock_disable(flags); |
| 209 | mdp_clock_disable(); |
| 210 | mdss_bus_clocks_disable(); |
| 211 | mdp_gdsc_ctrl(enable); |
| 212 | } |
| 213 | |
| 214 | return 0; |
| 215 | |
| 216 | } |
| 217 | |
| 218 | int target_panel_reset(uint8_t enable, struct panel_reset_sequence *resetseq, |
| 219 | struct msm_panel_info *pinfo) |
| 220 | { |
| 221 | int ret = NO_ERROR; |
Mao Flynn | a80980c | 2016-03-03 09:46:31 +0800 | [diff] [blame] | 222 | uint32_t hw_id = board_hardware_id(); |
Padmanabhan Komanduru | 0104a89 | 2016-01-22 16:58:10 +0530 | [diff] [blame] | 223 | |
| 224 | if (enable) { |
| 225 | |
Padmanabhan Komanduru | c2a81e9 | 2016-02-03 16:00:42 +0530 | [diff] [blame] | 226 | if (pinfo->mipi.use_enable_gpio) { |
| 227 | gpio_tlmm_config(enable_gpio.pin_id, 0, |
| 228 | enable_gpio.pin_direction, enable_gpio.pin_pull, |
| 229 | enable_gpio.pin_strength, |
| 230 | enable_gpio.pin_state); |
| 231 | |
| 232 | gpio_set_dir(enable_gpio.pin_id, 2); |
| 233 | } |
| 234 | |
Mao Flynn | a80980c | 2016-03-03 09:46:31 +0800 | [diff] [blame] | 235 | if (hw_id != HW_PLATFORM_QRD) { |
| 236 | gpio_tlmm_config(bkl_gpio.pin_id, 0, |
Padmanabhan Komanduru | 0104a89 | 2016-01-22 16:58:10 +0530 | [diff] [blame] | 237 | bkl_gpio.pin_direction, bkl_gpio.pin_pull, |
| 238 | bkl_gpio.pin_strength, bkl_gpio.pin_state); |
| 239 | |
Mao Flynn | a80980c | 2016-03-03 09:46:31 +0800 | [diff] [blame] | 240 | gpio_set_dir(bkl_gpio.pin_id, 2); |
| 241 | } |
Padmanabhan Komanduru | 0104a89 | 2016-01-22 16:58:10 +0530 | [diff] [blame] | 242 | |
| 243 | gpio_tlmm_config(reset_gpio.pin_id, 0, |
| 244 | reset_gpio.pin_direction, reset_gpio.pin_pull, |
| 245 | reset_gpio.pin_strength, reset_gpio.pin_state); |
| 246 | |
| 247 | gpio_set_dir(reset_gpio.pin_id, 2); |
| 248 | |
| 249 | /* reset */ |
| 250 | for (int i = 0; i < RESET_GPIO_SEQ_LEN; i++) { |
| 251 | if (resetseq->pin_state[i] == GPIO_STATE_LOW) |
| 252 | gpio_set_dir(reset_gpio.pin_id, GPIO_STATE_LOW); |
| 253 | else |
| 254 | gpio_set_dir(reset_gpio.pin_id, GPIO_STATE_HIGH); |
| 255 | mdelay(resetseq->sleep[i]); |
| 256 | } |
| 257 | |
| 258 | } else if(!target_cont_splash_screen()) { |
| 259 | gpio_set_dir(reset_gpio.pin_id, 0); |
Padmanabhan Komanduru | c2a81e9 | 2016-02-03 16:00:42 +0530 | [diff] [blame] | 260 | gpio_set_dir(enable_gpio.pin_id, 0); |
Padmanabhan Komanduru | 0104a89 | 2016-01-22 16:58:10 +0530 | [diff] [blame] | 261 | } |
| 262 | |
| 263 | return ret; |
| 264 | } |
| 265 | |
| 266 | static void wled_init(struct msm_panel_info *pinfo) |
| 267 | { |
| 268 | struct qpnp_wled_config_data config = {0}; |
| 269 | struct labibb_desc *labibb; |
| 270 | int display_type = 0; |
P.V. Phani Kumar | 3dd859b | 2016-02-12 15:46:51 +0530 | [diff] [blame] | 271 | bool swire_control = 0; |
| 272 | bool wled_avdd_control = 0; |
Padmanabhan Komanduru | 0104a89 | 2016-01-22 16:58:10 +0530 | [diff] [blame] | 273 | |
| 274 | labibb = pinfo->labibb; |
| 275 | |
| 276 | if (labibb) |
| 277 | display_type = labibb->amoled_panel; |
| 278 | |
P.V. Phani Kumar | 3dd859b | 2016-02-12 15:46:51 +0530 | [diff] [blame] | 279 | if (display_type) { |
| 280 | swire_control = labibb->swire_control; |
| 281 | wled_avdd_control = true; |
| 282 | } else { |
| 283 | swire_control = false; |
| 284 | wled_avdd_control = false; |
| 285 | } |
| 286 | |
Padmanabhan Komanduru | 0104a89 | 2016-01-22 16:58:10 +0530 | [diff] [blame] | 287 | config.display_type = display_type; |
| 288 | config.lab_init_volt = 4600000; /* fixed, see pmi register */ |
| 289 | config.ibb_init_volt = 1400000; /* fixed, see pmi register */ |
P.V. Phani Kumar | 3dd859b | 2016-02-12 15:46:51 +0530 | [diff] [blame] | 290 | config.lab_ibb_swire_control = swire_control; |
| 291 | config.wled_avdd_control = wled_avdd_control; |
Padmanabhan Komanduru | 0104a89 | 2016-01-22 16:58:10 +0530 | [diff] [blame] | 292 | |
P.V. Phani Kumar | 3dd859b | 2016-02-12 15:46:51 +0530 | [diff] [blame] | 293 | if (!swire_control) { |
| 294 | if (labibb && labibb->force_config) { |
| 295 | config.lab_min_volt = labibb->lab_min_volt; |
| 296 | config.lab_max_volt = labibb->lab_max_volt; |
| 297 | config.ibb_min_volt = labibb->ibb_min_volt; |
| 298 | config.ibb_max_volt = labibb->ibb_max_volt; |
| 299 | config.pwr_up_delay = labibb->pwr_up_delay; |
| 300 | config.pwr_down_delay = labibb->pwr_down_delay; |
| 301 | config.ibb_discharge_en = labibb->ibb_discharge_en; |
| 302 | } else { |
| 303 | /* default */ |
| 304 | config.pwr_up_delay = 3; |
| 305 | config.pwr_down_delay = 3; |
| 306 | config.ibb_discharge_en = 1; |
| 307 | if (display_type) { /* amoled */ |
| 308 | config.lab_min_volt = 4600000; |
| 309 | config.lab_max_volt = 4600000; |
| 310 | config.ibb_min_volt = 4000000; |
| 311 | config.ibb_max_volt = 4000000; |
| 312 | } else { /* lcd */ |
| 313 | config.lab_min_volt = 5500000; |
| 314 | config.lab_max_volt = 5500000; |
| 315 | config.ibb_min_volt = 5500000; |
| 316 | config.ibb_max_volt = 5500000; |
| 317 | } |
Padmanabhan Komanduru | 0104a89 | 2016-01-22 16:58:10 +0530 | [diff] [blame] | 318 | } |
| 319 | } |
| 320 | |
| 321 | dprintf(SPEW, "%s: %d %d %d %d %d %d %d %d %d %d\n", __func__, |
| 322 | config.display_type, |
| 323 | config.lab_min_volt, config.lab_max_volt, |
| 324 | config.ibb_min_volt, config.ibb_max_volt, |
| 325 | config.lab_init_volt, config.ibb_init_volt, |
| 326 | config.pwr_up_delay, config.pwr_down_delay, |
| 327 | config.ibb_discharge_en); |
| 328 | |
| 329 | /* QPNP WLED init for display backlight */ |
| 330 | pm8x41_wled_config_slave_id(PMIC_WLED_SLAVE_ID); |
| 331 | |
| 332 | qpnp_wled_init(&config); |
| 333 | } |
| 334 | |
| 335 | int target_dsi_phy_config(struct mdss_dsi_phy_ctrl *phy_db) |
| 336 | { |
| 337 | memcpy(phy_db->strength, panel_strength_ctrl, STRENGTH_SIZE_IN_BYTES * |
| 338 | sizeof(uint32_t)); |
| 339 | memcpy(phy_db->regulator, panel_regulator_settings, |
| 340 | REGULATOR_SIZE_IN_BYTES * sizeof(uint32_t)); |
| 341 | memcpy(phy_db->laneCfg, panel_lane_config, LANE_SIZE_IN_BYTES); |
| 342 | return NO_ERROR; |
| 343 | } |
| 344 | |
| 345 | |
| 346 | int target_display_get_base_offset(uint32_t base) |
| 347 | { |
| 348 | return 0; |
| 349 | } |
| 350 | |
| 351 | int target_ldo_ctrl(uint8_t enable, struct msm_panel_info *pinfo) |
| 352 | { |
Mao Flynn | a80980c | 2016-03-03 09:46:31 +0800 | [diff] [blame] | 353 | uint32_t ldo_num = REG_LDO6 | REG_LDO3 | REG_SMPS3; |
| 354 | uint32_t hw_id = board_hardware_id(); |
Padmanabhan Komanduru | 0104a89 | 2016-01-22 16:58:10 +0530 | [diff] [blame] | 355 | |
| 356 | if (enable) { |
Mao Flynn | a80980c | 2016-03-03 09:46:31 +0800 | [diff] [blame] | 357 | if (hw_id != HW_PLATFORM_QRD) |
| 358 | ldo_num |= REG_LDO17; |
| 359 | |
Padmanabhan Komanduru | 0104a89 | 2016-01-22 16:58:10 +0530 | [diff] [blame] | 360 | regulator_enable(ldo_num); |
| 361 | mdelay(10); |
| 362 | wled_init(pinfo); |
| 363 | qpnp_ibb_enable(true); /*5V boost*/ |
| 364 | mdelay(50); |
| 365 | } else { |
| 366 | /* |
| 367 | * LDO6, LDO3 and SMPS3 are shared with other subsystems. |
| 368 | * Do not disable them. |
| 369 | */ |
Mao Flynn | a80980c | 2016-03-03 09:46:31 +0800 | [diff] [blame] | 370 | if (hw_id != HW_PLATFORM_QRD) |
| 371 | regulator_disable(REG_LDO17); |
Padmanabhan Komanduru | 0104a89 | 2016-01-22 16:58:10 +0530 | [diff] [blame] | 372 | } |
| 373 | |
| 374 | return NO_ERROR; |
| 375 | } |
| 376 | |
| 377 | bool target_display_panel_node(char *pbuf, uint16_t buf_size) |
| 378 | { |
| 379 | return gcdb_display_cmdline_arg(pbuf, buf_size); |
| 380 | } |
| 381 | |
| 382 | void target_display_init(const char *panel_name) |
| 383 | { |
| 384 | struct oem_panel_data oem; |
| 385 | int32_t ret = 0; |
| 386 | uint32_t panel_loop = 0; |
| 387 | |
| 388 | set_panel_cmd_string(panel_name); |
| 389 | oem = mdss_dsi_get_oem_data(); |
| 390 | |
| 391 | if (!strcmp(oem.panel, NO_PANEL_CONFIG) |
| 392 | || !strcmp(oem.panel, SIM_VIDEO_PANEL) |
| 393 | || !strcmp(oem.panel, SIM_CMD_PANEL) |
| 394 | || oem.skip) { |
| 395 | dprintf(INFO, "Selected panel: %s\nSkip panel configuration\n", |
| 396 | oem.panel); |
| 397 | return; |
| 398 | } |
| 399 | |
| 400 | do { |
| 401 | target_force_cont_splash_disable(false); |
| 402 | ret = gcdb_display_init(oem.panel, MDP_REV_50, (void *)MIPI_FB_ADDR); |
| 403 | if (!ret || ret == ERR_NOT_SUPPORTED) { |
| 404 | break; |
| 405 | } else { |
| 406 | target_force_cont_splash_disable(true); |
| 407 | msm_display_off(); |
| 408 | } |
| 409 | } while (++panel_loop <= oem_panel_max_auto_detect_panels()); |
| 410 | |
| 411 | if (!oem.cont_splash) { |
| 412 | dprintf(INFO, "Forcing continuous splash disable\n"); |
| 413 | target_force_cont_splash_disable(true); |
| 414 | } |
| 415 | } |
| 416 | |
| 417 | void target_display_shutdown(void) |
| 418 | { |
| 419 | gcdb_display_shutdown(); |
| 420 | } |