Deepa Dinamani | 0e5038f | 2013-05-16 15:02:16 -0700 | [diff] [blame] | 1 | /* Copyright (c) 2013, The Linux Foundation. All rights reserved. |
| 2 | * |
| 3 | * Redistribution and use in source and binary forms, with or without |
| 4 | * modification, are permitted provided that the following conditions are |
| 5 | * met: |
| 6 | * * Redistributions of source code must retain the above copyright |
| 7 | * notice, this list of conditions and the following disclaimer. |
| 8 | * * Redistributions in binary form must reproduce the above |
| 9 | * copyright notice, this list of conditions and the following |
| 10 | * disclaimer in the documentation and/or other materials provided |
| 11 | * with the distribution. |
| 12 | * * Neither the name of The Linux Foundation nor the names of its |
| 13 | * contributors may be used to endorse or promote products derived |
| 14 | * from this software without specific prior written permission. |
| 15 | * |
| 16 | * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED |
| 17 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| 18 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT |
| 19 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS |
| 20 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 21 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 22 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR |
| 23 | * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, |
| 24 | * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE |
| 25 | * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN |
| 26 | * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 27 | */ |
| 28 | |
| 29 | #include <debug.h> |
| 30 | #include <platform/iomap.h> |
Sundarajan Srinivasan | f7ef47f | 2013-09-05 17:46:24 -0700 | [diff] [blame] | 31 | #include <platform/irqs.h> |
Deepa Dinamani | 0e5038f | 2013-05-16 15:02:16 -0700 | [diff] [blame] | 32 | #include <platform/gpio.h> |
| 33 | #include <reg.h> |
| 34 | #include <target.h> |
| 35 | #include <platform.h> |
| 36 | #include <dload_util.h> |
| 37 | #include <uart_dm.h> |
| 38 | #include <mmc.h> |
| 39 | #include <spmi.h> |
| 40 | #include <board.h> |
| 41 | #include <smem.h> |
| 42 | #include <baseband.h> |
| 43 | #include <dev/keys.h> |
| 44 | #include <pm8x41.h> |
| 45 | #include <crypto5_wrapper.h> |
| 46 | #include <hsusb.h> |
| 47 | #include <clock.h> |
| 48 | #include <partition_parser.h> |
| 49 | #include <scm.h> |
| 50 | #include <platform/clock.h> |
| 51 | #include <platform/gpio.h> |
Sundarajan Srinivasan | f7ef47f | 2013-09-05 17:46:24 -0700 | [diff] [blame] | 52 | #include <platform/timer.h> |
Deepa Dinamani | 0e5038f | 2013-05-16 15:02:16 -0700 | [diff] [blame] | 53 | #include <stdlib.h> |
Channagoud Kadabi | 415a702 | 2013-09-11 10:48:40 -0700 | [diff] [blame] | 54 | #include <ufs.h> |
Deepa Dinamani | 0e5038f | 2013-05-16 15:02:16 -0700 | [diff] [blame] | 55 | |
Sundarajan Srinivasan | d43b28b | 2013-06-25 16:59:13 -0700 | [diff] [blame] | 56 | #define PMIC_ARB_CHANNEL_NUM 0 |
| 57 | #define PMIC_ARB_OWNER_ID 0 |
| 58 | |
| 59 | #define FASTBOOT_MODE 0x77665500 |
| 60 | |
Sundarajan Srinivasan | 4161b7e | 2013-09-10 13:55:31 -0700 | [diff] [blame] | 61 | #define BOOT_DEVICE_MASK(val) ((val & 0x3E) >>1) |
| 62 | |
Ameya Thakur | cfca921 | 2013-09-13 23:51:49 -0700 | [diff] [blame] | 63 | enum cdp_subtype |
| 64 | { |
| 65 | CDP_SUBTYPE_SMB349 = 0, |
| 66 | CDP_SUBTYPE_9x25_SMB349, |
| 67 | CDP_SUBTYPE_9x25_SMB1357, |
| 68 | CDP_SUBTYPE_9x35, |
| 69 | CDP_SUBTYPE_SMB1357 |
| 70 | }; |
Sundarajan Srinivasan | f7ef47f | 2013-09-05 17:46:24 -0700 | [diff] [blame] | 71 | |
Ameya Thakur | cfca921 | 2013-09-13 23:51:49 -0700 | [diff] [blame] | 72 | enum mtp_subtype |
| 73 | { |
| 74 | MTP_SUBTYPE_SMB349 = 0, |
| 75 | MTP_SUBTYPE_9x25_SMB349, |
| 76 | MTP_SUBTYPE_9x25_SMB1357, |
| 77 | MTP_SUBTYPE_9x35, |
| 78 | }; |
| 79 | |
| 80 | enum rcm_subtype |
| 81 | { |
| 82 | RCM_SUBTYPE_SMB349 = 0, |
| 83 | RCM_SUBTYPE_9x25_SMB349, |
| 84 | RCM_SUBTYPE_9x25_SMB1357, |
| 85 | RCM_SUBTYPE_9x35, |
| 86 | RCM_SUBTYPE_SMB1357, |
| 87 | }; |
| 88 | |
| 89 | static void set_sdc_power_ctrl(void); |
Sundarajan Srinivasan | f7ef47f | 2013-09-05 17:46:24 -0700 | [diff] [blame] | 90 | static uint32_t mmc_pwrctl_base[] = |
| 91 | { MSM_SDC1_BASE, MSM_SDC2_BASE }; |
| 92 | |
| 93 | static uint32_t mmc_sdhci_base[] = |
| 94 | { MSM_SDC1_SDHCI_BASE, MSM_SDC2_SDHCI_BASE }; |
| 95 | |
| 96 | static uint32_t mmc_sdc_pwrctl_irq[] = |
| 97 | { SDCC1_PWRCTL_IRQ, SDCC2_PWRCTL_IRQ }; |
| 98 | |
| 99 | struct mmc_device *dev; |
Channagoud Kadabi | 415a702 | 2013-09-11 10:48:40 -0700 | [diff] [blame] | 100 | struct ufs_dev ufs_device; |
Deepa Dinamani | 0e5038f | 2013-05-16 15:02:16 -0700 | [diff] [blame] | 101 | |
Sundarajan Srinivasan | d43b28b | 2013-06-25 16:59:13 -0700 | [diff] [blame] | 102 | extern void ulpi_write(unsigned val, unsigned reg); |
| 103 | |
Deepa Dinamani | 0e5038f | 2013-05-16 15:02:16 -0700 | [diff] [blame] | 104 | void target_early_init(void) |
| 105 | { |
| 106 | #if WITH_DEBUG_UART |
Sundarajan Srinivasan | d8b7c6f | 2013-09-13 16:50:22 -0700 | [diff] [blame] | 107 | uart_dm_init(7, 0, BLSP2_UART1_BASE); |
Deepa Dinamani | 0e5038f | 2013-05-16 15:02:16 -0700 | [diff] [blame] | 108 | #endif |
| 109 | } |
| 110 | |
| 111 | /* Return 1 if vol_up pressed */ |
| 112 | static int target_volume_up() |
| 113 | { |
Sundarajan Srinivasan | d43b28b | 2013-06-25 16:59:13 -0700 | [diff] [blame] | 114 | uint8_t status = 0; |
| 115 | struct pm8x41_gpio gpio; |
| 116 | |
| 117 | /* Configure the GPIO */ |
| 118 | gpio.direction = PM_GPIO_DIR_IN; |
| 119 | gpio.function = 0; |
| 120 | gpio.pull = PM_GPIO_PULL_UP_30; |
| 121 | gpio.vin_sel = 2; |
| 122 | |
| 123 | pm8x41_gpio_config(2, &gpio); |
| 124 | |
| 125 | /* Get status of P_GPIO_2 */ |
| 126 | pm8x41_gpio_get(2, &status); |
| 127 | |
| 128 | return !status; /* active low */ |
Deepa Dinamani | 0e5038f | 2013-05-16 15:02:16 -0700 | [diff] [blame] | 129 | } |
| 130 | |
| 131 | /* Return 1 if vol_down pressed */ |
| 132 | uint32_t target_volume_down() |
| 133 | { |
Sundarajan Srinivasan | d43b28b | 2013-06-25 16:59:13 -0700 | [diff] [blame] | 134 | return pm8x41_resin_status(); |
Deepa Dinamani | 0e5038f | 2013-05-16 15:02:16 -0700 | [diff] [blame] | 135 | } |
| 136 | |
| 137 | static void target_keystatus() |
| 138 | { |
| 139 | keys_init(); |
| 140 | |
| 141 | if(target_volume_down()) |
| 142 | keys_post_event(KEY_VOLUMEDOWN, 1); |
| 143 | |
| 144 | if(target_volume_up()) |
| 145 | keys_post_event(KEY_VOLUMEUP, 1); |
| 146 | } |
| 147 | |
David Ng | 4c2e86d | 2013-09-15 22:03:37 -0700 | [diff] [blame] | 148 | void target_uninit(void) |
| 149 | { |
| 150 | mmc_put_card_to_sleep(dev); |
| 151 | } |
| 152 | |
Sundarajan Srinivasan | d43b28b | 2013-06-25 16:59:13 -0700 | [diff] [blame] | 153 | /* Do target specific usb initialization */ |
| 154 | void target_usb_init(void) |
| 155 | { |
| 156 | uint32_t val; |
| 157 | |
| 158 | /* Select and enable external configuration with USB PHY */ |
| 159 | ulpi_write(ULPI_MISC_A_VBUSVLDEXTSEL | ULPI_MISC_A_VBUSVLDEXT, ULPI_MISC_A_SET); |
| 160 | |
| 161 | /* Enable sess_vld */ |
| 162 | val = readl(USB_GENCONFIG_2) | GEN2_SESS_VLD_CTRL_EN; |
| 163 | writel(val, USB_GENCONFIG_2); |
| 164 | |
| 165 | /* Enable external vbus configuration in the LINK */ |
| 166 | val = readl(USB_USBCMD); |
| 167 | val |= SESS_VLD_CTRL; |
| 168 | writel(val, USB_USBCMD); |
| 169 | } |
| 170 | |
| 171 | void target_usb_stop(void) |
| 172 | { |
| 173 | /* Disable VBUS mimicing in the controller. */ |
| 174 | ulpi_write(ULPI_MISC_A_VBUSVLDEXTSEL | ULPI_MISC_A_VBUSVLDEXT, ULPI_MISC_A_CLEAR); |
| 175 | } |
| 176 | |
Deepa Dinamani | 0e5038f | 2013-05-16 15:02:16 -0700 | [diff] [blame] | 177 | static void set_sdc_power_ctrl() |
| 178 | { |
| 179 | /* Drive strength configs for sdc pins */ |
| 180 | struct tlmm_cfgs sdc1_hdrv_cfg[] = |
| 181 | { |
| 182 | { SDC1_CLK_HDRV_CTL_OFF, TLMM_CUR_VAL_16MA, TLMM_HDRV_MASK }, |
| 183 | { SDC1_CMD_HDRV_CTL_OFF, TLMM_CUR_VAL_10MA, TLMM_HDRV_MASK }, |
| 184 | { SDC1_DATA_HDRV_CTL_OFF, TLMM_CUR_VAL_10MA, TLMM_HDRV_MASK }, |
| 185 | }; |
| 186 | |
| 187 | /* Pull configs for sdc pins */ |
| 188 | struct tlmm_cfgs sdc1_pull_cfg[] = |
| 189 | { |
| 190 | { SDC1_CLK_PULL_CTL_OFF, TLMM_NO_PULL, TLMM_PULL_MASK }, |
| 191 | { SDC1_CMD_PULL_CTL_OFF, TLMM_PULL_UP, TLMM_PULL_MASK }, |
| 192 | { SDC1_DATA_PULL_CTL_OFF, TLMM_PULL_UP, TLMM_PULL_MASK }, |
| 193 | }; |
| 194 | |
| 195 | /* Set the drive strength & pull control values */ |
| 196 | tlmm_set_hdrive_ctrl(sdc1_hdrv_cfg, ARRAY_SIZE(sdc1_hdrv_cfg)); |
| 197 | tlmm_set_pull_ctrl(sdc1_pull_cfg, ARRAY_SIZE(sdc1_pull_cfg)); |
| 198 | } |
| 199 | |
Sundarajan Srinivasan | f7ef47f | 2013-09-05 17:46:24 -0700 | [diff] [blame] | 200 | void target_sdc_init() |
| 201 | { |
| 202 | struct mmc_config_data config; |
| 203 | |
| 204 | /* Set drive strength & pull ctrl values */ |
| 205 | set_sdc_power_ctrl(); |
| 206 | |
| 207 | config.bus_width = DATA_BUS_WIDTH_8BIT; |
| 208 | config.max_clk_rate = MMC_CLK_200MHZ; |
| 209 | |
| 210 | /* Try slot 1*/ |
| 211 | config.slot = 1; |
| 212 | config.sdhc_base = mmc_sdhci_base[config.slot - 1]; |
| 213 | config.pwrctl_base = mmc_pwrctl_base[config.slot - 1]; |
| 214 | config.pwr_irq = mmc_sdc_pwrctl_irq[config.slot - 1]; |
| 215 | |
| 216 | if (!(dev = mmc_init(&config))) |
| 217 | { |
| 218 | /* Try slot 2 */ |
| 219 | config.slot = 2; |
| 220 | config.sdhc_base = mmc_sdhci_base[config.slot - 1]; |
| 221 | config.pwrctl_base = mmc_pwrctl_base[config.slot - 1]; |
| 222 | config.pwr_irq = mmc_sdc_pwrctl_irq[config.slot - 1]; |
| 223 | |
| 224 | if (!(dev = mmc_init(&config))) |
| 225 | { |
| 226 | dprintf(CRITICAL, "mmc init failed!"); |
| 227 | ASSERT(0); |
| 228 | } |
| 229 | } |
Sundarajan Srinivasan | f7ef47f | 2013-09-05 17:46:24 -0700 | [diff] [blame] | 230 | } |
| 231 | |
Sundarajan Srinivasan | 4161b7e | 2013-09-10 13:55:31 -0700 | [diff] [blame] | 232 | static uint32_t boot_device; |
| 233 | static uint32_t target_read_boot_config() |
| 234 | { |
| 235 | uint32_t val; |
| 236 | |
| 237 | val = readl(BOOT_CONFIG_REG); |
| 238 | |
| 239 | val = BOOT_DEVICE_MASK(val); |
| 240 | |
| 241 | return val; |
| 242 | } |
| 243 | |
| 244 | uint32_t target_get_boot_device() |
| 245 | { |
| 246 | return boot_device; |
| 247 | } |
| 248 | |
Channagoud Kadabi | 415a702 | 2013-09-11 10:48:40 -0700 | [diff] [blame] | 249 | /* |
| 250 | * Return 1 if boot from emmc else 0 |
| 251 | */ |
| 252 | uint32_t target_boot_device_emmc() |
Sundarajan Srinivasan | f7ef47f | 2013-09-05 17:46:24 -0700 | [diff] [blame] | 253 | { |
Channagoud Kadabi | 415a702 | 2013-09-11 10:48:40 -0700 | [diff] [blame] | 254 | uint32_t boot_dev_type; |
| 255 | |
Sundarajan Srinivasan | 4161b7e | 2013-09-10 13:55:31 -0700 | [diff] [blame] | 256 | boot_dev_type = target_get_boot_device(); |
Channagoud Kadabi | 415a702 | 2013-09-11 10:48:40 -0700 | [diff] [blame] | 257 | |
| 258 | if (boot_dev_type == BOOT_EMMC || boot_dev_type == BOOT_DEFAULT) |
| 259 | boot_dev_type = 1; |
| 260 | else |
| 261 | boot_dev_type = 0; |
| 262 | |
| 263 | return boot_dev_type; |
| 264 | } |
| 265 | |
| 266 | void *target_mmc_device() |
| 267 | { |
| 268 | if (target_boot_device_emmc()) |
| 269 | return (void *) dev; |
| 270 | else |
| 271 | return (void *) &ufs_device; |
Sundarajan Srinivasan | f7ef47f | 2013-09-05 17:46:24 -0700 | [diff] [blame] | 272 | } |
| 273 | |
Deepa Dinamani | 0e5038f | 2013-05-16 15:02:16 -0700 | [diff] [blame] | 274 | void target_init(void) |
| 275 | { |
| 276 | dprintf(INFO, "target_init()\n"); |
| 277 | |
Sundarajan Srinivasan | d43b28b | 2013-06-25 16:59:13 -0700 | [diff] [blame] | 278 | spmi_init(PMIC_ARB_CHANNEL_NUM, PMIC_ARB_OWNER_ID); |
| 279 | |
Deepa Dinamani | 0e5038f | 2013-05-16 15:02:16 -0700 | [diff] [blame] | 280 | target_keystatus(); |
| 281 | |
Sundarajan Srinivasan | 4161b7e | 2013-09-10 13:55:31 -0700 | [diff] [blame] | 282 | boot_device = target_read_boot_config(); |
| 283 | |
Channagoud Kadabi | 415a702 | 2013-09-11 10:48:40 -0700 | [diff] [blame] | 284 | if (target_boot_device_emmc()) |
| 285 | target_sdc_init(); |
| 286 | else |
| 287 | { |
| 288 | ufs_device.base = UFS_BASE; |
| 289 | ufs_init(&ufs_device); |
| 290 | } |
| 291 | |
| 292 | /* Storage initialization is complete, read the partition table info */ |
| 293 | if (partition_read_table()) |
| 294 | { |
| 295 | dprintf(CRITICAL, "Error reading the partition table info\n"); |
| 296 | ASSERT(0); |
| 297 | } |
| 298 | |
Dhaval Patel | f998627 | 2013-10-18 19:06:05 -0700 | [diff] [blame] | 299 | /* Display splash screen if enabled */ |
| 300 | #if DISPLAY_SPLASH_SCREEN |
| 301 | dprintf(INFO, "Display Init: Start\n"); |
| 302 | display_init(); |
| 303 | dprintf(INFO, "Display Init: Done\n"); |
| 304 | #endif |
Deepa Dinamani | 0e5038f | 2013-05-16 15:02:16 -0700 | [diff] [blame] | 305 | } |
| 306 | |
| 307 | unsigned board_machtype(void) |
| 308 | { |
| 309 | return LINUX_MACHTYPE_UNKNOWN; |
| 310 | } |
| 311 | |
Deepa Dinamani | 0e5038f | 2013-05-16 15:02:16 -0700 | [diff] [blame] | 312 | /* Detect the target type */ |
| 313 | void target_detect(struct board_data *board) |
| 314 | { |
| 315 | board->target = LINUX_MACHTYPE_UNKNOWN; |
| 316 | } |
| 317 | |
Ameya Thakur | cfca921 | 2013-09-13 23:51:49 -0700 | [diff] [blame] | 318 | void set_cdp_baseband(struct board_data *board) |
| 319 | { |
| 320 | |
| 321 | uint32_t platform_subtype; |
| 322 | platform_subtype = board->platform_subtype; |
| 323 | |
| 324 | switch(platform_subtype) { |
| 325 | case CDP_SUBTYPE_9x25_SMB349: |
| 326 | case CDP_SUBTYPE_9x25_SMB1357: |
| 327 | case CDP_SUBTYPE_9x35: |
| 328 | board->baseband = BASEBAND_MDM; |
| 329 | break; |
| 330 | case CDP_SUBTYPE_SMB349: |
| 331 | case CDP_SUBTYPE_SMB1357: |
| 332 | board->baseband = BASEBAND_APQ; |
| 333 | break; |
| 334 | default: |
| 335 | dprintf(CRITICAL, "CDP platform subtype :%u is not supported\n", |
| 336 | platform_subtype); |
| 337 | ASSERT(0); |
| 338 | }; |
| 339 | |
| 340 | } |
| 341 | |
| 342 | void set_mtp_baseband(struct board_data *board) |
| 343 | { |
| 344 | |
| 345 | uint32_t platform_subtype; |
| 346 | platform_subtype = board->platform_subtype; |
| 347 | |
| 348 | switch(platform_subtype) { |
| 349 | case MTP_SUBTYPE_9x25_SMB349: |
| 350 | case MTP_SUBTYPE_9x25_SMB1357: |
| 351 | case MTP_SUBTYPE_9x35: |
| 352 | board->baseband = BASEBAND_MDM; |
| 353 | break; |
| 354 | case MTP_SUBTYPE_SMB349: |
| 355 | board->baseband = BASEBAND_APQ; |
| 356 | break; |
| 357 | default: |
| 358 | dprintf(CRITICAL, "MTP platform subtype :%u is not supported\n", |
| 359 | platform_subtype); |
| 360 | ASSERT(0); |
| 361 | }; |
| 362 | } |
| 363 | |
| 364 | void set_rcm_baseband(struct board_data *board) |
| 365 | { |
| 366 | uint32_t platform_subtype; |
| 367 | platform_subtype = board->platform_subtype; |
| 368 | |
| 369 | switch(platform_subtype) { |
| 370 | case RCM_SUBTYPE_9x25_SMB349: |
| 371 | case RCM_SUBTYPE_9x25_SMB1357: |
| 372 | case RCM_SUBTYPE_9x35: |
| 373 | board->baseband = BASEBAND_MDM; |
| 374 | break; |
| 375 | case RCM_SUBTYPE_SMB349: |
| 376 | case RCM_SUBTYPE_SMB1357: |
| 377 | board->baseband = BASEBAND_APQ; |
| 378 | break; |
| 379 | default: |
| 380 | dprintf(CRITICAL, "RCM platform subtype :%u is not supported\n", |
| 381 | platform_subtype); |
| 382 | ASSERT(0); |
| 383 | }; |
| 384 | } |
| 385 | |
Dhaval Patel | f998627 | 2013-10-18 19:06:05 -0700 | [diff] [blame] | 386 | /* Returns 1 if target supports continuous splash screen. */ |
| 387 | int target_cont_splash_screen() |
| 388 | { |
| 389 | switch(board_hardware_id()) |
| 390 | { |
| 391 | case HW_PLATFORM_SURF: |
| 392 | case HW_PLATFORM_MTP: |
| 393 | case HW_PLATFORM_FLUID: |
| 394 | dprintf(INFO, "Target_cont_splash=1\n"); |
| 395 | return 1; |
| 396 | break; |
| 397 | default: |
| 398 | dprintf(SPEW, "Target_cont_splash=0\n"); |
| 399 | return 0; |
| 400 | } |
| 401 | } |
Ameya Thakur | cfca921 | 2013-09-13 23:51:49 -0700 | [diff] [blame] | 402 | |
Deepa Dinamani | 0e5038f | 2013-05-16 15:02:16 -0700 | [diff] [blame] | 403 | /* Detect the modem type */ |
| 404 | void target_baseband_detect(struct board_data *board) |
| 405 | { |
Sundarajan Srinivasan | f5932fb | 2013-08-06 17:26:04 -0700 | [diff] [blame] | 406 | uint32_t platform; |
| 407 | uint32_t platform_subtype; |
Ameya Thakur | cfca921 | 2013-09-13 23:51:49 -0700 | [diff] [blame] | 408 | uint32_t platform_hardware; |
Sundarajan Srinivasan | f5932fb | 2013-08-06 17:26:04 -0700 | [diff] [blame] | 409 | |
| 410 | platform = board->platform; |
Sundarajan Srinivasan | f5932fb | 2013-08-06 17:26:04 -0700 | [diff] [blame] | 411 | |
Ameya Thakur | cfca921 | 2013-09-13 23:51:49 -0700 | [diff] [blame] | 412 | platform_hardware = board->platform_hw; |
| 413 | |
| 414 | switch(platform_hardware) { |
| 415 | case HW_PLATFORM_SURF: |
| 416 | set_cdp_baseband(board); |
Sundarajan Srinivasan | f5932fb | 2013-08-06 17:26:04 -0700 | [diff] [blame] | 417 | break; |
Ameya Thakur | cfca921 | 2013-09-13 23:51:49 -0700 | [diff] [blame] | 418 | case HW_PLATFORM_MTP: |
| 419 | set_mtp_baseband(board); |
| 420 | break; |
| 421 | case HW_PLATFORM_RCM: |
| 422 | set_rcm_baseband(board); |
| 423 | break; |
| 424 | case HW_PLATFORM_LIQUID: |
Sundarajan Srinivasan | f5932fb | 2013-08-06 17:26:04 -0700 | [diff] [blame] | 425 | board->baseband = BASEBAND_APQ; |
| 426 | break; |
| 427 | default: |
Ameya Thakur | cfca921 | 2013-09-13 23:51:49 -0700 | [diff] [blame] | 428 | dprintf(CRITICAL, "Platform :%u is not supported\n", |
| 429 | platform_hardware); |
Sundarajan Srinivasan | f5932fb | 2013-08-06 17:26:04 -0700 | [diff] [blame] | 430 | ASSERT(0); |
Ameya Thakur | cfca921 | 2013-09-13 23:51:49 -0700 | [diff] [blame] | 431 | }; |
Deepa Dinamani | 0e5038f | 2013-05-16 15:02:16 -0700 | [diff] [blame] | 432 | } |
| 433 | |
| 434 | unsigned target_baseband() |
| 435 | { |
| 436 | return board_baseband(); |
| 437 | } |
| 438 | |
| 439 | void target_serialno(unsigned char *buf) |
| 440 | { |
| 441 | unsigned int serialno; |
| 442 | if (target_is_emmc_boot()) { |
| 443 | serialno = mmc_get_psn(); |
| 444 | snprintf((char *)buf, 13, "%x", serialno); |
| 445 | } |
| 446 | } |
| 447 | |
| 448 | unsigned check_reboot_mode(void) |
| 449 | { |
Sundarajan Srinivasan | d43b28b | 2013-06-25 16:59:13 -0700 | [diff] [blame] | 450 | uint32_t restart_reason = 0; |
| 451 | uint32_t restart_reason_addr; |
| 452 | |
| 453 | restart_reason_addr = RESTART_REASON_ADDR; |
| 454 | |
| 455 | /* Read reboot reason and scrub it */ |
| 456 | restart_reason = readl(restart_reason_addr); |
| 457 | writel(0x00, restart_reason_addr); |
| 458 | |
| 459 | return restart_reason; |
Deepa Dinamani | 0e5038f | 2013-05-16 15:02:16 -0700 | [diff] [blame] | 460 | } |
| 461 | |
| 462 | void reboot_device(unsigned reboot_reason) |
| 463 | { |
Sundarajan Srinivasan | d43b28b | 2013-06-25 16:59:13 -0700 | [diff] [blame] | 464 | uint8_t reset_type = 0; |
| 465 | |
| 466 | /* Write the reboot reason */ |
| 467 | writel(reboot_reason, RESTART_REASON_ADDR); |
| 468 | |
| 469 | if(reboot_reason == FASTBOOT_MODE) |
| 470 | reset_type = PON_PSHOLD_WARM_RESET; |
| 471 | else |
| 472 | reset_type = PON_PSHOLD_HARD_RESET; |
| 473 | |
| 474 | pm8x41_reset_configure(reset_type); |
| 475 | |
| 476 | /* Drop PS_HOLD for MSM */ |
| 477 | writel(0x00, MPM2_MPM_PS_HOLD); |
| 478 | |
| 479 | mdelay(5000); |
| 480 | |
| 481 | dprintf(CRITICAL, "Rebooting failed\n"); |
Deepa Dinamani | 0e5038f | 2013-05-16 15:02:16 -0700 | [diff] [blame] | 482 | } |
Amol Jadi | 0a4c9b4 | 2013-10-11 14:22:11 -0700 | [diff] [blame] | 483 | |
| 484 | /* identify the usb controller to be used for the target */ |
| 485 | const char * target_usb_controller() |
| 486 | { |
| 487 | return "dwc"; |
| 488 | } |
| 489 | |
| 490 | /* mux hs phy to route to dwc controller */ |
| 491 | static void phy_mux_configure_with_jdr() |
| 492 | { |
| 493 | uint32_t val; |
| 494 | |
| 495 | val = readl(COPSS_USB_CONTROL_WITH_JDR); |
| 496 | |
| 497 | /* Note: there are no details regarding this bit in hpg or swi. */ |
| 498 | val |= BIT(8); |
| 499 | |
| 500 | writel(val, COPSS_USB_CONTROL_WITH_JDR); |
| 501 | } |
| 502 | |
| 503 | /* configure hs phy mux if using dwc controller */ |
| 504 | void target_usb_phy_mux_configure(void) |
| 505 | { |
| 506 | if(!strcmp(target_usb_controller(), "dwc")) |
| 507 | { |
| 508 | phy_mux_configure_with_jdr(); |
| 509 | } |
| 510 | } |
| 511 | |
| 512 | void target_usb_phy_reset(void) |
| 513 | { |
| 514 | uint32_t val; |
| 515 | |
| 516 | /* SS PHY reset */ |
| 517 | val = readl(GCC_USB3_PHY_BCR) | BIT(0); |
| 518 | writel(val, GCC_USB3_PHY_BCR); |
| 519 | udelay(10); |
| 520 | writel(val & ~BIT(0), GCC_USB3_PHY_BCR); |
| 521 | |
| 522 | /* HS PHY reset */ |
| 523 | /* Note: reg/bit details are not mentioned in hpg or swi. */ |
| 524 | val = readl(COPSS_USB_CONTROL_WITH_JDR) | BIT(11); |
| 525 | writel(val, COPSS_USB_CONTROL_WITH_JDR); |
| 526 | udelay(10); |
| 527 | writel(val & ~BIT(11), COPSS_USB_CONTROL_WITH_JDR); |
Channagoud Kadabi | 70500ea | 2013-10-29 17:33:44 -0700 | [diff] [blame^] | 528 | |
| 529 | /* PHY_COMMON reset */ |
| 530 | val = readl(GCC_USB30_PHY_COM_BCR) | BIT(0); |
| 531 | writel(val, GCC_USB30_PHY_COM_BCR); |
| 532 | udelay(10); |
| 533 | writel(val & ~BIT(0), GCC_USB30_PHY_COM_BCR); |
Amol Jadi | 0a4c9b4 | 2013-10-11 14:22:11 -0700 | [diff] [blame] | 534 | } |