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Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -08001/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
2 *
3 * Redistribution and use in source and binary forms, with or without
4 * modification, are permitted provided that the following conditions
5 * are met:
6 * * Redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer.
8 * * Redistributions in binary form must reproduce the above copyright
9 * notice, this list of conditions and the following disclaimer in
10 * the documentation and/or other materials provided with the
11 * distribution.
12 * * Neither the name of The Linux Foundation nor the names of its
13 * contributors may be used to endorse or promote products derived
14 * from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
19 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
20 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
22 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
23 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
24 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
25 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
26 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 */
29
30#include <debug.h>
31#include <smem.h>
Casey Piper7d7b0522013-09-09 20:42:15 -070032#include <err.h>
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -080033#include <msm_panel.h>
Casey Piper7d7b0522013-09-09 20:42:15 -070034#include <mipi_dsi.h>
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -080035#include <pm8x41.h>
36#include <pm8x41_wled.h>
37#include <board.h>
38#include <mdp5.h>
39#include <platform/gpio.h>
Asaf Pensoc9080dc2013-05-21 21:53:50 +030040#include <platform/clock.h>
Siddhartha Agrawal1b2ed842013-05-29 18:02:28 -070041#include <platform/iomap.h>
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -080042#include <target/display.h>
Casey Piper7d7b0522013-09-09 20:42:15 -070043#include "include/panel.h"
44#include "include/display_resource.h"
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -080045
46static struct msm_fb_panel_data panel;
Casey Piper7d7b0522013-09-09 20:42:15 -070047static uint8_t edp_enable;
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -080048
Casey Piper7d7b0522013-09-09 20:42:15 -070049#define HFPLL_LDO_ID 12
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -080050
Asaf Penso0ecd86f2013-05-29 14:49:19 +030051static struct pm8x41_wled_data wled_ctrl = {
Amy Maloche543b5842013-07-31 18:07:38 -070052 .mod_scheme = 0x00,
Asaf Penso0ecd86f2013-05-29 14:49:19 +030053 .led1_brightness = (0x0F << 8) | 0xEF,
54 .led2_brightness = (0x0F << 8) | 0xEF,
55 .led3_brightness = (0x0F << 8) | 0xEF,
56 .max_duty_cycle = 0x01,
57 .ovp = 0x2,
58 .full_current_scale = 0x19
59};
60
Casey Piper7d7b0522013-09-09 20:42:15 -070061static uint32_t dsi_pll_enable_seq(uint32_t ctl_base)
62{
63 uint32_t rc = 0;
64
65 mdss_dsi_uniphy_pll_sw_reset(ctl_base);
66
67 writel(0x01, ctl_base + 0x0220); /* GLB CFG */
68 mdelay(1);
69 writel(0x05, ctl_base + 0x0220); /* GLB CFG */
70 mdelay(1);
71 writel(0x07, ctl_base + 0x0220); /* GLB CFG */
72 mdelay(1);
73 writel(0x0f, ctl_base + 0x0220); /* GLB CFG */
74 mdelay(1);
75
76 mdss_dsi_uniphy_pll_lock_detect_setting(ctl_base);
77
78 while (!(readl(ctl_base + 0x02c0) & 0x01)) {
79 mdss_dsi_uniphy_pll_sw_reset(ctl_base);
80 writel(0x01, ctl_base + 0x0220); /* GLB CFG */
81 mdelay(1);
82 writel(0x05, ctl_base + 0x0220); /* GLB CFG */
83 mdelay(1);
84 writel(0x07, ctl_base + 0x0220); /* GLB CFG */
85 mdelay(1);
86 writel(0x05, ctl_base + 0x0220); /* GLB CFG */
87 mdelay(1);
88 writel(0x07, ctl_base + 0x0220); /* GLB CFG */
89 mdelay(1);
90 writel(0x0f, ctl_base + 0x0220); /* GLB CFG */
91 mdelay(2);
92 mdss_dsi_uniphy_pll_lock_detect_setting(ctl_base);
93 }
94 return rc;
95}
96
97int target_backlight_ctrl(uint8_t enable)
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -080098{
Chandan Uddarajud1bcbeb2013-07-01 18:13:48 -070099 uint32_t platform_id = board_platform_id();
100 uint32_t hardware_id = board_hardware_id();
Casey Piper7d7b0522013-09-09 20:42:15 -0700101 uint8_t slave_id = 1;
Chandan Uddarajud1bcbeb2013-07-01 18:13:48 -0700102
Casey Piper7d7b0522013-09-09 20:42:15 -0700103 if (enable) {
104 if (platform_id == MSM8974AC)
105 if ((hardware_id == HW_PLATFORM_MTP)
106 || (hardware_id == HW_PLATFORM_LIQUID))
107 slave_id = 3;
Chandan Uddarajud1bcbeb2013-07-01 18:13:48 -0700108
Casey Piper7d7b0522013-09-09 20:42:15 -0700109 pm8x41_wled_config_slave_id(slave_id);
110 pm8x41_wled_config(&wled_ctrl);
111 pm8x41_wled_sink_control(enable);
112 pm8x41_wled_iled_sync_control(enable);
113 }
114 pm8x41_wled_enable(enable);
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800115
Casey Piper7d7b0522013-09-09 20:42:15 -0700116 return NO_ERROR;
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800117}
118
Casey Piper7d7b0522013-09-09 20:42:15 -0700119int target_panel_clock(uint8_t enable, struct msm_panel_info *pinfo)
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800120{
Casey Piper7d7b0522013-09-09 20:42:15 -0700121 struct mdss_dsi_pll_config *pll_data;
122 uint32_t dual_dsi = pinfo->mipi.dual_dsi;
123 dprintf(SPEW, "target_panel_clock\n");
124
125 pll_data = pinfo->mipi.dsi_pll_config;
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800126 if (enable) {
127 mdp_gdsc_ctrl(enable);
128 mdp_clock_init();
Siddhartha Agrawal1b2ed842013-05-29 18:02:28 -0700129 mdss_dsi_uniphy_pll_config(MIPI_DSI0_BASE);
Casey Piper7d7b0522013-09-09 20:42:15 -0700130 dsi_pll_enable_seq(MIPI_DSI0_BASE);
Siddhartha Agrawal1b2ed842013-05-29 18:02:28 -0700131 if (panel.panel_info.mipi.dual_dsi &&
Casey Piper7d7b0522013-09-09 20:42:15 -0700132 !(panel.panel_info.mipi.broadcast)) {
Siddhartha Agrawal1b2ed842013-05-29 18:02:28 -0700133 mdss_dsi_uniphy_pll_config(MIPI_DSI1_BASE);
Casey Piper7d7b0522013-09-09 20:42:15 -0700134 dsi_pll_enable_seq(MIPI_DSI1_BASE);
135 }
136 mmss_clock_auto_pll_init(DSI0_PHY_PLL_OUT, dual_dsi,
137 pll_data->pclk_m,
138 pll_data->pclk_n,
139 pll_data->pclk_d);
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800140 } else if(!target_cont_splash_screen()) {
141 // * Add here for continuous splash *
Siddhartha Agrawalc88737b2013-05-29 20:41:35 -0700142 mmss_clock_disable(dual_dsi);
143 mdp_clock_disable(dual_dsi);
Siddhartha Agrawalc43c4872013-04-21 16:23:16 -0700144 mdp_gdsc_ctrl(enable);
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800145 }
146
Casey Piper7d7b0522013-09-09 20:42:15 -0700147 return NO_ERROR;
Asaf Penso325f43a2013-05-21 21:55:48 +0300148}
149
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800150/* Pull DISP_RST_N high to get panel out of reset */
Casey Piper7d7b0522013-09-09 20:42:15 -0700151int target_panel_reset(uint8_t enable, struct panel_reset_sequence *resetseq,
152 struct msm_panel_info *pinfo)
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800153{
Casey Piper7d7b0522013-09-09 20:42:15 -0700154 uint32_t rst_gpio = reset_gpio.pin_id;
Chandan Uddarajud1bcbeb2013-07-01 18:13:48 -0700155 uint32_t platform_id = board_platform_id();
156 uint32_t hardware_id = board_hardware_id();
157
Casey Piper7d7b0522013-09-09 20:42:15 -0700158 struct pm8x41_gpio resetgpio_param = {
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800159 .direction = PM_GPIO_DIR_OUT,
160 .output_buffer = PM_GPIO_OUT_CMOS,
161 .out_strength = PM_GPIO_OUT_DRIVE_MED,
162 };
163
Chandan Uddarajud1bcbeb2013-07-01 18:13:48 -0700164 if (platform_id == MSM8974AC)
Chandan Uddarajub2cee902013-09-05 18:31:23 -0700165 if ((hardware_id == HW_PLATFORM_MTP)
Chandan Uddarajud1bcbeb2013-07-01 18:13:48 -0700166 || (hardware_id == HW_PLATFORM_LIQUID))
167 rst_gpio = 20;
168
169 dprintf(SPEW, "platform_id: %u, rst_gpio: %u\n",
170 platform_id, rst_gpio);
171
Casey Piper7d7b0522013-09-09 20:42:15 -0700172 pm8x41_gpio_config(rst_gpio, &resetgpio_param);
Siddhartha Agrawalc43c4872013-04-21 16:23:16 -0700173 if (enable) {
Casey Piper7d7b0522013-09-09 20:42:15 -0700174 gpio_tlmm_config(enable_gpio.pin_id, 0,
175 enable_gpio.pin_direction, enable_gpio.pin_pull,
176 enable_gpio.pin_strength, enable_gpio.pin_state);
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800177
Casey Piper7d7b0522013-09-09 20:42:15 -0700178 gpio_set(enable_gpio.pin_id, resetseq->pin_direction);
179 pm8x41_gpio_set(rst_gpio, resetseq->pin_state[0]);
180 mdelay(resetseq->sleep[0]);
181 pm8x41_gpio_set(rst_gpio, resetseq->pin_state[1]);
182 mdelay(resetseq->sleep[1]);
183 pm8x41_gpio_set(rst_gpio, resetseq->pin_state[2]);
184 mdelay(resetseq->sleep[2]);
Siddhartha Agrawalc43c4872013-04-21 16:23:16 -0700185 } else {
Casey Piper7d7b0522013-09-09 20:42:15 -0700186 resetgpio_param.out_strength = PM_GPIO_OUT_DRIVE_LOW;
187 pm8x41_gpio_config(rst_gpio, &resetgpio_param);
Chandan Uddarajud1bcbeb2013-07-01 18:13:48 -0700188 pm8x41_gpio_set(rst_gpio, PM_GPIO_FUNC_LOW);
Casey Piper7d7b0522013-09-09 20:42:15 -0700189 gpio_set(enable_gpio.pin_id, resetseq->pin_direction);
Siddhartha Agrawalc43c4872013-04-21 16:23:16 -0700190 }
Casey Piper7d7b0522013-09-09 20:42:15 -0700191 return NO_ERROR;
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800192}
193
Casey Piper7d7b0522013-09-09 20:42:15 -0700194int target_ldo_ctrl(uint8_t enable)
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800195{
Casey Piper7d7b0522013-09-09 20:42:15 -0700196 uint32_t ldocounter = 0;
197 uint32_t pm8x41_ldo_base = 0x13F00;
Deepa Dinamaniec4835b2013-06-03 16:14:24 -0700198
Casey Piper7d7b0522013-09-09 20:42:15 -0700199 while (ldocounter < TOTAL_LDO_DEFINED) {
200 struct pm8x41_ldo ldo_entry = LDO((pm8x41_ldo_base +
201 0x100 * ldo_entry_array[ldocounter].ldo_id),
202 ldo_entry_array[ldocounter].ldo_type);
Deepa Dinamaniec4835b2013-06-03 16:14:24 -0700203
Casey Piper7d7b0522013-09-09 20:42:15 -0700204 dprintf(SPEW, "Setting %s\n",
205 ldo_entry_array[ldocounter].ldo_id);
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800206
Casey Piper7d7b0522013-09-09 20:42:15 -0700207 /* Set voltage during power on */
208 if (enable) {
209 pm8x41_ldo_set_voltage(&ldo_entry,
210 ldo_entry_array[ldocounter].ldo_voltage);
211 pm8x41_ldo_control(&ldo_entry, enable);
212 } else if(ldo_entry_array[ldocounter].ldo_id != HFPLL_LDO_ID) {
213 pm8x41_ldo_control(&ldo_entry, enable);
214 }
215 ldocounter++;
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800216 }
217
Casey Piper7d7b0522013-09-09 20:42:15 -0700218 return NO_ERROR;
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800219}
220
Asaf Pensoe6870ff2013-07-07 17:23:56 +0300221static int msm8974_mdss_edp_panel_clock(int enable)
222{
223 if (enable) {
224 mdp_gdsc_ctrl(enable);
225 mdp_clock_init();
226 edp_clk_enable();
Asaf Pensoe6870ff2013-07-07 17:23:56 +0300227 } else if (!target_cont_splash_screen()) {
228 /* Add here for continuous splash */
Kuogee Hsiehdf636eb2013-08-01 14:52:08 -0700229 edp_clk_disable();
230 mdp_clock_disable();
231 mdp_gdsc_ctrl(enable);
Asaf Pensoe6870ff2013-07-07 17:23:56 +0300232 }
233
234 return 0;
235}
236
237static int msm8974_edp_panel_power(int enable)
238{
239 struct pm8x41_gpio gpio36_param = {
240 .direction = PM_GPIO_DIR_OUT,
241 .output_buffer = PM_GPIO_OUT_CMOS,
242 .out_strength = PM_GPIO_OUT_DRIVE_MED,
243 };
244
245 struct pm8x41_ldo ldo12 = LDO(PM8x41_LDO12, PLDO_TYPE);
246
247 if (enable) {
248 /* Enable backlight */
249 dprintf(SPEW, "Enable Backlight\n");
250 pm8x41_gpio_config(36, &gpio36_param);
251 pm8x41_gpio_set(36, PM_GPIO_FUNC_HIGH);
252 dprintf(SPEW, "Enable Backlight Done\n");
253
254 /* Turn on LDO12 for edp vdda */
255 dprintf(SPEW, "Setting LDO12 n");
256 pm8x41_ldo_set_voltage(&ldo12, 1800000);
257 pm8x41_ldo_control(&ldo12, enable);
258 dprintf(SPEW, "Setting LDO12 Done\n");
259
260 /* Panel Enable */
261 dprintf(SPEW, "Panel Enable\n");
262 gpio_tlmm_config(58, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_8MA,
263 GPIO_DISABLE);
264 gpio_set(58, 2);
265 dprintf(SPEW, "Panel Enable Done\n");
266 } else {
267 /* Keep LDO12 on, otherwise kernel will not boot */
Kuogee Hsiehdf636eb2013-08-01 14:52:08 -0700268 gpio_set(58, 0);
Asaf Pensoe6870ff2013-07-07 17:23:56 +0300269 pm8x41_gpio_set(36, PM_GPIO_FUNC_LOW);
270 }
271
272 return 0;
273}
274
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800275void display_init(void)
276{
277 uint32_t hw_id = board_hardware_id();
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800278 switch (hw_id) {
Asaf Pensoe6870ff2013-07-07 17:23:56 +0300279 case HW_PLATFORM_LIQUID:
Kuogee Hsiehdf636eb2013-08-01 14:52:08 -0700280 edp_panel_init(&(panel.panel_info));
Asaf Pensoe6870ff2013-07-07 17:23:56 +0300281 panel.clk_func = msm8974_mdss_edp_panel_clock;
282 panel.power_func = msm8974_edp_panel_power;
283 panel.fb.base = (void *)EDP_FB_ADDR;
Asaf Pensoe6870ff2013-07-07 17:23:56 +0300284 panel.fb.format = FB_FORMAT_RGB888;
285 panel.mdp_rev = MDP_REV_50;
Casey Piper7d7b0522013-09-09 20:42:15 -0700286
287 if (msm_display_init(&panel)) {
288 dprintf(CRITICAL, "edp init failed!\n");
289 return;
290 }
291
292 edp_enable = 1;
Asaf Pensoe6870ff2013-07-07 17:23:56 +0300293 break;
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800294 default:
Casey Piper7d7b0522013-09-09 20:42:15 -0700295 gcdb_display_init(MDP_REV_50, MIPI_FB_ADDR);
296 break;
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800297 }
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800298}
299
300void display_shutdown(void)
301{
Casey Piper7d7b0522013-09-09 20:42:15 -0700302 uint32_t hw_id = board_hardware_id();
303 switch (hw_id) {
304 case HW_PLATFORM_LIQUID:
305 if (edp_enable)
306 msm_display_off();
307 break;
308 default:
309 gcdb_display_shutdown();
310 break;
311 }
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800312}