blob: cb5ec5115a57b3374264dce669e4da6c0ec55faa [file] [log] [blame]
Channagoud Kadabie9168e82014-01-28 21:33:34 -08001/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07002 *
3 * Redistribution and use in source and binary forms, with or without
4 * modification, are permitted provided that the following conditions are
5 * met:
6 * * Redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer.
8 * * Redistributions in binary form must reproduce the above
9 * copyright notice, this list of conditions and the following
10 * disclaimer in the documentation and/or other materials provided
11 * with the distribution.
12 * * Neither the name of The Linux Foundation nor the names of its
13 * contributors may be used to endorse or promote products derived
14 * from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
23 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
25 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
26 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <string.h>
30#include <stdlib.h>
31#include <debug.h>
32#include <reg.h>
33#include <mmc_sdhci.h>
34#include <sdhci.h>
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -070035#include <sdhci_msm.h>
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -070036#include <partition_parser.h>
37#include <platform/iomap.h>
38#include <platform/timer.h>
39
40extern void clock_init_mmc(uint32_t);
41extern void clock_config_mmc(uint32_t, uint32_t);
42
43/* data access time unit in ns */
44static const uint32_t taac_unit[] =
45{
46 1, 10, 100, 1000, 10000, 100000, 1000000, 10000000
47};
48
49/* data access time value x 10 */
50static const uint32_t taac_value[] =
51{
52 0, 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80
53};
54
55/* data transfer rate in kbit/s */
56static const uint32_t xfer_rate_unit[] =
57{
58 100, 1000, 10000, 100000, 0, 0, 0, 0
59};
60
61/* data transfer rate value x 10*/
62static const uint32_t xfer_rate_value[] =
63{
64 0, 10, 12, 13, 15, 20, 26, 30, 35, 40, 45, 52, 55, 60, 70, 80
65};
66
67/*
68 * Function: mmc decode and save csd
69 * Arg : Card structure & raw csd
70 * Return : 0 on Success, 1 on Failure
71 * Flow : Decodes CSD response received from the card.
72 * Note that we have defined only few of the CSD elements
73 * in csd structure. We'll only decode those values.
74 */
75static uint32_t mmc_decode_and_save_csd(struct mmc_card *card)
76{
77 uint32_t mmc_sizeof = 0;
78 uint32_t mmc_unit = 0;
79 uint32_t mmc_value = 0;
80 uint32_t mmc_temp = 0;
81 uint32_t *raw_csd = card->raw_csd;
82
83 struct mmc_csd mmc_csd;
84
85 mmc_sizeof = sizeof(uint32_t) * 8;
86
87 mmc_csd.cmmc_structure = UNPACK_BITS(raw_csd, 126, 2, mmc_sizeof);
88
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -070089 if (MMC_CARD_SD(card)) {
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -070090 /* Parse CSD according to SD card spec. */
91
92 /* CSD register is little bit differnet for CSD version 2.0 High
93 * Capacity and CSD version 1.0/2.0 Standard memory cards.
94 * In Version 2.0 some of the fields have fixed values and it's
95 * not necessary for host to refer these fields in CSD sent by
96 * card
97 */
98
99 if (mmc_csd.cmmc_structure == 1) {
100 /* CSD Version 2.0 */
101 mmc_csd.card_cmd_class = UNPACK_BITS(raw_csd, 84, 12, mmc_sizeof);
102 /* Fixed value is 9 = 2^9 = 512 */
103 mmc_csd.write_blk_len = 512;
104 /* Fixed value is 9 = 512 */
105 mmc_csd.read_blk_len = 512;
106 /* Fixed value: 010b */
107 mmc_csd.r2w_factor = 0x2;
108 /* Not there in version 2.0 */
109 mmc_csd.c_size_mult = 0;
110 mmc_csd.c_size = UNPACK_BITS(raw_csd, 48, 22, mmc_sizeof);
111 mmc_csd.nsac_clk_cycle = UNPACK_BITS(raw_csd, 104, 8, mmc_sizeof)
112 * 100;
113
114 mmc_unit = UNPACK_BITS(raw_csd, 112, 3, mmc_sizeof);
115 mmc_value = UNPACK_BITS(raw_csd, 115, 4, mmc_sizeof);
116 mmc_csd.taac_ns = (taac_value[mmc_value] * taac_unit[mmc_unit])
117 / 10;
118
119 mmc_csd.erase_blk_len = 1;
120 mmc_csd.read_blk_misalign = 0;
121 mmc_csd.write_blk_misalign = 0;
122 mmc_csd.read_blk_partial = 0;
123 mmc_csd.write_blk_partial = 0;
124
125 mmc_unit = UNPACK_BITS(raw_csd, 96, 3, mmc_sizeof);
126 mmc_value = UNPACK_BITS(raw_csd, 99, 4, mmc_sizeof);
127 mmc_csd.tran_speed = (xfer_rate_value[mmc_value] *
128 xfer_rate_unit[mmc_unit]) / 10;
129
130 mmc_csd.wp_grp_size = 0x0;
131 mmc_csd.wp_grp_enable = 0x0;
132 mmc_csd.perm_wp = UNPACK_BITS(raw_csd, 13, 1, mmc_sizeof);
133 mmc_csd.temp_wp = UNPACK_BITS(raw_csd, 12, 1, mmc_sizeof);
134
135 /* Calculate the card capcity */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700136 card->capacity = (unsigned long long) (1 + mmc_csd.c_size) * 512 * 1024;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700137 } else {
138 /* CSD Version 1.0 */
139 mmc_csd.card_cmd_class = UNPACK_BITS(raw_csd, 84, 12, mmc_sizeof);
140
141 mmc_temp = UNPACK_BITS(raw_csd, 22, 4, mmc_sizeof);
142 mmc_csd.write_blk_len = (mmc_temp > 8 && mmc_temp < 12) ?
143 (1 << mmc_temp) : 512;
144
145 mmc_temp = UNPACK_BITS(raw_csd, 80, 4, mmc_sizeof);
146 mmc_csd.read_blk_len = (mmc_temp > 8 && mmc_temp < 12) ?
147 (1 << mmc_temp) : 512;
148
149 mmc_unit = UNPACK_BITS(raw_csd, 112, 3, mmc_sizeof);
150 mmc_value = UNPACK_BITS(raw_csd, 115, 4, mmc_sizeof);
151 mmc_csd.taac_ns = (taac_value[mmc_value] * taac_unit[mmc_unit])
152 / 10;
153
154 mmc_unit = UNPACK_BITS(raw_csd, 96, 3, mmc_sizeof);
155 mmc_value = UNPACK_BITS(raw_csd, 99, 4, mmc_sizeof);
156 mmc_csd.tran_speed = (xfer_rate_value[mmc_value] *
157 xfer_rate_unit[mmc_unit]) / 10;
158
159 mmc_csd.nsac_clk_cycle = UNPACK_BITS(raw_csd, 104, 8, mmc_sizeof)
160 * 100;
161
162 mmc_csd.r2w_factor = UNPACK_BITS(raw_csd, 26, 3, mmc_sizeof);
163 mmc_csd.sector_size = UNPACK_BITS(raw_csd, 39, 7, mmc_sizeof) + 1;
164
165 mmc_csd.erase_blk_len = UNPACK_BITS(raw_csd, 46, 1, mmc_sizeof);
166 mmc_csd.read_blk_misalign = UNPACK_BITS(raw_csd, 77, 1, mmc_sizeof);
167 mmc_csd.write_blk_misalign = UNPACK_BITS(raw_csd, 78, 1, mmc_sizeof);
168 mmc_csd.read_blk_partial = UNPACK_BITS(raw_csd, 79, 1, mmc_sizeof);
169 mmc_csd.write_blk_partial = UNPACK_BITS(raw_csd, 21, 1, mmc_sizeof);
170
171 mmc_csd.c_size_mult = UNPACK_BITS(raw_csd, 47, 3, mmc_sizeof);
172 mmc_csd.c_size = UNPACK_BITS(raw_csd, 62, 12, mmc_sizeof);
173 mmc_csd.wp_grp_size = UNPACK_BITS(raw_csd, 32, 7, mmc_sizeof);
174 mmc_csd.wp_grp_enable = UNPACK_BITS(raw_csd, 31, 1, mmc_sizeof);
175 mmc_csd.perm_wp = UNPACK_BITS(raw_csd, 13, 1, mmc_sizeof);
176 mmc_csd.temp_wp = UNPACK_BITS(raw_csd, 12, 1, mmc_sizeof);
177
178 /* Calculate the card capacity */
179 mmc_temp = (1 << (mmc_csd.c_size_mult + 2)) * (mmc_csd.c_size + 1);
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700180 card->capacity = (unsigned long long)mmc_temp * mmc_csd.read_blk_len;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700181 }
182 } else {
183 /* Parse CSD according to MMC card spec. */
184 mmc_csd.spec_vers = UNPACK_BITS(raw_csd, 122, 4, mmc_sizeof);
185 mmc_csd.card_cmd_class = UNPACK_BITS(raw_csd, 84, 12, mmc_sizeof);
186 mmc_csd.write_blk_len = 1 << UNPACK_BITS(raw_csd, 22, 4, mmc_sizeof);
187 mmc_csd.read_blk_len = 1 << UNPACK_BITS(raw_csd, 80, 4, mmc_sizeof);
188 mmc_csd.r2w_factor = UNPACK_BITS(raw_csd, 26, 3, mmc_sizeof);
189 mmc_csd.c_size_mult = UNPACK_BITS(raw_csd, 47, 3, mmc_sizeof);
190 mmc_csd.c_size = UNPACK_BITS(raw_csd, 62, 12, mmc_sizeof);
191 mmc_csd.nsac_clk_cycle = UNPACK_BITS(raw_csd, 104, 8, mmc_sizeof) * 100;
192
193 mmc_unit = UNPACK_BITS(raw_csd, 112, 3, mmc_sizeof);
194 mmc_value = UNPACK_BITS(raw_csd, 115, 4, mmc_sizeof);
195 mmc_csd.taac_ns = (taac_value[mmc_value] * taac_unit[mmc_unit]) / 10;
196
197 mmc_csd.read_blk_misalign = UNPACK_BITS(raw_csd, 77, 1, mmc_sizeof);
198 mmc_csd.write_blk_misalign = UNPACK_BITS(raw_csd, 78, 1, mmc_sizeof);
199 mmc_csd.read_blk_partial = UNPACK_BITS(raw_csd, 79, 1, mmc_sizeof);
200 mmc_csd.write_blk_partial = UNPACK_BITS(raw_csd, 21, 1, mmc_sizeof);
201
202 /* Ignore -- no use of this value. */
203 mmc_csd.tran_speed = 0x00;
204
205 mmc_csd.erase_grp_size = UNPACK_BITS(raw_csd, 42, 5, mmc_sizeof);
206 mmc_csd.erase_grp_mult = UNPACK_BITS(raw_csd, 37, 5, mmc_sizeof);
207 mmc_csd.wp_grp_size = UNPACK_BITS(raw_csd, 32, 5, mmc_sizeof);
208 mmc_csd.wp_grp_enable = UNPACK_BITS(raw_csd, 31, 1, mmc_sizeof);
209 mmc_csd.perm_wp = UNPACK_BITS(raw_csd, 13, 1, mmc_sizeof);
210 mmc_csd.temp_wp = UNPACK_BITS(raw_csd, 12, 1, mmc_sizeof);
211
212 /* Calculate the card capcity */
213 if (mmc_csd.c_size != 0xFFF) {
214 /* For cards less than or equal to 2GB */
215 mmc_temp = (1 << (mmc_csd.c_size_mult + 2)) * (mmc_csd.c_size + 1);
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700216 card->capacity = (unsigned long long) mmc_temp * mmc_csd.read_blk_len;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700217 } else {
218 /* For cards greater than 2GB, Ext CSD register's SEC_COUNT
219 * is used to calculate the size.
220 */
221 uint64_t sec_count;
222
223 sec_count = (card->ext_csd[MMC_SEC_COUNT4] << MMC_SEC_COUNT4_SHIFT)
224 | (card->ext_csd[MMC_SEC_COUNT3] << MMC_SEC_COUNT3_SHIFT)
225 | (card->ext_csd[MMC_SEC_COUNT2] << MMC_SEC_COUNT2_SHIFT)
226 | card->ext_csd[MMC_SEC_COUNT1];
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700227 card->capacity = sec_count * MMC_BLK_SZ;
228 }
229 }
230
231 /* save the information in card structure */
232 memcpy((struct mmc_csd *)&card->csd,(struct mmc_csd *)&mmc_csd,
233 sizeof(struct mmc_csd));
234
235 dprintf(SPEW, "Decoded CSD fields:\n");
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700236 dprintf(SPEW, "cmmc_structure: %u\n", mmc_csd.cmmc_structure);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700237 dprintf(SPEW, "card_cmd_class: %x\n", mmc_csd.card_cmd_class);
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700238 dprintf(SPEW, "write_blk_len: %u\n", mmc_csd.write_blk_len);
239 dprintf(SPEW, "read_blk_len: %u\n", mmc_csd.read_blk_len);
240 dprintf(SPEW, "r2w_factor: %u\n", mmc_csd.r2w_factor);
241 dprintf(SPEW, "sector_size: %u\n", mmc_csd.sector_size);
242 dprintf(SPEW, "c_size_mult:%u\n", mmc_csd.c_size_mult);
243 dprintf(SPEW, "c_size: %u\n", mmc_csd.c_size);
244 dprintf(SPEW, "nsac_clk_cycle: %u\n", mmc_csd.nsac_clk_cycle);
245 dprintf(SPEW, "taac_ns: %u\n", mmc_csd.taac_ns);
246 dprintf(SPEW, "tran_speed: %u kbps\n", mmc_csd.tran_speed);
247 dprintf(SPEW, "erase_blk_len: %u\n", mmc_csd.erase_blk_len);
248 dprintf(SPEW, "read_blk_misalign: %u\n", mmc_csd.read_blk_misalign);
249 dprintf(SPEW, "write_blk_misalign: %u\n", mmc_csd.write_blk_misalign);
250 dprintf(SPEW, "read_blk_partial: %u\n", mmc_csd.read_blk_partial);
251 dprintf(SPEW, "write_blk_partial: %u\n", mmc_csd.write_blk_partial);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700252 dprintf(SPEW, "Card Capacity: %llu Bytes\n", card->capacity);
253
254 return 0;
255}
256
257/*
258 * Function: mmc decode & save cid
259 * Arg : card structure & raw cid
260 * Return : 0 on Success, 1 on Failure
261 * Flow : Decode CID sent by the card.
262 */
263static uint32_t mmc_decode_and_save_cid(struct mmc_card *card,
264 uint32_t *raw_cid)
265{
266 struct mmc_cid mmc_cid;
267 uint32_t mmc_sizeof = 0;
268 int i = 0;
269
270 if (!raw_cid) {
271 return 1;
272 }
273
274 mmc_sizeof = sizeof(uint32_t) * 8;
275
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700276 if (MMC_CARD_SD(card)) {
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700277 mmc_cid.mid = UNPACK_BITS(raw_cid, 120, 8, mmc_sizeof);
278 mmc_cid.oid = UNPACK_BITS(raw_cid, 104, 16, mmc_sizeof);
279
280 for (i = 0; i < 5; i++) {
281 mmc_cid.pnm[i] = (uint8_t)UNPACK_BITS(raw_cid,
282 (104 - 8 * (i + 1)),
283 8,
284 mmc_sizeof);
285 }
286 mmc_cid.pnm[5] = 0;
287 mmc_cid.pnm[6] = 0;
288
289 mmc_cid.prv = UNPACK_BITS(raw_cid, 56, 8, mmc_sizeof);
David Ng571b8c32013-07-30 19:17:42 -0700290 mmc_cid.psn = UNPACK_BITS(raw_cid, 24, 32, mmc_sizeof);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700291 mmc_cid.month = UNPACK_BITS(raw_cid, 8, 4, mmc_sizeof);
292 mmc_cid.year = UNPACK_BITS(raw_cid, 12, 8, mmc_sizeof);
293 mmc_cid.year += 2000;
294 } else {
295 mmc_cid.mid = UNPACK_BITS(raw_cid, 120, 8, mmc_sizeof);
296 mmc_cid.oid = UNPACK_BITS(raw_cid, 104, 16, mmc_sizeof);
297
298 for (i = 0; i < 6; i++) {
299 mmc_cid.pnm[i] = (uint8_t)UNPACK_BITS(raw_cid, (104 - 8 * (i + 1)),
300 8, mmc_sizeof);
301 }
302 mmc_cid.pnm[6] = 0;
303
304 mmc_cid.prv = UNPACK_BITS(raw_cid, 48, 8, mmc_sizeof);
David Ng571b8c32013-07-30 19:17:42 -0700305 mmc_cid.psn = UNPACK_BITS(raw_cid, 16, 32, mmc_sizeof);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700306 mmc_cid.month = UNPACK_BITS(raw_cid, 8, 4, mmc_sizeof);
307 mmc_cid.year = UNPACK_BITS(raw_cid, 12, 4, mmc_sizeof);
308 mmc_cid.year += 1997;
309 }
310
311 /* save it in card database */
312 memcpy((struct mmc_cid *)&card->cid,
313 (struct mmc_cid *)&mmc_cid, sizeof(struct mmc_cid));
314
315 dprintf(SPEW, "Decoded CID fields:\n");
316 dprintf(SPEW, "Manufacturer ID: %x\n", mmc_cid.mid);
317 dprintf(SPEW, "OEM ID: 0x%x\n", mmc_cid.oid);
318 dprintf(SPEW, "Product Name: %s\n", mmc_cid.pnm);
319 dprintf(SPEW, "Product revision: %d.%d\n", (mmc_cid.prv >> 4),
320 (mmc_cid.prv & 0xF));
321 dprintf(SPEW, "Product serial number: %X\n", mmc_cid.psn);
322 dprintf(SPEW, "Manufacturing date: %d %d\n", mmc_cid.month, mmc_cid.year);
323
324 return 0;
325}
326
327/*
328 * Function: mmc reset cards
329 * Arg : host structure
330 * Return : 0 on Success, 1 on Failure
331 * Flow : Reset all the cards to idle condition (CMD 0)
332 */
333static uint8_t mmc_reset_card(struct sdhci_host *host)
334{
335 struct mmc_command cmd;
336
337 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
338
339 cmd.cmd_index = CMD0_GO_IDLE_STATE;
340 cmd.argument = 0;
341 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
342 cmd.resp_type = SDHCI_CMD_RESP_NONE;
343
344 /* send command */
345 return sdhci_send_command(host, &cmd);
346}
347
348/*
349 * Function: mmc operations command
350 * Arg : host & card structure
351 * Return : 0 on Success, 1 on Failure
352 * Flow : Send CMD1 to know whether the card supports host VDD profile or not.
353 */
354static uint32_t mmc_send_op_cond(struct sdhci_host *host, struct mmc_card *card)
355{
356 struct mmc_command cmd;
357 uint32_t mmc_resp = 0;
358 uint32_t mmc_ret = 0;
359 uint32_t mmc_retry = 0;
360
361 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
362
363 /* CMD1 format:
364 * [31] Busy bit
365 * [30:29] Access mode
366 * [28:24] reserved
367 * [23:15] 2.7-3.6
368 * [14:8] 2.0-2.6
369 * [7] 1.7-1.95
370 * [6:0] reserved
371 */
372
373 cmd.cmd_index = CMD1_SEND_OP_COND;
374 cmd.argument = card->ocr;
375 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
376 cmd.resp_type = SDHCI_CMD_RESP_R3;
377
378 do {
379 mmc_ret = sdhci_send_command(host, &cmd);
380 if (mmc_ret)
381 return mmc_ret;
382
383 /* Command returned success, now it's time to examine response */
384 mmc_resp = cmd.resp[0];
385
386 /* Check the response for busy status */
387 if (!(mmc_resp & MMC_OCR_BUSY)) {
388 mmc_retry++;
389 mdelay(1);
390 continue;
391 } else
392 break;
393 } while (mmc_retry < MMC_MAX_COMMAND_RETRY);
394
395 /* If we reached here after max retries, we failed to get OCR */
396 if (mmc_retry == MMC_MAX_COMMAND_RETRY && !(mmc_resp & MMC_OCR_BUSY)) {
397 dprintf(CRITICAL, "Card has busy status set. Init did not complete\n");
398 return 1;
399 }
400
401 /* Response contains card's ocr. Update card's information */
402 card->ocr = mmc_resp;
403
404 if (mmc_resp & MMC_OCR_SEC_MODE)
405 card->type = MMC_TYPE_MMCHC;
406 else
407 card->type = MMC_TYPE_STD_MMC;
408
409 return 0;
410}
411
412/*
413 * Function: mmc send cid
414 * Arg : host & card structure
415 * Return : 0 on Success, 1 on Failure
416 * Flow : Request any card to send its uniquie card identification
417 * (CID) number (CMD2).
418 */
419static uint32_t mmc_all_send_cid(struct sdhci_host *host, struct mmc_card *card)
420{
421 struct mmc_command cmd;
422 uint32_t mmc_ret = 0;
423
424 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
425
426 /* CMD2 Format:
427 * [31:0] stuff bits
428 */
429 cmd.cmd_index = CMD2_ALL_SEND_CID;
430 cmd.argument = 0;
431 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
432 cmd.resp_type = SDHCI_CMD_RESP_R2;
433
434 /* send command */
435 mmc_ret = sdhci_send_command(host, &cmd);
436 if (mmc_ret) {
437 return mmc_ret;
438 }
439
440 /* Response contains card's 128 bits CID register */
441 mmc_ret = mmc_decode_and_save_cid(card, cmd.resp);
442 if (mmc_ret) {
443 return mmc_ret;
444 }
445
446 return 0;
447}
448
449/*
450 * Function: mmc send relative address
451 * Arg : host & card structure
452 * Return : 0 on Success, 1 on Failure
453 * Flow : Ask card to send it's relative card address (RCA).
454 * This RCA number is shorter than CID and is used by
455 * the host to address the card in future (CMD3)
456 */
457static uint32_t mmc_send_relative_address(struct sdhci_host *host,
458 struct mmc_card *card)
459{
460 struct mmc_command cmd;
461 uint32_t mmc_ret = 0;
462
463 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
464
465 /* CMD3 Format:
466 * [31:0] stuff bits
467 */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700468 if (MMC_CARD_SD(card)) {
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700469 cmd.cmd_index = CMD3_SEND_RELATIVE_ADDR;
470 cmd.argument = 0;
471 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
472 cmd.resp_type = SDHCI_CMD_RESP_R6;
473
474 /* send command */
475 mmc_ret = sdhci_send_command(host, &cmd);
476 if (mmc_ret)
477 return mmc_ret;
478
479 /* For sD, card will send RCA. Store it */
480 card->rca = (cmd.resp[0] >> 16);
481 } else {
482 cmd.cmd_index = CMD3_SEND_RELATIVE_ADDR;
483 cmd.argument = (MMC_RCA << 16);
484 card->rca = (cmd.argument >> 16);
485 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
486 cmd.resp_type = SDHCI_CMD_RESP_R6;
487
488 /* send command */
489 mmc_ret = sdhci_send_command(host, &cmd);
490 if (mmc_ret)
491 return mmc_ret;
492 }
493
494 return 0;
495}
496
497/*
498 * Function: mmc send csd
499 * Arg : host, card structure & o/p arg to store csd
500 * Return : 0 on Success, 1 on Failure
501 * Flow : Requests card to send it's CSD register's contents. (CMD9)
502 */
503static uint32_t mmc_send_csd(struct sdhci_host *host, struct mmc_card *card)
504{
505 struct mmc_command cmd;
506 uint32_t mmc_arg = 0;
507 uint32_t mmc_ret = 0;
508
509 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
510
511 /* CMD9 Format:
512 * [31:16] RCA
513 * [15:0] stuff bits
514 */
515 mmc_arg |= card->rca << 16;
516
517 cmd.cmd_index = CMD9_SEND_CSD;
518 cmd.argument = mmc_arg;
519 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
520 cmd.resp_type = SDHCI_CMD_RESP_R2;
521
522 /* send command */
523 mmc_ret = sdhci_send_command(host, &cmd);
524 if (mmc_ret)
525 return mmc_ret;
526
527 /* response contains the card csd */
528 memcpy(card->raw_csd, cmd.resp, sizeof(cmd.resp));
529
530 return 0;
531}
532
533/*
534 * Function: mmc select card
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700535 * Arg : host, card structure
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700536 * Return : 0 on Success, 1 on Failure
537 * Flow : Selects a card by sending CMD7 to the card with its RCA.
538 * If RCA field is set as 0 ( or any other address ),
539 * the card will be de-selected. (CMD7)
540 */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700541static uint32_t mmc_select_card(struct sdhci_host *host, struct mmc_card *card)
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700542{
543 struct mmc_command cmd;
544 uint32_t mmc_arg = 0;
545 uint32_t mmc_ret = 0;
546
547 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
548
549 /* CMD7 Format:
550 * [31:16] RCA
551 * [15:0] stuff bits
552 */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700553 mmc_arg |= card->rca << 16;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700554
555 cmd.cmd_index = CMD7_SELECT_DESELECT_CARD;
556 cmd.argument = mmc_arg;
557 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
558
559 /* If we are deselecting card, we do not get response */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700560 if (card->rca) {
561 if (MMC_CARD_SD(card))
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700562 cmd.resp_type = SDHCI_CMD_RESP_R1B;
563 else
564 cmd.resp_type = SDHCI_CMD_RESP_R1;
565 } else
566 cmd.resp_type = SDHCI_CMD_RESP_NONE;
567
568 /* send command */
569 mmc_ret = sdhci_send_command(host, &cmd);
570 if (mmc_ret)
571 return mmc_ret;
572
573 return 0;
574}
575
576/*
577 * Function: mmc set block len
578 * Arg : host, card structure & block length
579 * Return : 0 on Success, 1 on Failure
580 * Flow : Send command to set block length.
581 */
582static uint32_t mmc_set_block_len(struct sdhci_host *host,
583 struct mmc_card *card,
584 uint32_t block_len)
585{
586 struct mmc_command cmd;
587 uint32_t mmc_ret = 0;
588
589 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
590
591 /* CMD16 Format:
592 * [31:0] block length
593 */
594
595 cmd.cmd_index = CMD16_SET_BLOCKLEN;
596 cmd.argument = block_len;
597 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
598 cmd.resp_type = SDHCI_CMD_RESP_R1;
599
600 /* send command */
601 mmc_ret = sdhci_send_command(host, &cmd);
602 if (mmc_ret)
603 return mmc_ret;
604
605 /*
606 * If blocklength is larger than 512 bytes,
607 * the card sets BLOCK_LEN_ERROR bit.
608 */
609 if (cmd.resp[0] & MMC_R1_BLOCK_LEN_ERR) {
610 dprintf(CRITICAL, "The block length is not supported by the card\n");
611 return 1;
612 }
613
614 return 0;
615}
616
617/*
618 * Function: mmc get card status
619 * Arg : host, card structure & o/p argument card status
620 * Return : 0 on Success, 1 on Failure
621 * Flow : Get the current status of the card
622 */
623static uint32_t mmc_get_card_status(struct sdhci_host *host,
624 struct mmc_card *card, uint32_t *status)
625{
626 struct mmc_command cmd;
627 uint32_t mmc_ret = 0;
628
629 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
630
631 /* CMD13 Format:
632 * [31:16] RCA
633 * [15:0] stuff bits
634 */
635 cmd.cmd_index = CMD13_SEND_STATUS;
636 cmd.argument = card->rca << 16;
637 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
638 cmd.resp_type = SDHCI_CMD_RESP_R1;
639
640 /* send command */
641 mmc_ret = sdhci_send_command(host, &cmd);
642 if (mmc_ret)
643 return mmc_ret;
644
645 /* Checking ADDR_OUT_OF_RANGE error in CMD13 response */
646 if ((cmd.resp[0] >> 31) & 0x01)
647 return 1;
648
649 *status = cmd.resp[0];
650 return 0;
651}
652
653/*
654 * Function: mmc get ext csd
655 * Arg : host, card structure & array to hold ext attributes
656 * Return : 0 on Success, 1 on Failure
657 * Flow : Send ext csd command & get the card attributes
658 */
659static uint32_t mmc_get_ext_csd(struct sdhci_host *host, struct mmc_card *card)
660{
661 struct mmc_command cmd;
662 uint32_t mmc_ret = 0;
663
664 card->ext_csd = memalign(CACHE_LINE, ROUNDUP(512, CACHE_LINE));
665
666 ASSERT(card->ext_csd);
667
668 memset(card->ext_csd, 0, sizeof(card->ext_csd));
669
670 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
671
672 /* CMD8 */
673 cmd.cmd_index = CMD8_SEND_EXT_CSD;
674 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
675 cmd.resp_type = SDHCI_CMD_RESP_R1;
676 cmd.data.data_ptr = card->ext_csd;
677 cmd.data.num_blocks = 1;
678 cmd.data_present = 0x1;
679 cmd.trans_mode = SDHCI_MMC_READ;
680
681 /* send command */
682 mmc_ret = sdhci_send_command(host, &cmd);
683 if (mmc_ret)
684 return mmc_ret;
685
686 return mmc_ret;
687}
688
689/*
690 * Function: mmc switch command
691 * Arg : Host, card structure, access mode, index & value to be set
692 * Return : 0 on Success, 1 on Failure
693 * Flow : Send switch command to the card to set the ext attribute @ index
694 */
695static uint32_t mmc_switch_cmd(struct sdhci_host *host, struct mmc_card *card,
696 uint32_t access, uint32_t index, uint32_t value)
697{
698
699 struct mmc_command cmd;
700 uint32_t mmc_ret = 0;
701 uint32_t mmc_status;
702
703 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
704
705 /* CMD6 Format:
706 * [31:26] set to 0
707 * [25:24] access
708 * [23:16] index
709 * [15:8] value
710 * [7:3] set to 0
711 * [2:0] cmd set
712 */
713 cmd.cmd_index = CMD6_SWITCH_FUNC;
714 cmd.argument |= (access << 24);
715 cmd.argument |= (index << 16);
716 cmd.argument |= (value << 8);
717 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
718 cmd.resp_type = SDHCI_CMD_RESP_R1B;
719
720 mmc_ret = sdhci_send_command(host, &cmd);
721 if (mmc_ret) {
722 dprintf(CRITICAL, "CMD6 send failed\n");
723 return mmc_ret;
724 }
725
726 /* Check if the card completed the switch command processing */
727 mmc_ret = mmc_get_card_status(host, card, &mmc_status);
728 if (mmc_ret) {
729 dprintf(CRITICAL, "Get card status failed\n");
730 return mmc_ret;
731 }
732
733 if (MMC_CARD_STATUS(mmc_status) != MMC_TRAN_STATE) {
734 dprintf(CRITICAL, "Switch cmd failed. Card not in tran state\n");
735 mmc_ret = 1;
736 }
737
738 if (mmc_status & MMC_SWITCH_FUNC_ERR_FLAG) {
739 dprintf(CRITICAL, "Switch cmd failed. Switch Error.\n");
740 mmc_ret = 1;
741 }
742
743 return mmc_ret;
744}
745
746/*
747 * Function: mmc set bus width
748 * Arg : Host, card structure & width
749 * Return : 0 on Success, 1 on Failure
750 * Flow : Send switch command to set bus width
751 */
752static uint32_t mmc_set_bus_width(struct sdhci_host *host,
753 struct mmc_card *card,
754 uint32_t width)
755{
756 uint32_t mmc_ret = 0;
757
758 mmc_ret = mmc_switch_cmd(host, card, MMC_ACCESS_WRITE,
759 MMC_EXT_MMC_BUS_WIDTH, width);
760
761 if (mmc_ret) {
762 dprintf(CRITICAL, "Switch cmd failed\n");
763 return mmc_ret;
764 }
765
766 return 0;
767}
768
769
770/*
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700771 * Function: mmc card supports hs400 mode
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700772 * Arg : None
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700773 * Return : 1 if hs400 mode is supported, 0 otherwise
774 * Flow : Check the ext csd attributes of the card
775 */
776static uint8_t mmc_card_supports_hs400_mode(struct mmc_card *card)
777{
778 if (card->ext_csd[MMC_DEVICE_TYPE] & MMC_HS_HS400_MODE)
779 return 1;
780 else
781 return 0;
782}
783
784/*
785 * Function: mmc card supports hs200 mode
786 * Arg : None
787 * Return : 1 if HS200 mode is supported, 0 otherwise
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700788 * Flow : Check the ext csd attributes of the card
789 */
790static uint8_t mmc_card_supports_hs200_mode(struct mmc_card *card)
791{
792 if (card->ext_csd[MMC_DEVICE_TYPE] & MMC_HS_HS200_MODE)
793 return 1;
794 else
795 return 0;
796}
797
798/*
799 * Function: mmc card supports ddr mode
800 * Arg : None
801 * Return : 1 if DDR mode is supported, 0 otherwise
802 * Flow : Check the ext csd attributes of the card
803 */
804static uint8_t mmc_card_supports_ddr_mode(struct mmc_card *card)
805{
806 if (card->ext_csd[MMC_DEVICE_TYPE] & MMC_HS_DDR_MODE)
807 return 1;
808 else
809 return 0;
810}
811
812/*
813 * Function : Enable HS200 mode
814 * Arg : Host, card structure and bus width
815 * Return : 0 on Success, 1 on Failure
816 * Flow :
817 * - Set the bus width to 4/8 bit SDR as supported by the target & host
818 * - Set the HS_TIMING on ext_csd 185 for the card
819 */
820static uint32_t mmc_set_hs200_mode(struct sdhci_host *host,
821 struct mmc_card *card, uint32_t width)
822{
823 uint32_t mmc_ret = 0;
824
825 /* Set 4/8 bit SDR bus width */
826 mmc_ret = mmc_set_bus_width(host, card, width);
827 if (mmc_ret) {
828 dprintf(CRITICAL, "Failure to set wide bus for Card(RCA:%x)\n",
829 card->rca);
830 return mmc_ret;
831 }
832
833 /* Setting HS200 in HS_TIMING using EXT_CSD (CMD6) */
834 mmc_ret = mmc_switch_cmd(host, card, MMC_ACCESS_WRITE, MMC_EXT_MMC_HS_TIMING, MMC_HS200_TIMING);
835
836 if (mmc_ret) {
837 dprintf(CRITICAL, "Switch cmd returned failure %d\n", __LINE__);
838 return mmc_ret;
839 }
840
Channagoud Kadabi1dc6aab2013-11-20 12:46:15 -0800841 /* Enable SDR104 mode in controller */
842 sdhci_set_uhs_mode(host, SDHCI_SDR104_MODE);
843
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700844 /* Run the clock @ 400 Mhz */
Channagoud Kadabie9168e82014-01-28 21:33:34 -0800845 if (host->caps.hs400_support && mmc_card_supports_hs400_mode(card))
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700846 {
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700847 /* Save the timing value, before changing the clock */
848 MMC_SAVE_TIMING(host, MMC_HS400_TIMING);
Channagoud Kadabi86756c12014-03-12 17:16:39 -0700849 /*
850 * Set the MCI_CLK divider before changing the sdcc core
851 * core clk to ensure card receives no more than 200 MHZ
852 * clock frequency
853 */
854 sdhci_msm_set_mci_clk(host);
855 clock_config_mmc(host->msm_host->slot, SDHCI_CLK_400MHZ);
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700856 }
857 else
858 {
859 /* Save the timing value, before changing the clock */
860 MMC_SAVE_TIMING(host, MMC_HS200_TIMING);
861 }
862
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700863 /* Execute Tuning for hs200 mode */
864 if ((mmc_ret = sdhci_msm_execute_tuning(host, width)))
865 dprintf(CRITICAL, "Tuning for hs200 failed\n");
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700866
867 return mmc_ret;
868}
869
870/*
871 * Function: mmc set ddr mode
872 * Arg : Host & card structure
873 * Return : 0 on Success, 1 on Failure
874 * Flow : Set bus width for ddr mode & set controller in DDR mode
875*/
876static uint8_t mmc_set_ddr_mode(struct sdhci_host *host, struct mmc_card *card)
877{
878 uint8_t mmc_ret = 0;
879
880 /* Set width for 8 bit DDR mode by default */
881 mmc_ret = mmc_set_bus_width(host, card, DATA_DDR_BUS_WIDTH_8BIT);
882
883 if (mmc_ret) {
884 dprintf(CRITICAL, "Failure to set DDR mode for Card(RCA:%x)\n",
885 card->rca);
886 return mmc_ret;
887 }
888
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700889 /* Save the timing value, before changing the clock */
890 MMC_SAVE_TIMING(host, SDHCI_DDR50_MODE);
891
892 /* Set the DDR mode in controller */
893 sdhci_set_uhs_mode(host, SDHCI_DDR50_MODE);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700894
895 return 0;
896}
897
898/*
899 * Function: mmc set high speed interface
900 * Arg : Host & card structure
901 * Return : None
902 * Flow : Sets the sdcc clock & clock divider in the host controller
903 * Adjust the interface speed to optimal speed
904 */
905static uint32_t mmc_set_hs_interface(struct sdhci_host *host,
906 struct mmc_card *card)
907{
908 uint32_t mmc_ret = 0;
909
910 /* Setting HS_TIMING in EXT_CSD (CMD6) */
911 mmc_ret = mmc_switch_cmd(host, card, MMC_ACCESS_WRITE,
912 MMC_EXT_MMC_HS_TIMING, MMC_HS_TIMING);
913
914 if (mmc_ret) {
915 dprintf(CRITICAL, "Switch cmd returned failure %d\n", __LINE__);
916 return mmc_ret;
917 }
918
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700919 /* Save the timing value, before changing the clock */
920 MMC_SAVE_TIMING(host, SDHCI_SDR25_MODE);
921
922 /* Set the SDR25 mode in controller */
923 sdhci_set_uhs_mode(host, SDHCI_SDR25_MODE);
924
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700925 return 0;
926}
927
928/*
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700929 * Function : Enable HS400 mode
930 * Arg : Host, card structure and bus width
931 * Return : 0 on Success, 1 on Failure
932 * Flow :
933 * - Set the bus width to 8 bit DDR
934 * - Set the HS_TIMING on ext_csd 185 for the card
935 */
936uint32_t mmc_set_hs400_mode(struct sdhci_host *host,
937 struct mmc_card *card, uint32_t width)
938{
939 uint32_t mmc_ret = 0;
940
941 /*
942 * Emmc 5.0 spec does not allow changing to hs400 mode directly
943 * Need to follow the sequence to change to hs400 mode
944 * 1. Enable HS200 mode, perform tuning
945 * 2. Change to high speed mode
946 * 3. Enable DDR mode
947 * 4. Enable HS400 mode & execute tuning
948 */
949
950 /* HS400 mode is supported only in DDR 8-bit */
951 if (width != DATA_BUS_WIDTH_8BIT)
952 {
953 dprintf(CRITICAL, "Bus width is not 8-bit, cannot switch to hs400: %u\n", width);
954 return 1;
955 }
956
957 /* 1.Enable HS200 mode */
958 mmc_ret = mmc_set_hs200_mode(host, card, width);
959
960 if (mmc_ret)
961 {
962 dprintf(CRITICAL, "Failure Setting HS200 mode %s\t%d\n",__func__, __LINE__);
963 return mmc_ret;
964 }
965
966 /* 2. Enable High speed mode */
967 /* This is needed to set the clock to a low value &
968 * so that we can switch to hs_timing --> 0x1 */
969 /* Save the timing value, before changing the clock */
970 MMC_SAVE_TIMING(host, SDHCI_SDR12_MODE);
971 sdhci_set_uhs_mode(host, SDHCI_SDR12_MODE);
972
973 /* 3. Set HS_TIMING to 0x1 */
974 mmc_ret = mmc_set_hs_interface(host, card);
975 if (mmc_ret)
976 {
977 dprintf(CRITICAL, "Error adjusting interface speed!:%s\t%d\n", __func__, __LINE__);
978 return mmc_ret;
979 }
980
981 /*4. Enable DDR mode */
982 mmc_ret = mmc_set_ddr_mode(host, card);
983 if (mmc_ret)
984 {
985 dprintf(CRITICAL, "Failure setting DDR mode:%s\t%d\n", __func__, __LINE__);
986 return mmc_ret;
987 }
988
989 /*5. Set hs400 timing */
990 mmc_ret = mmc_switch_cmd(host, card, MMC_ACCESS_WRITE, MMC_EXT_MMC_HS_TIMING, MMC_HS400_TIMING);
991
992 if (mmc_ret)
993 {
994 dprintf(CRITICAL, "Switch cmd returned failure %s\t%d\n",__func__, __LINE__);
995 return mmc_ret;
996 }
997
998 /* 6. Enable SDR104 mode in controller */
999 /* Save the timing value, before changing the clock */
1000 MMC_SAVE_TIMING(host, MMC_HS400_TIMING);
1001 sdhci_set_uhs_mode(host, SDHCI_SDR104_MODE);
Channagoud Kadabi86756c12014-03-12 17:16:39 -07001002 /*
1003 * Enable HS400 mode
1004 */
1005 sdhci_msm_set_mci_clk(host);
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001006
1007 /* 7. Execute Tuning for hs400 mode */
1008 if ((mmc_ret = sdhci_msm_execute_tuning(host, width)))
1009 dprintf(CRITICAL, "Tuning for hs400 failed\n");
1010
1011 return mmc_ret;
1012}
1013
1014/*
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001015 * Function: mmc_host_init
1016 * Arg : mmc device structure
1017 * Return : 0 on success, 1 on Failure
1018 * Flow : Initialize the host contoller
1019 * Set the clock rate to 400 KHZ for init
1020 */
1021static uint8_t mmc_host_init(struct mmc_device *dev)
1022{
1023 uint8_t mmc_ret = 0;
1024
1025 struct sdhci_host *host;
1026 struct mmc_config_data *cfg;
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001027 struct sdhci_msm_data *data;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001028
1029 event_t sdhc_event;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001030
1031 host = &dev->host;
1032 cfg = &dev->config;
1033
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001034 event_init(&sdhc_event, false, EVENT_FLAG_AUTOUNSIGNAL);
1035
1036 host->base = cfg->sdhc_base;
1037 host->sdhc_event = &sdhc_event;
1038
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001039 data = (struct sdhci_msm_data *) malloc(sizeof(struct sdhci_msm_data));
1040 ASSERT(data);
1041
1042 data->sdhc_event = &sdhc_event;
1043 data->pwrctl_base = cfg->pwrctl_base;
1044 data->pwr_irq = cfg->pwr_irq;
1045 data->slot = cfg->slot;
1046
1047 host->msm_host = data;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001048
Channagoud Kadabi4b2f9672013-08-08 17:44:03 -07001049 /* Initialize any clocks needed for SDC controller */
1050 clock_init_mmc(cfg->slot);
1051
1052 clock_config_mmc(cfg->slot, cfg->max_clk_rate);
1053
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001054 /*
1055 * MSM specific sdhc init
1056 */
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001057 sdhci_msm_init(host, data);
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001058
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001059 /*
1060 * Initialize the controller, read the host capabilities
1061 * set power on mode
1062 */
1063 sdhci_init(host);
1064
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001065 /* Setup initial freq to 400KHz */
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001066 mmc_ret = sdhci_clk_supply(host, SDHCI_CLK_400KHZ);
1067
1068 return mmc_ret;
1069}
1070
1071/*
1072 * Function: mmc identify card
1073 * Arg : host & card structure
1074 * Return : 0 on Success, 1 on Failure
1075 * Flow : Performs card identification process:
1076 * 1. Get card's unique identification number (CID)
1077 * 2. Get(for sd)/set (for mmc) relative card address (RCA)
1078 * 3. Select the card to put it in TRAN state
1079 */
1080static uint32_t mmc_identify_card(struct sdhci_host *host, struct mmc_card *card)
1081{
1082 uint32_t mmc_return = 0;
1083 uint32_t raw_csd[4];
1084
1085 /* Ask card to send its unique card identification (CID) number (CMD2) */
1086 mmc_return = mmc_all_send_cid(host, card);
1087 if (mmc_return) {
1088 dprintf(CRITICAL,"Failure getting card's CID number!\n");
1089 return mmc_return;
1090 }
1091
1092 /* Ask card to send a relative card address (RCA) (CMD3) */
1093 mmc_return = mmc_send_relative_address(host, card);
1094 if (mmc_return) {
1095 dprintf(CRITICAL, "Failure getting card's RCA!\n");
1096 return mmc_return;
1097 }
1098
1099 /* Get card's CSD register (CMD9) */
1100 mmc_return = mmc_send_csd(host, card);
1101 if (mmc_return) {
1102 dprintf(CRITICAL,"Failure getting card's CSD information!\n");
1103 return mmc_return;
1104 }
1105
1106 /* Select the card (CMD7) */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001107 mmc_return = mmc_select_card(host, card);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001108 if (mmc_return) {
1109 dprintf(CRITICAL, "Failure selecting the Card with RCA: %x\n",card->rca);
1110 return mmc_return;
1111 }
1112
1113 /* Set the card status as active */
1114 card->status = MMC_STATUS_ACTIVE;
1115
1116 return 0;
1117}
1118
1119/*
1120 * Function: mmc_reset_card_and_send_op
1121 * Arg : Host & Card structure
1122 * Return : 0 on Success, 1 on Failure
1123 * Flow : Routine to initialize MMC card. It resets a card to idle state,
1124 * verify operating voltage and set the card in ready state.
1125 */
1126static uint32_t mmc_reset_card_and_send_op(struct sdhci_host *host, struct mmc_card *card)
1127{
1128 uint32_t mmc_return = 0;
1129
1130 /* 1. Card Reset - CMD0 */
1131 mmc_return = mmc_reset_card(host);
1132 if (mmc_return) {
1133 dprintf(CRITICAL, "Failure resetting MMC cards!\n");
1134 return mmc_return;
1135 }
1136
1137 /* 2. Card Initialization process */
1138
1139 /*
1140 * Send CMD1 to identify and reject cards that do not match host's VDD range
1141 * profile. Cards sends its OCR register in response.
1142 */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001143
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001144 mmc_return = mmc_send_op_cond(host, card);
1145
1146 /* OCR is not received, init could not complete */
1147 if (mmc_return) {
1148 dprintf(CRITICAL, "Failure getting OCR response from MMC Card\n");
1149 return mmc_return;
1150 }
1151
1152 return 0;
1153}
1154
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001155static uint32_t mmc_send_app_cmd(struct sdhci_host *host, struct mmc_card *card)
1156{
1157 struct mmc_command cmd = {0};
1158
1159 cmd.cmd_index = CMD55_APP_CMD;
1160 cmd.argument = (card->rca << 16);
1161 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1162 cmd.resp_type = SDHCI_CMD_RESP_R1;
1163
1164 if (sdhci_send_command(host, &cmd))
1165 {
1166 dprintf(CRITICAL, "Failed Sending CMD55\n");
1167 return 1;
1168 }
1169 return 0;
1170}
1171
1172uint32_t mmc_sd_card_init(struct sdhci_host *host, struct mmc_card *card)
1173{
1174 uint8_t i;
1175 uint32_t mmc_ret;
1176 struct mmc_command cmd;
1177
1178 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
1179
1180 /* Use the SD card RCA 0x0 during init */
1181 card->rca = SD_CARD_RCA;
1182
1183 /* Send CMD8 for voltage check*/
1184 for (i = 0 ;i < SD_CMD8_MAX_RETRY; i++)
1185 {
1186 cmd.cmd_index = CMD8_SEND_IF_COND;
1187 cmd.argument = MMC_SD_HC_VOLT_SUPPLIED;
1188 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1189 cmd.resp_type = SDHCI_CMD_RESP_R7;
1190
1191 if (sdhci_send_command(host, &cmd))
1192 {
1193 dprintf(CRITICAL, "The response for CMD8 does not match the supplied value\n");
1194 return 1;
1195 }
1196 else
1197 {
1198 /* If the command response echos the voltage back */
1199 if (cmd.resp[0] == MMC_SD_HC_VOLT_SUPPLIED)
1200 break;
1201 }
1202 /* As per SDCC the spec try for max three times with
1203 * 1 ms delay
1204 */
1205 mdelay(1);
1206 }
1207
1208 if (i == SD_CMD8_MAX_RETRY && (cmd.resp[0] != MMC_SD_HC_VOLT_SUPPLIED))
1209 {
1210 dprintf(CRITICAL, "Error: CMD8 response timed out\n");
1211 return 1;
1212 }
1213
1214 /* Send ACMD41 for OCR */
1215 for (i = 0; i < SD_ACMD41_MAX_RETRY; i++)
1216 {
1217 /* Send APP_CMD before ACMD41*/
1218 if (mmc_send_app_cmd(host, card))
1219 {
1220 dprintf(CRITICAL, "Failed sending App command\n");
1221 return 1;
1222 }
1223
1224 /* APP_CMD is successful, send ACMD41 now */
1225 cmd.cmd_index = ACMD41_SEND_OP_COND;
1226 cmd.argument = MMC_SD_OCR | MMC_SD_HC_HCS;
1227 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1228 cmd.resp_type = SDHCI_CMD_RESP_R3;
1229
1230 if (sdhci_send_command(host, &cmd))
1231 {
1232 dprintf(CRITICAL, "Failure sending ACMD41\n");
1233 return 1;
1234 }
1235 else
1236 {
1237 if (cmd.resp[0] & MMC_SD_DEV_READY)
1238 {
1239 if (cmd.resp[0] & (1 << 30))
1240 card->type = MMC_CARD_TYPE_SDHC;
1241 else
1242 card->type = MMC_CARD_TYPE_STD_SD;
1243
1244 break;
1245 }
1246 }
1247 /*
1248 * As per SDCC spec try for max 1 second
1249 */
1250 mdelay(50);
1251 }
1252
1253 if (i == SD_ACMD41_MAX_RETRY && !(cmd.resp[0] & MMC_SD_DEV_READY))
1254 {
1255 dprintf(CRITICAL, "Error: ACMD41 response timed out\n");
1256 return 1;
1257 }
1258
1259 return 0;
1260}
1261
1262/*
1263 * Function to read SD card information from SD status
1264 */
1265static uint32_t mmc_sd_get_card_ssr(struct sdhci_host *host, struct mmc_card *card)
1266{
1267 BUF_DMA_ALIGN(raw_sd_status, 64);
1268 struct mmc_command cmd = {0};
1269 uint32_t sd_status[16];
1270 uint32_t *status = sd_status;
1271 uint32_t au_size;
1272 int i;
1273 int j;
1274
1275 if (mmc_send_app_cmd(host, card))
1276 {
1277 dprintf(CRITICAL, "Failed sending App command\n");
1278 return 1;
1279 }
1280
1281 cmd.cmd_index = ACMD13_SEND_SD_STATUS;
1282 cmd.argument = 0x0;
1283 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1284 cmd.resp_type = SDHCI_CMD_RESP_R2;
1285 cmd.trans_mode = SDHCI_MMC_READ;
1286 cmd.data_present = 0x1;
1287 cmd.data.data_ptr = raw_sd_status;
1288 cmd.data.num_blocks = 0x1;
1289 cmd.data.blk_sz = 0x40;
1290
1291 /* send command */
1292 if (sdhci_send_command(host, &cmd))
1293 return 1;
1294
1295 memcpy(sd_status, raw_sd_status, sizeof(sd_status));
1296
1297 for (i = 15, j = 0; i >=0 ; i--, j++)
1298 sd_status[i] = swap_endian32(sd_status[j]);
1299
1300 au_size = UNPACK_BITS(status, MMC_SD_AU_SIZE_BIT, MMC_SD_AU_SIZE_LEN, 32);
1301 /* Card AU size in sectors */
1302 card->ssr.au_size = 1 << (au_size + 4);
1303 card->ssr.num_aus = UNPACK_BITS(status, MMC_SD_ERASE_SIZE_BIT, MMC_SD_ERASE_SIZE_LEN, 32);
1304
1305 return 0;
1306}
1307
1308/*
1309 * Function to read the SD CARD configuration register
1310 */
1311static uint32_t mmc_sd_get_card_scr(struct sdhci_host *host, struct mmc_card *card)
1312{
1313 BUF_DMA_ALIGN(scr_resp, 8);
1314 struct mmc_command cmd = {0};
1315 uint32_t raw_scr[2];
1316
1317 /* Now read the SCR register */
1318 /* Send APP_CMD before ACMD51*/
1319 if (mmc_send_app_cmd(host, card))
1320 {
1321 dprintf(CRITICAL, "Failed sending App command\n");
1322 return 1;
1323 }
1324
1325 cmd.cmd_index = ACMD51_READ_CARD_SCR;
1326 cmd.argument = 0x0;
1327 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1328 cmd.resp_type = SDHCI_CMD_RESP_R1;
1329 cmd.trans_mode = SDHCI_MMC_READ;
1330 cmd.data_present = 0x1;
1331 cmd.data.data_ptr = scr_resp;
1332 cmd.data.num_blocks = 0x1;
1333 cmd.data.blk_sz = 0x8;
1334
1335 /* send command */
1336 if (sdhci_send_command(host, &cmd))
1337 return 1;
1338
1339 memcpy(raw_scr, scr_resp, sizeof(raw_scr));
1340
1341 card->raw_scr[0] = swap_endian32(raw_scr[0]);
1342 card->raw_scr[1] = swap_endian32(raw_scr[1]);
1343
1344 /*
1345 * Parse & Populate the SCR data as per sdcc spec
1346 */
1347 card->scr.bus_widths = (card->raw_scr[0] & SD_SCR_BUS_WIDTH_MASK) >> SD_SCR_BUS_WIDTH;
1348 card->scr.cmd23_support = (card->raw_scr[0] & SD_SCR_CMD23_SUPPORT);
1349 card->scr.sd_spec = (card->raw_scr[0] & SD_SCR_SD_SPEC_MASK) >> SD_SCR_SD_SPEC;
1350 card->scr.sd3_spec = (card->raw_scr[0] & SD_SCR_SD_SPEC3_MASK) >> SD_SCR_SD_SPEC3;
1351
1352 return 0;
1353}
1354
1355/*
1356 * Function: mmc_set_sd_bus_width
1357 * Arg : host, device structure & width
1358 * Return : 0 on Success, 1 on Failure
1359 * Flow : Set the bus width for the card
1360 */
1361uint32_t mmc_sd_set_bus_width(struct sdhci_host *host, struct mmc_card *card, uint8_t width)
1362{
1363 struct mmc_command cmd = {0};
1364
1365 /* Send APP_CMD before ACMD6*/
1366 if (mmc_send_app_cmd(host, card))
1367 {
1368 dprintf(CRITICAL, "Failed sending App command\n");
1369 return 1;
1370 }
1371
1372 cmd.cmd_index = ACMD6_SET_BUS_WIDTH;
1373 cmd.argument = (width == DATA_BUS_WIDTH_4BIT) ? (1<<1) : 0;
1374 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1375 cmd.resp_type = SDHCI_CMD_RESP_R1;
1376
1377 /* send command */
1378 if (sdhci_send_command(host, &cmd))
1379 return 1;
1380
1381 return 0;
1382}
1383
1384uint32_t mmc_sd_set_hs(struct sdhci_host *host, struct mmc_card *card)
1385{
1386 struct mmc_command cmd = {0};
1387 BUF_DMA_ALIGN(switch_resp, 64);
1388
1389 cmd.cmd_index = CMD6_SWITCH_FUNC;
1390 cmd.argument = MMC_SD_SWITCH_HS;
1391 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1392 cmd.resp_type = SDHCI_CMD_RESP_R1;
1393 cmd.trans_mode = SDHCI_MMC_READ;
1394 cmd.data_present = 0x1;
1395 cmd.data.data_ptr = switch_resp;
1396 cmd.data.num_blocks = 0x1;
1397 cmd.data.blk_sz = 0x40;
1398
1399 /* send command */
1400 if (sdhci_send_command(host, &cmd))
1401 return 1;
1402
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001403 /* Set the SDR25 mode in controller*/
1404 sdhci_set_uhs_mode(host, SDHCI_SDR25_MODE);
1405
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001406 return 0;
1407}
1408
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001409/*
1410 * Function: mmc_init_card
1411 * Arg : mmc device structure
1412 * Return : 0 on Success, 1 on Failure
1413 * Flow : Performs initialization and identification of eMMC cards connected
1414 * to the host.
1415 */
1416
1417static uint32_t mmc_card_init(struct mmc_device *dev)
1418{
1419 uint32_t mmc_return = 0;
1420 uint32_t status;
1421 uint8_t bus_width = 0;
1422
1423 struct sdhci_host *host;
1424 struct mmc_card *card;
1425 struct mmc_config_data *cfg;
1426
1427 host = &dev->host;
1428 card = &dev->card;
1429 cfg = &dev->config;
1430
1431 /* Initialize MMC card structure */
1432 card->status = MMC_STATUS_INACTIVE;
1433
1434 /* TODO: Get the OCR params from target */
1435 card->ocr = MMC_OCR_27_36 | MMC_OCR_SEC_MODE;
1436
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001437 /* Initialize the internal MMC */
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001438 mmc_return = mmc_reset_card_and_send_op(host, card);
1439 if (mmc_return)
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001440 {
1441 dprintf(CRITICAL, "MMC card failed to respond, try for SD card\n");
1442 /* Reset the card & get the OCR */
1443 mmc_return = mmc_sd_card_init(host, card);
1444 if (mmc_return)
1445 {
1446 dprintf(CRITICAL, "Failed to initialize SD card\n");
1447 return mmc_return;
1448 }
1449 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001450
1451 /* Identify (CMD2, CMD3 & CMD9) and select the card (CMD7) */
1452 mmc_return = mmc_identify_card(host, card);
1453 if (mmc_return)
1454 return mmc_return;
1455
1456 /* set interface speed */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001457 if (MMC_CARD_SD(card))
1458 {
1459 mmc_return = mmc_sd_set_hs(host, card);
1460 if (mmc_return)
1461 {
1462 dprintf(CRITICAL, "Failed to set HS for SD card\n");
1463 return mmc_return;
1464 }
1465 }
1466 else
1467 {
1468 mmc_return = mmc_set_hs_interface(host, card);
1469 if (mmc_return) {
1470 dprintf(CRITICAL, "Error adjusting interface speed!\n");
1471 return mmc_return;
1472 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001473 }
1474
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001475 /* Now get the extended CSD for the card */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001476 if (MMC_CARD_MMC(card))
1477 {
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001478 /* For MMC cards, also get the extended csd */
1479 mmc_return = mmc_get_ext_csd(host, card);
1480
1481 if (mmc_return) {
1482 dprintf(CRITICAL, "Failure getting card's ExtCSD information!\n");
1483 return mmc_return;
1484 }
1485 }
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001486 else
1487 {
1488 /*Read SCR for sd card */
1489 if (mmc_sd_get_card_scr(host, card))
1490 {
1491 dprintf(CRITICAL, "Failure getting card's SCR register\n");
1492 return 1;
1493 }
1494 /* Read SSR for the SD card */
1495 if (mmc_sd_get_card_ssr(host, card))
1496 {
1497 dprintf(CRITICAL, "Failed to get SSR from the card\n");
1498 return 1;
1499 }
1500 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001501
1502 /* Decode and save the CSD register */
1503 mmc_return = mmc_decode_and_save_csd(card);
1504 if (mmc_return) {
1505 dprintf(CRITICAL, "Failure decoding card's CSD information!\n");
1506 return mmc_return;
1507 }
1508
1509
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001510 if (MMC_CARD_MMC(card))
1511 {
1512 /* Set the bus width based on host, target capbilities */
1513 if (cfg->bus_width == DATA_BUS_WIDTH_8BIT && host->caps.bus_width_8bit)
1514 bus_width = DATA_BUS_WIDTH_8BIT;
1515 /*
1516 * Host contoller by default supports 4 bit & 1 bit mode.
1517 * No need to check for host support here
1518 */
1519 else if (cfg->bus_width == DATA_BUS_WIDTH_4BIT)
1520 bus_width = DATA_BUS_WIDTH_4BIT;
1521 else
1522 bus_width = DATA_BUS_WIDTH_1BIT;
1523
1524 /* Set 4/8 bit SDR bus width in controller */
1525 mmc_return = sdhci_set_bus_width(host, bus_width);
1526
1527 if (mmc_return) {
1528 dprintf(CRITICAL, "Failed to set bus width for host controller\n");
1529 return 1;
1530 }
1531
1532 /* Enable high speed mode in the follwing order:
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001533 * 1. HS400 mode if supported by host & card
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001534 * 1. HS200 mode if supported by host & card
1535 * 2. DDR mode host, if supported by host & card
1536 * 3. Use normal speed mode with supported bus width
1537 */
Channagoud Kadabie9168e82014-01-28 21:33:34 -08001538 if (host->caps.hs400_support && mmc_card_supports_hs400_mode(card))
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001539 {
1540 mmc_return = mmc_set_hs400_mode(host, card, bus_width);
1541 if (mmc_return)
1542 {
1543 dprintf(CRITICAL, "Failure to set HS400 mode for Card(RCA:%x)\n",
1544 card->rca);
1545 return mmc_return;
1546 }
1547 }
Channagoud Kadabie9168e82014-01-28 21:33:34 -08001548 else if (host->caps.sdr104_support && mmc_card_supports_hs200_mode(card))
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001549 {
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001550 mmc_return = mmc_set_hs200_mode(host, card, bus_width);
1551
1552 if (mmc_return) {
1553 dprintf(CRITICAL, "Failure to set HS200 mode for Card(RCA:%x)\n",
1554 card->rca);
1555 return mmc_return;
1556 }
Channagoud Kadabie9168e82014-01-28 21:33:34 -08001557 } else if (host->caps.ddr_support && mmc_card_supports_ddr_mode(card)) {
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001558 mmc_return = mmc_set_ddr_mode(host, card);
1559
1560 if (mmc_return) {
1561 dprintf(CRITICAL, "Failure to set DDR mode for Card(RCA:%x)\n",
1562 card->rca);
1563 return mmc_return;
1564 }
1565 } else {
1566 /* Set 4/8 bit bus width for the card */
1567 mmc_return = mmc_set_bus_width(host, card, bus_width);
1568 if (mmc_return) {
1569 dprintf(CRITICAL, "Failure to set wide bus for Card(RCA:%x)\n",
1570 card->rca);
1571 return mmc_return;
1572 }
1573 }
1574 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001575 else
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001576 {
1577 /* Check the supported bus width for the card from SCR register */
1578 if (card->scr.bus_widths & SD_SCR_WIDTH_4BIT)
1579 bus_width = DATA_BUS_WIDTH_4BIT;
1580 else
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001581 bus_width = DATA_BUS_WIDTH_1BIT;
1582
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001583 mmc_return = mmc_sd_set_bus_width(host, card, bus_width);
1584 if (mmc_return)
1585 {
1586 dprintf(CRITICAL, "Failed to set bus width for the card\n");
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001587 return mmc_return;
1588 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001589
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001590 /* Set bit SDR bus width in controller */
1591 mmc_return = sdhci_set_bus_width(host, bus_width);
1592 if (mmc_return)
1593 {
1594 dprintf(CRITICAL, "Failed to set bus width for host controller\n");
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001595 return mmc_return;
1596 }
1597 }
1598
1599
1600 /* Verify TRAN state after changing speed and bus width */
1601 mmc_return = mmc_get_card_status(host, card, &status);
1602 if (mmc_return)
1603 return mmc_return;
1604
1605 if (MMC_CARD_STATUS(status) != MMC_TRAN_STATE)
1606 mmc_return = 1;
1607
Channagoud Kadabi96c629e2013-09-10 14:21:30 -07001608 card->block_size = MMC_BLK_SZ;
1609
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001610 return mmc_return;
1611}
1612
1613/*
1614 * Function: mmc display csd
1615 * Arg : None
1616 * Return : None
1617 * Flow : Displays the csd information
1618 */
1619static void mmc_display_csd(struct mmc_card *card)
1620{
1621 dprintf(SPEW, "erase_grpsize: %d\n", card->csd.erase_grp_size);
1622 dprintf(SPEW, "erase_grpmult: %d\n", card->csd.erase_grp_mult);
1623 dprintf(SPEW, "wp_grpsize: %d\n", card->csd.wp_grp_size);
1624 dprintf(SPEW, "wp_grpen: %d\n", card->csd.wp_grp_enable);
1625 dprintf(SPEW, "perm_wp: %d\n", card->csd.perm_wp);
1626 dprintf(SPEW, "temp_wp: %d\n", card->csd.temp_wp);
1627}
1628
1629/*
1630 * Function: mmc_init
1631 * Arg : MMC configuration data
1632 * Return : Pointer to mmc device
1633 * Flow : Entry point to MMC boot process
1634 * Initialize the sd host controller
1635 * Initialize the mmc card
1636 * Set the clock & high speed mode
1637 */
1638struct mmc_device *mmc_init(struct mmc_config_data *data)
1639{
1640 uint8_t mmc_ret = 0;
1641 struct mmc_device *dev;
1642
1643 dev = (struct mmc_device *) malloc (sizeof(struct mmc_device));
1644
1645 if (!dev) {
1646 dprintf(CRITICAL, "Error allocating mmc device\n");
1647 return NULL;
1648 }
1649
1650 ASSERT(data);
1651
1652 memcpy((void*)&dev->config, (void*)data, sizeof(struct mmc_config_data));
1653
1654 memset((struct mmc_card *)&dev->card, 0, sizeof(struct mmc_card));
1655
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001656 /* Initialize the host & clock */
1657 dprintf(SPEW, " Initializing MMC host data structure and clock!\n");
1658
1659 mmc_ret = mmc_host_init(dev);
1660 if (mmc_ret) {
1661 dprintf(CRITICAL, "Error Initializing MMC host : %u\n", mmc_ret);
1662 return NULL;
1663 }
1664
1665 /* Initialize and identify cards connected to host */
1666 mmc_ret = mmc_card_init(dev);
1667 if (mmc_ret) {
1668 dprintf(CRITICAL, "Failed detecting MMC/SDC @ slot%d\n",
1669 dev->config.slot);
1670 return NULL;
1671 }
1672
1673 dprintf(INFO, "Done initialization of the card\n");
1674
1675 mmc_display_csd(&dev->card);
1676
1677 return dev;
1678}
1679
Channagoud Kadabi14fd2052013-10-17 18:00:50 -07001680static uint32_t mmc_parse_response(uint32_t resp)
1681{
1682 /* Trying to write beyond card capacity */
1683 if (resp & MMC_R1_ADDR_OUT_OF_RANGE) {
1684 dprintf(CRITICAL, "Attempting to read or write beyond the Device capacity\n");
1685 return 1;
1686 }
1687
1688 /* Misaligned address not matching block length */
1689 if (resp & MMC_R1_ADDR_ERR) {
1690 dprintf(CRITICAL, "The misaligned address did not match the block length used\n");
1691 return 1;
1692 }
1693
1694 /* Invalid block length */
1695 if (resp & MMC_R1_BLOCK_LEN_ERR) {
1696 dprintf(CRITICAL, "The transferred bytes does not match the block length\n");
1697 return 1;
1698 }
1699
1700 /* Tried to program write protected block */
1701 if (resp & MMC_R1_WP_VIOLATION) {
1702 dprintf(CRITICAL, "Attempt to program a write protected block\n");
1703 return 1;
1704 }
1705
1706 /* card controller error */
1707 if (resp & MMC_R1_CC_ERROR) {
1708 dprintf(CRITICAL, "Device error occurred, which is not related to the host command\n");
1709 return 1;
1710 }
1711
1712 /* Generic error */
1713 if (resp & MMC_R1_GENERIC_ERR) {
1714 dprintf(CRITICAL, "A generic Device error\n");
1715 return 1;
1716 }
1717
1718 /* Finally check for card in TRAN state */
1719 if (MMC_CARD_STATUS(resp) != MMC_TRAN_STATE) {
1720 dprintf(CRITICAL, "MMC card is not in TRAN state\n");
1721 return 1;
1722 }
1723
1724 return 0;
1725}
1726
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001727/*
1728 * Function: mmc sdhci read
1729 * Arg : mmc device structure, block address, number of blocks & destination
1730 * Return : 0 on Success, non zero on success
1731 * Flow : Fill in the command structure & send the command
1732 */
1733uint32_t mmc_sdhci_read(struct mmc_device *dev, void *dest,
1734 uint64_t blk_addr, uint32_t num_blocks)
1735{
1736 uint32_t mmc_ret = 0;
1737 struct mmc_command cmd;
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001738 struct mmc_card *card = &dev->card;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001739
1740 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
1741
1742 /* CMD17/18 Format:
1743 * [31:0] Data Address
1744 */
1745 if (num_blocks == 1)
1746 cmd.cmd_index = CMD17_READ_SINGLE_BLOCK;
1747 else
1748 cmd.cmd_index = CMD18_READ_MULTIPLE_BLOCK;
1749
Channagoud Kadabi7e72e632013-12-20 11:17:45 -08001750 /*
1751 * Standard emmc cards use byte mode addressing
1752 * convert the block address to byte address before
1753 * sending the command
1754 */
1755 if (card->type == MMC_TYPE_STD_MMC)
1756 cmd.argument = blk_addr * card->block_size;
1757 else
1758 cmd.argument = blk_addr;
1759
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001760 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1761 cmd.resp_type = SDHCI_CMD_RESP_R1;
1762 cmd.trans_mode = SDHCI_MMC_READ;
1763 cmd.data_present = 0x1;
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001764
1765 /* Use CMD23 If card supports CMD23:
1766 * For SD card use the value read from SCR register
1767 * For emmc by default use CMD23.
1768 * Also as per SDCC spec always use CMD23 to stop
1769 * multiblock read/write if UHS (Ultra High Speed) is
1770 * enabled
1771 */
1772 if (MMC_CARD_SD(card))
1773 cmd.cmd23_support = dev->card.scr.cmd23_support;
1774 else
1775 cmd.cmd23_support = 0x1;
1776
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001777 cmd.data.data_ptr = dest;
1778 cmd.data.num_blocks = num_blocks;
1779
1780 /* send command */
1781 mmc_ret = sdhci_send_command(&dev->host, &cmd);
1782 if (mmc_ret) {
1783 return mmc_ret;
1784 }
1785
Channagoud Kadabi14fd2052013-10-17 18:00:50 -07001786 /* Response contains 32 bit Card status.
1787 * Parse the errors & provide relevant information */
1788 if ((mmc_ret = mmc_parse_response(cmd.resp[0])))
1789 {
1790 dprintf(CRITICAL,"MMC Read failed, found errors in card response: %s\t%d\n", __func__, __LINE__);
1791 return mmc_ret;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001792 }
1793
1794 return mmc_ret;
1795}
1796
1797/*
1798 * Function: mmc sdhci write
1799 * Arg : mmc device structure, block address, number of blocks & source
1800 * Return : 0 on Success, non zero on success
1801 * Flow : Fill in the command structure & send the command
1802 */
1803uint32_t mmc_sdhci_write(struct mmc_device *dev, void *src,
1804 uint64_t blk_addr, uint32_t num_blocks)
1805{
1806 uint32_t mmc_ret = 0;
1807 struct mmc_command cmd;
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001808 struct mmc_card *card = &dev->card;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001809
1810 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
1811
1812 /* CMD24/25 Format:
1813 * [31:0] Data Address
1814 */
1815
1816 if (num_blocks == 1)
1817 cmd.cmd_index = CMD24_WRITE_SINGLE_BLOCK;
1818 else
1819 cmd.cmd_index = CMD25_WRITE_MULTIPLE_BLOCK;
1820
Channagoud Kadabi7e72e632013-12-20 11:17:45 -08001821 /*
1822 * Standard emmc cards use byte mode addressing
1823 * convert the block address to byte address before
1824 * sending the command
1825 */
1826 if (card->type == MMC_TYPE_STD_MMC)
1827 cmd.argument = blk_addr * card->block_size;
1828 else
1829 cmd.argument = blk_addr;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001830 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1831 cmd.resp_type = SDHCI_CMD_RESP_R1;
1832 cmd.trans_mode = SDHCI_MMC_WRITE;
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001833
1834 /* Use CMD23 If card supports CMD23:
1835 * For SD card use the value read from SCR register
1836 * For emmc by default use CMD23.
1837 * Also as per SDCC spec always use CMD23 to stop
1838 * multiblock read/write if UHS (Ultra High Speed) is
1839 * enabled
1840 */
1841 if (MMC_CARD_SD(card))
1842 cmd.cmd23_support = dev->card.scr.cmd23_support;
1843 else
1844 cmd.cmd23_support = 0x1;
1845
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001846 cmd.data_present = 0x1;
1847 cmd.data.data_ptr = src;
1848 cmd.data.num_blocks = num_blocks;
1849
1850 /* send command */
1851 mmc_ret = sdhci_send_command(&dev->host, &cmd);
1852 if (mmc_ret)
1853 return mmc_ret;
1854
Channagoud Kadabi14fd2052013-10-17 18:00:50 -07001855 /* Response contains 32 bit Card status.
1856 * Parse the errors & provide relevant information */
1857 if ((mmc_ret = mmc_parse_response(cmd.resp[0])))
1858 {
1859 dprintf(CRITICAL,"MMC Write failed, found errors in card response: %s\t%d\n", __func__, __LINE__);
1860 return mmc_ret;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001861 }
1862
1863 return mmc_ret;
1864}
Channagoud Kadabi003171e2013-05-29 15:21:12 -07001865
1866/*
1867 * Send the erase group start address using CMD35
1868 */
1869static uint32_t mmc_send_erase_grp_start(struct mmc_device *dev, uint32_t erase_start)
1870{
1871 struct mmc_command cmd;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001872 struct mmc_card *card = &dev->card;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07001873
1874 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
1875
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001876 if (MMC_CARD_MMC(card))
1877 cmd.cmd_index = CMD35_ERASE_GROUP_START;
1878 else
1879 cmd.cmd_index = CMD32_ERASE_WR_BLK_START;
1880
Channagoud Kadabi003171e2013-05-29 15:21:12 -07001881 cmd.argument = erase_start;
1882 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1883 cmd.resp_type = SDHCI_CMD_RESP_R1;
1884
1885 /* send command */
1886 if (sdhci_send_command(&dev->host, &cmd))
1887 return 1;
1888
1889 /*
1890 * CMD35 on failure returns address out of range error
1891 */
1892 if (MMC_ADDR_OUT_OF_RANGE(cmd.resp[0]))
1893 {
1894 dprintf(CRITICAL, "Address for CMD35 is out of range\n");
1895 return 1;
1896 }
1897
1898 return 0;
1899}
1900
1901/*
1902 * Send the erase group end address using CMD36
1903 */
1904static uint32_t mmc_send_erase_grp_end(struct mmc_device *dev, uint32_t erase_end)
1905{
1906 struct mmc_command cmd;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001907 struct mmc_card *card = &dev->card;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07001908
1909 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
1910
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001911 if (MMC_CARD_MMC(card))
1912 cmd.cmd_index = CMD36_ERASE_GROUP_END;
1913 else
1914 cmd.cmd_index = CMD33_ERASE_WR_BLK_END;
1915
Channagoud Kadabi003171e2013-05-29 15:21:12 -07001916 cmd.argument = erase_end;
1917 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1918 cmd.resp_type = SDHCI_CMD_RESP_R1;
1919
1920 /* send command */
1921 if (sdhci_send_command(&dev->host, &cmd))
1922 return 1;
1923
1924 /*
1925 * CMD3 on failure returns address out of range error
1926 */
1927 if (MMC_ADDR_OUT_OF_RANGE(cmd.resp[0]))
1928 {
1929 dprintf(CRITICAL, "Address for CMD36 is out of range\n");
1930 return 1;
1931 }
1932
1933 return 0;
1934}
1935
1936/*
1937 * Send the erase CMD38, to erase the selected erase groups
1938 */
1939static uint32_t mmc_send_erase(struct mmc_device *dev)
1940{
1941 struct mmc_command cmd;
1942 uint32_t status;
Channagoud Kadabi6d1751b2013-07-05 13:03:52 -07001943 uint32_t retry = 0;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07001944
1945 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
1946
1947 cmd.cmd_index = CMD38_ERASE;
1948 cmd.argument = 0x00000000;
1949 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1950 cmd.resp_type = SDHCI_CMD_RESP_R1B;
1951
1952 /* send command */
1953 if (sdhci_send_command(&dev->host, &cmd))
1954 return 1;
1955
1956 do
1957 {
1958 if (mmc_get_card_status(&dev->host, &dev->card, &status))
1959 {
1960 dprintf(CRITICAL, "Failed to get card status after erase\n");
1961 return 1;
1962 }
1963 /* Check if the response of erase command has eras skip status set */
1964 if (status & MMC_R1_WP_ERASE_SKIP)
1965 dprintf(CRITICAL, "Write Protect set for the region, only partial space was erased\n");
1966
1967 retry++;
1968 udelay(1000);
1969 if (retry == MMC_MAX_CARD_STAT_RETRY)
1970 {
1971 dprintf(CRITICAL, "Card status check timed out after sending erase command\n");
1972 return 1;
1973 }
1974 } while(!(status & MMC_READY_FOR_DATA) || (MMC_CARD_STATUS(status) == MMC_PROG_STATE));
1975
1976
1977 return 0;
1978}
1979
1980
1981/*
1982 * Function: mmc sdhci erase
1983 * Arg : mmc device structure, block address and length
1984 * Return : 0 on Success, non zero on failure
1985 * Flow : Fill in the command structure & send the command
1986 */
1987uint32_t mmc_sdhci_erase(struct mmc_device *dev, uint32_t blk_addr, uint64_t len)
1988{
1989 uint32_t erase_unit_sz = 0;
1990 uint32_t erase_start;
1991 uint32_t erase_end;
1992 uint32_t blk_end;
1993 uint32_t num_erase_grps;
1994 uint32_t *out;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001995 struct mmc_card *card;
1996
1997
1998 card = &dev->card;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07001999
2000 /*
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002001 * Calculate the erase unit size,
2002 * 1. Based on emmc 4.5 spec for emmc card
2003 * 2. Use SD Card Status info for SD cards
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002004 */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002005 if (MMC_CARD_MMC(card))
2006 {
2007 /*
2008 * Calculate the erase unit size as per the emmc specification v4.5
2009 */
2010 if (dev->card.ext_csd[MMC_ERASE_GRP_DEF])
2011 erase_unit_sz = (MMC_HC_ERASE_MULT * dev->card.ext_csd[MMC_HC_ERASE_GRP_SIZE]) / MMC_BLK_SZ;
2012 else
2013 erase_unit_sz = (dev->card.csd.erase_grp_size + 1) * (dev->card.csd.erase_grp_mult + 1);
2014 }
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002015 else
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002016 erase_unit_sz = dev->card.ssr.au_size * dev->card.ssr.num_aus;
2017
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002018
2019 /* Convert length in blocks */
2020 len = len / MMC_BLK_SZ;
2021
2022 if (len < erase_unit_sz)
2023 {
2024 dprintf(CRITICAL, "Requested length is less than min erase group size\n");
2025 return 1;
2026 }
2027
2028 /* Calculate erase groups based on the length in blocks */
2029 num_erase_grps = len / erase_unit_sz;
2030
2031 /* Start address of the erase range */
2032 erase_start = blk_addr;
2033
2034 /* Last address of the erase range */
2035 erase_end = blk_addr + ((num_erase_grps - 1) * erase_unit_sz);
2036
2037 /* Boundary check for overlap */
2038 blk_end = blk_addr + len;
2039
2040 if (erase_end > blk_end)
2041 {
2042 dprintf(CRITICAL, "The erase group overlaps the max requested for erase\n");
2043 erase_end -= erase_unit_sz;
2044 }
2045
2046 /* Send CMD35 for erase group start */
2047 if (mmc_send_erase_grp_start(dev, erase_start))
2048 {
2049 dprintf(CRITICAL, "Failed to send erase grp start address\n");
2050 return 1;
2051 }
2052
2053 /* Send CMD36 for erase group end */
2054 if (mmc_send_erase_grp_end(dev, erase_end))
2055 {
2056 dprintf(CRITICAL, "Failed to send erase grp end address\n");
2057 return 1;
2058 }
2059
2060 /* Send CMD38 to perform erase */
2061 if (mmc_send_erase(dev))
2062 {
2063 dprintf(CRITICAL, "Failed to erase the specified partition\n");
2064 return 1;
2065 }
2066 return 0;
2067}
2068
2069/*
2070 * Function: mmc get wp status
2071 * Arg : mmc device structure, block address and buffer for getting wp status
2072 * Return : 0 on Success, 1 on Failure
2073 * Flow : Get the WP group status by sending CMD31
2074 */
2075uint32_t mmc_get_wp_status(struct mmc_device *dev, uint32_t addr, uint8_t *wp_status)
2076{
2077 struct mmc_command cmd;
2078
2079 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
2080
2081 cmd.cmd_index = CMD31_SEND_WRITE_PROT_TYPE;
2082 cmd.argument = addr;
2083 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2084 cmd.resp_type = SDHCI_CMD_RESP_R1;
2085 cmd.trans_mode = SDHCI_MMC_READ;
2086 cmd.data_present = 0x1;
2087 cmd.data.data_ptr = wp_status;
2088 cmd.data.num_blocks = 0x1;
2089 cmd.data.blk_sz = 0x8;
2090
2091 if (sdhci_send_command(&dev->host, &cmd))
2092 {
2093 dprintf(CRITICAL, "Failed to get status of write protect bits\n");
2094 return 1;
2095 }
2096
2097 return 0;
2098}
2099
2100/*
2101 * Function: mmc set/clear WP on user area
2102 * Arg : mmc device structure, block address,len, & flag to set or clear
2103 * Return : 0 on success, 1 on failure
2104 * Flow : Function to set/clear power on write protect on user area
2105 */
2106
2107uint32_t mmc_set_clr_power_on_wp_user(struct mmc_device *dev, uint32_t addr, uint64_t len, uint8_t set_clr)
2108{
2109 struct mmc_command cmd;
2110 uint32_t wp_grp_size;
2111 uint32_t status;
2112 uint32_t num_wp_grps;
2113 uint32_t ret;
Channagoud Kadabi6d1751b2013-07-05 13:03:52 -07002114 uint32_t retry = 0;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002115 uint32_t i;
2116
2117 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
2118
2119 /* Convert len into blocks */
2120 len = len / MMC_BLK_SZ;
2121
2122 /* Disable PERM WP */
2123 ret = mmc_switch_cmd(&dev->host, &dev->card, MMC_SET_BIT, MMC_USR_WP, MMC_US_PERM_WP_DIS);
2124
2125 if (ret)
2126 {
2127 dprintf(CRITICAL, "Failed to Disable PERM WP\n");
2128 return ret;
2129 }
2130
2131 /* Read the default values for user WP */
2132 ret = mmc_get_ext_csd(&dev->host, &dev->card);
2133
2134 if (ret)
2135 {
2136 dprintf(CRITICAL, "Failed to read ext csd for the card\n");
2137 return ret;
2138 }
2139
2140 /* Check if user power on WP is disabled or perm WP is enabled */
2141 if ((dev->card.ext_csd[MMC_USR_WP] & MMC_US_PWR_WP_DIS)
2142 || (dev->card.ext_csd[MMC_USR_WP] & MMC_US_PERM_WP_EN))
2143 {
2144 dprintf(CRITICAL, "Power on protection is disabled, cannot be set\n");
2145 return 1;
2146 }
2147
2148 /* Calculate the wp grp size */
2149 if (dev->card.ext_csd[MMC_ERASE_GRP_DEF])
2150 wp_grp_size = MMC_HC_ERASE_MULT * dev->card.ext_csd[MMC_HC_ERASE_GRP_SIZE] / MMC_BLK_SZ;
2151 else
2152 wp_grp_size = (dev->card.csd.wp_grp_size + 1) * (dev->card.csd.erase_grp_size + 1) \
2153 * (dev->card.csd.erase_grp_mult + 1);
2154
2155
2156 if (len < wp_grp_size)
2157 {
2158 dprintf(CRITICAL, "Length is less than min WP size, WP was not set\n");
2159 return 1;
2160 }
2161
2162 /* Set power on USER WP */
2163 ret = mmc_switch_cmd(&dev->host, &dev->card, MMC_SET_BIT, MMC_USR_WP, MMC_US_PWR_WP_EN);
2164
2165 if (ret)
2166 {
2167 dprintf(CRITICAL, "Failed to set power on WP for user\n");
2168 return ret;
2169 }
2170
2171 num_wp_grps = ROUNDUP(len, wp_grp_size) / wp_grp_size;
2172
2173 if (set_clr)
2174 cmd.cmd_index = CMD28_SET_WRITE_PROTECT;
2175 else
2176 cmd.cmd_index = CMD29_CLEAR_WRITE_PROTECT;
2177
2178 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2179 cmd.resp_type = SDHCI_CMD_RESP_R1B;
2180
2181 for(i = 0; i < num_wp_grps; i++)
2182 {
2183 cmd.argument = addr + (i * wp_grp_size);
2184
2185 if (sdhci_send_command(&dev->host, &cmd))
2186 return 1;
2187
2188 /* CMD28/CMD29 On failure returns address out of range error */
2189 if (MMC_ADDR_OUT_OF_RANGE(cmd.resp[0]))
2190 {
2191 dprintf(CRITICAL, "Address for CMD28/29 is out of range\n");
2192 return 1;
2193 }
2194
2195 /* Check the card status */
2196 do
2197 {
2198 if (mmc_get_card_status(&dev->host, &dev->card, &status))
2199 {
2200 dprintf(CRITICAL, "Failed to get card status afterapplying write protect\n");
2201 return 1;
2202 }
2203
2204 /* Time out for WP command */
2205 retry++;
2206 udelay(1000);
2207 if (retry == MMC_MAX_CARD_STAT_RETRY)
2208 {
2209 dprintf(CRITICAL, "Card status timed out after sending write protect command\n");
2210 return 1;
2211 }
2212 } while (!(status & MMC_READY_FOR_DATA) || (MMC_CARD_STATUS(status) == MMC_PROG_STATE));
2213
2214 }
2215
2216 return 0;
2217}
Channagoud Kadabi9e3c3b92013-06-18 18:32:32 -07002218
2219/* Function to put the mmc card to sleep */
2220void mmc_put_card_to_sleep(struct mmc_device *dev)
2221{
2222 struct mmc_command cmd = {0};
2223 struct mmc_card *card = &dev->card;
2224
2225 cmd.cmd_index = CMD7_SELECT_DESELECT_CARD;
2226 cmd.argument = 0x00000000;
2227 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2228 cmd.resp_type = SDHCI_CMD_RESP_NONE;
2229
2230 /* send command */
2231 if(sdhci_send_command(&dev->host, &cmd))
2232 {
2233 dprintf(CRITICAL, "card deselect error: %s\n", __func__);
2234 return;
2235 }
2236
2237 cmd.cmd_index = CMD5_SLEEP_AWAKE;
2238 cmd.argument = (card->rca << MMC_CARD_RCA_BIT) | MMC_CARD_SLEEP;
2239 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2240 cmd.resp_type = SDHCI_CMD_RESP_R1B;
2241
2242 /* send command */
2243 if(sdhci_send_command(&dev->host, &cmd))
2244 dprintf(CRITICAL, "card sleep error: %s\n", __func__);
2245}