Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 1 | /* Copyright (c) 2013, The Linux Foundation. All rights reserved. |
| 2 | * |
| 3 | * Redistribution and use in source and binary forms, with or without |
| 4 | * modification, are permitted provided that the following conditions are |
| 5 | * met: |
| 6 | * * Redistributions of source code must retain the above copyright |
| 7 | * notice, this list of conditions and the following disclaimer. |
| 8 | * * Redistributions in binary form must reproduce the above |
| 9 | * copyright notice, this list of conditions and the following |
| 10 | * disclaimer in the documentation and/or other materials provided |
| 11 | * with the distribution. |
| 12 | * * Neither the name of The Linux Foundation nor the names of its |
| 13 | * contributors may be used to endorse or promote products derived |
| 14 | * from this software without specific prior written permission. |
| 15 | * |
| 16 | * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED |
| 17 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| 18 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT |
| 19 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS |
| 20 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 21 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 22 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR |
| 23 | * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, |
| 24 | * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE |
| 25 | * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN |
| 26 | * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 27 | * |
| 28 | */ |
| 29 | |
| 30 | #include <debug.h> |
| 31 | #include <smem.h> |
Dhaval Patel | 8ae0bbd | 2013-08-15 15:45:01 -0700 | [diff] [blame^] | 32 | #include <err.h> |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 33 | #include <msm_panel.h> |
Dhaval Patel | 8ae0bbd | 2013-08-15 15:45:01 -0700 | [diff] [blame^] | 34 | #include <mipi_dsi.h> |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 35 | #include <pm8x41.h> |
| 36 | #include <pm8x41_wled.h> |
| 37 | #include <board.h> |
| 38 | #include <platform/gpio.h> |
| 39 | #include <platform/iomap.h> |
| 40 | #include <target/display.h> |
| 41 | |
Dhaval Patel | 8ae0bbd | 2013-08-15 15:45:01 -0700 | [diff] [blame^] | 42 | #include "include/panel.h" |
| 43 | #include "include/display_resource.h" |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 44 | |
Dhaval Patel | 8ae0bbd | 2013-08-15 15:45:01 -0700 | [diff] [blame^] | 45 | #define MODE_GPIO_STATE_ENABLE 1 |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 46 | |
Dhaval Patel | 8ae0bbd | 2013-08-15 15:45:01 -0700 | [diff] [blame^] | 47 | #define MODE_GPIO_STATE_DISABLE 2 |
| 48 | |
| 49 | int target_backlight_ctrl(uint8_t enable) |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 50 | { |
| 51 | struct pm8x41_mpp mpp; |
| 52 | mpp.base = PM8x41_MMP3_BASE; |
| 53 | mpp.mode = MPP_HIGH; |
| 54 | mpp.vin = MPP_VIN3; |
Dhaval Patel | 8ae0bbd | 2013-08-15 15:45:01 -0700 | [diff] [blame^] | 55 | if (enable) { |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 56 | pm8x41_config_output_mpp(&mpp); |
| 57 | pm8x41_enable_mpp(&mpp, MPP_ENABLE); |
| 58 | } else { |
| 59 | pm8x41_enable_mpp(&mpp, MPP_DISABLE); |
| 60 | } |
| 61 | /* Need delay before power on regulators */ |
| 62 | mdelay(20); |
| 63 | return 0; |
| 64 | } |
| 65 | |
Dhaval Patel | 8ae0bbd | 2013-08-15 15:45:01 -0700 | [diff] [blame^] | 66 | int target_panel_clock(uint8_t enable, struct msm_panel_info *pinfo) |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 67 | { |
Dhaval Patel | 8ae0bbd | 2013-08-15 15:45:01 -0700 | [diff] [blame^] | 68 | struct mdss_dsi_pll_config *pll_data; |
| 69 | dprintf(SPEW, "target_panel_clock\n"); |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 70 | |
Dhaval Patel | 8ae0bbd | 2013-08-15 15:45:01 -0700 | [diff] [blame^] | 71 | pll_data = pinfo->mipi.dsi_pll_config; |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 72 | |
Dhaval Patel | 8ae0bbd | 2013-08-15 15:45:01 -0700 | [diff] [blame^] | 73 | if (enable) { |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 74 | mdp_clock_enable(); |
Dhaval Patel | 8ae0bbd | 2013-08-15 15:45:01 -0700 | [diff] [blame^] | 75 | dsi_clock_enable( |
| 76 | pll_data->byte_clock * pinfo->mipi.num_of_lanes, |
| 77 | pll_data->byte_clock); |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 78 | } else if(!target_cont_splash_screen()) { |
| 79 | dsi_clock_disable(); |
| 80 | mdp_clock_disable(); |
| 81 | } |
| 82 | |
| 83 | return 0; |
| 84 | } |
| 85 | |
Dhaval Patel | 8ae0bbd | 2013-08-15 15:45:01 -0700 | [diff] [blame^] | 86 | int target_panel_reset(uint8_t enable, struct panel_reset_sequence *resetseq, |
| 87 | struct msm_panel_info *pinfo) |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 88 | { |
| 89 | dprintf(SPEW, "msm8610_mdss_mipi_panel_reset, enable = %d\n", enable); |
| 90 | |
Dhaval Patel | 8ae0bbd | 2013-08-15 15:45:01 -0700 | [diff] [blame^] | 91 | if (enable) { |
| 92 | gpio_tlmm_config(reset_gpio.pin_id, 0, |
| 93 | reset_gpio.pin_direction, reset_gpio.pin_pull, |
| 94 | reset_gpio.pin_strength, reset_gpio.pin_state); |
| 95 | |
| 96 | gpio_tlmm_config(mode_gpio.pin_id, 0, |
| 97 | mode_gpio.pin_direction, mode_gpio.pin_pull, |
| 98 | mode_gpio.pin_strength, mode_gpio.pin_state); |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 99 | |
| 100 | /* reset */ |
Dhaval Patel | 8ae0bbd | 2013-08-15 15:45:01 -0700 | [diff] [blame^] | 101 | gpio_set(reset_gpio.pin_id, resetseq->pin_state[0]); |
| 102 | mdelay(resetseq->sleep[0]); |
| 103 | gpio_set(reset_gpio.pin_id, resetseq->pin_state[1]); |
| 104 | mdelay(resetseq->sleep[1]); |
| 105 | gpio_set(reset_gpio.pin_id, resetseq->pin_state[2]); |
| 106 | mdelay(resetseq->sleep[2]); |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 107 | |
Dhaval Patel | 8ae0bbd | 2013-08-15 15:45:01 -0700 | [diff] [blame^] | 108 | if (pinfo->mipi.mode_gpio_state == MODE_GPIO_STATE_ENABLE) |
| 109 | gpio_set(mode_gpio.pin_id, 2); |
| 110 | else if (pinfo->mipi.mode_gpio_state == MODE_GPIO_STATE_DISABLE) |
| 111 | gpio_set(mode_gpio.pin_id, 0); |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 112 | } else if(!target_cont_splash_screen()) { |
Dhaval Patel | 8ae0bbd | 2013-08-15 15:45:01 -0700 | [diff] [blame^] | 113 | gpio_set(reset_gpio.pin_id, 0); |
| 114 | gpio_set(mode_gpio.pin_id, 0); |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 115 | } |
Dhaval Patel | 8ae0bbd | 2013-08-15 15:45:01 -0700 | [diff] [blame^] | 116 | return 0; |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 117 | } |
| 118 | |
Dhaval Patel | 8ae0bbd | 2013-08-15 15:45:01 -0700 | [diff] [blame^] | 119 | int target_ldo_ctrl(uint8_t enable) |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 120 | { |
Dhaval Patel | 8ae0bbd | 2013-08-15 15:45:01 -0700 | [diff] [blame^] | 121 | uint32_t ldocounter = 0; |
| 122 | uint32_t pm8x41_ldo_base = 0x13F00; |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 123 | |
Dhaval Patel | 8ae0bbd | 2013-08-15 15:45:01 -0700 | [diff] [blame^] | 124 | while (ldocounter < TOTAL_LDO_DEFINED) { |
| 125 | struct pm8x41_ldo ldo_entry = LDO((pm8x41_ldo_base + |
| 126 | 0x100 * ldo_entry_array[ldocounter].ldo_id), |
| 127 | ldo_entry_array[ldocounter].ldo_type); |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 128 | |
Dhaval Patel | 8ae0bbd | 2013-08-15 15:45:01 -0700 | [diff] [blame^] | 129 | dprintf(SPEW, "Setting %s\n", |
| 130 | ldo_entry_array[ldocounter].ldo_id); |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 131 | |
Dhaval Patel | 8ae0bbd | 2013-08-15 15:45:01 -0700 | [diff] [blame^] | 132 | /* Set voltage during power on */ |
| 133 | if (enable) { |
| 134 | pm8x41_ldo_set_voltage(&ldo_entry, |
| 135 | ldo_entry_array[ldocounter].ldo_voltage); |
| 136 | pm8x41_ldo_control(&ldo_entry, enable); |
| 137 | } else if(!target_cont_splash_screen()) { |
| 138 | pm8x41_ldo_control(&ldo_entry, enable); |
| 139 | } |
| 140 | ldocounter++; |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 141 | } |
Dhaval Patel | 8ae0bbd | 2013-08-15 15:45:01 -0700 | [diff] [blame^] | 142 | |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 143 | return 0; |
| 144 | } |
| 145 | |
| 146 | void display_init(void) |
| 147 | { |
Dhaval Patel | 8ae0bbd | 2013-08-15 15:45:01 -0700 | [diff] [blame^] | 148 | gcdb_display_init(MDP_REV_304, MIPI_FB_ADDR); |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 149 | } |
| 150 | |
| 151 | void display_shutdown(void) |
| 152 | { |
Dhaval Patel | 8ae0bbd | 2013-08-15 15:45:01 -0700 | [diff] [blame^] | 153 | gcdb_display_shutdown(); |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 154 | } |