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Shashank Mittal402d0972010-09-29 10:09:52 -07001/*
Subbaraman Narayanamurthy8f0b0452011-03-11 18:30:10 -08002 * * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
Shashank Mittal402d0972010-09-29 10:09:52 -07003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are
6 * met:
7 * * Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * * Redistributions in binary form must reproduce the above
10 * copyright notice, this list of conditions and the following
11 * disclaimer in the documentation and/or other materials provided
12 * with the distribution.
13 * * Neither the name of Code Aurora Forum, Inc. nor the names of its
14 * contributors may be used to endorse or promote products derived
15 * from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
18 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
24 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
25 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
26 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
27 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30#include <debug.h>
31#include <reg.h>
32#include <platform/iomap.h>
33#include <platform/pmic.h>
34
Subbaraman Narayanamurthy78aa8fe2011-02-17 18:03:15 -080035#define TRUE 1
36#define FALSE 0
37
38#define PM_IRQ_ID_TO_BLOCK_INDEX(id) (uint8_t)(id / 8)
39#define PM_IRQ_ID_TO_BIT_MASK(id) (uint8_t)(1 << (id % 8))
40
Shashank Mittal402d0972010-09-29 10:09:52 -070041typedef int (*pm8058_write_func) (unsigned char *, unsigned short,
42 unsigned short);
43extern int pa1_ssbi2_write_bytes(unsigned char *buffer, unsigned short length,
44 unsigned short slave_addr);
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -070045extern int pa1_ssbi2_read_bytes(unsigned char *buffer, unsigned short length,
46 unsigned short slave_addr);
47extern int pa2_ssbi2_write_bytes(unsigned char *buffer, unsigned short length,
48 unsigned short slave_addr);
49extern int pa2_ssbi2_read_bytes(unsigned char *buffer, unsigned short length,
50 unsigned short slave_addr);
Shashank Mittal402d0972010-09-29 10:09:52 -070051
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -070052/* PM8058 APIs */
53int pm8058_write(uint16_t addr, uint8_t *data, uint16_t length)
54{
55 return pa1_ssbi2_write_bytes(data, length, addr);
56}
57
58int pm8058_read(uint16_t addr, uint8_t *data, uint16_t length)
59{
60 return pa1_ssbi2_read_bytes(data, length, addr);
61}
62
Shashank Mittal402d0972010-09-29 10:09:52 -070063void pm8058_write_one(unsigned data, unsigned address)
64{
65 pm8058_write_func wr_function = &pa1_ssbi2_write_bytes;
66 if (wr_function == NULL)
67 return;
68 if ((*wr_function) (&data, 1, address))
69 dprintf(CRITICAL, "Error in initializing register\n");
70
71}
72
Subbaraman Narayanamurthyaea23b72011-04-12 13:07:41 -070073int pm8058_get_irq_status( pm_irq_id_type irq, bool *rt_status)
Subbaraman Narayanamurthy78aa8fe2011-02-17 18:03:15 -080074{
75 unsigned block_index, reg_data, reg_mask;
76 int errFlag;
77
Subbaraman Narayanamurthyaea23b72011-04-12 13:07:41 -070078 block_index = PM_IRQ_ID_TO_BLOCK_INDEX(irq);
Subbaraman Narayanamurthy78aa8fe2011-02-17 18:03:15 -080079
80 /* select the irq block */
81 errFlag =pa1_ssbi2_write_bytes(&block_index,1,IRQ_BLOCK_SEL_USR_ADDR);
82 if(errFlag)
83 {
84 dprintf(INFO,"Device Timeout");
85 return 1;
86 }
87
88 /* read real time status */
89 errFlag =pa1_ssbi2_read_bytes(&reg_data,1,IRQ_STATUS_RT_USR_ADDR);
90 if(errFlag)
91 {
92 dprintf(INFO,"Device Timeout");
93 return 1;
94 }
Subbaraman Narayanamurthyaea23b72011-04-12 13:07:41 -070095 reg_mask = PM_IRQ_ID_TO_BIT_MASK(irq);
Subbaraman Narayanamurthy78aa8fe2011-02-17 18:03:15 -080096
97 if ((reg_data & reg_mask) == reg_mask )
98 {
99 /* The RT Status is high. */
100 *rt_status = TRUE;
101 }
102 else
103 {
104 /* The RT Status is low. */
105 *rt_status = FALSE;
106 }
107 return 0;
108}
109
Subbaraman Narayanamurthy8f0b0452011-03-11 18:30:10 -0800110bool pm8058_gpio_get(unsigned int gpio)
111{
Subbaraman Narayanamurthyaea23b72011-04-12 13:07:41 -0700112 pm_irq_id_type gpio_irq;
Subbaraman Narayanamurthy8f0b0452011-03-11 18:30:10 -0800113 bool status;
114 int ret;
115
116 gpio_irq = gpio + PM_GPIO01_CHGED_ST_IRQ_ID;
Subbaraman Narayanamurthyaea23b72011-04-12 13:07:41 -0700117 ret = pm8058_get_irq_status(gpio_irq, &status);
Subbaraman Narayanamurthy8f0b0452011-03-11 18:30:10 -0800118
119 if(ret)
120 dprintf(CRITICAL,"pm8058_gpio_get failed\n");
121
122 return status;
123}
124
Subbaraman Narayanamurthy8c7cd222011-06-16 18:24:28 -0700125int pm8058_mwrite(uint16_t addr, uint8_t val, uint8_t mask,
126 uint8_t *reg_save)
127{
128 int rc = 0;
129 uint8_t reg;
130
131 reg = (*reg_save & ~mask) | (val & mask);
132 if (reg != *reg_save)
133 rc = pm8058_write(addr, &reg, 1);
134 if (rc)
135 dprintf(CRITICAL,"pm8058_write failed; addr=%03X, rc=%d\n", addr, rc);
136 else
137 *reg_save = reg;
138 return rc;
139}
140
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700141/* PM8901 APIs */
142
Shashank Mittal402d0972010-09-29 10:09:52 -0700143/*
144 * Write to the control registers on PMIC via the SSBI2 interface.
145 * Returns : (0) on success and (-1) on error.
146 */
147int pm8901_write(uint8_t * buffer, uint32_t length, uint32_t slave_addr)
148{
149 return pa2_ssbi2_write_bytes(buffer, length, slave_addr);
150}
151
152/*
153 * Read from the control registers on PMIC via the SSBI2 interface.
154 * Returns : (0) on success and (-1) on error.
155 */
156int pm8901_read(uint8_t * buffer, uint32_t length, uint32_t slave_addr)
157{
158 return pa2_ssbi2_read_bytes(buffer, length, slave_addr);
159}
160
161/*
162 * PMIC 8901 LDO vreg read.
163 */
164int pm8901_test_bank_read(uint8_t * buffer, uint8_t bank, uint16_t addr)
165{
166 int ret = pm8901_write(&bank, 1, addr);
167 /* if the write does not work we can't read. */
168 if (ret) {
169 return ret;
170 }
171
172 return pm8901_read(buffer, 1, addr);
173}
174
175/*
176 * PMIC 8901 LDO vreg write.
177 */
178int pm8901_vreg_write(uint8_t * buffer, uint8_t mask, uint16_t addr,
179 uint8_t prev_val)
180{
181 uint8_t reg;
182
183 /* Clear the bits we want to try and set. */
184 reg = (prev_val & ~mask);
185 /* Set the bits we want to set, before writing them to addr */
186 reg |= (*buffer & mask);
187 return pm8901_write(&reg, 1, addr);
188}