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Shashank Mittal402d0972010-09-29 10:09:52 -07001/*
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -07002 * * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
Shashank Mittal402d0972010-09-29 10:09:52 -07003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are
6 * met:
7 * * Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * * Redistributions in binary form must reproduce the above
10 * copyright notice, this list of conditions and the following
11 * disclaimer in the documentation and/or other materials provided
12 * with the distribution.
13 * * Neither the name of Code Aurora Forum, Inc. nor the names of its
14 * contributors may be used to endorse or promote products derived
15 * from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
18 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
24 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
25 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
26 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
27 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30#include <debug.h>
31#include <kernel/thread.h>
32#include <i2c_qup.h>
33#include <platform/iomap.h>
34#include <platform/gpio_hw.h>
35#include <platform/clock.h>
36#include <platform/pmic.h>
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -070037#include <platform/pmic_pwm.h>
Shashank Mittal402d0972010-09-29 10:09:52 -070038
39#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
40
41static struct qup_i2c_dev *dev = NULL;
42
43uint8_t expander_read(uint8_t addr)
44{
45 uint8_t ret = 0;
46 /* Create a i2c_msg buffer, that is used to put the controller into read
47 mode and then to read some data. */
48 struct i2c_msg msg_buf[] = {
49 {CORE_GPIO_EXPANDER_I2C_ADDRESS, I2C_M_WR, 1, &addr},
50 {CORE_GPIO_EXPANDER_I2C_ADDRESS, I2C_M_RD, 1, &ret}
51 };
52
53 qup_i2c_xfer(dev, msg_buf, 2);
54
55 return ret;
56}
57
58uint8_t expander_write(uint8_t addr, uint8_t val)
59{
60 uint8_t data_buf[] = { addr, val };
61
62 /* Create a i2c_msg buffer, that is used to put the controller into write
63 mode and then to write some data. */
64 struct i2c_msg msg_buf[] = { {CORE_GPIO_EXPANDER_I2C_ADDRESS,
65 I2C_M_WR, 2, data_buf}
66 };
67
68 qup_i2c_xfer(dev, msg_buf, 1);
69
70 /* Double check that the write worked. */
71 if (val != expander_read(addr)) {
72 return -1;
73 }
74
75 return 0;
76}
77
78void panel_poweron(void)
79{
80 panel_backlight(1);
81 lcdc_on();
82}
83
84void panel_backlight(int on)
85{
86}
87
88static int display_common_power(int on)
89{
90}
91
92static int lcd_power_on()
93{
94 uint8_t buffer = 0x0, mask = 0x0, prev_val = 0x0;
95 int ret = 0;
96
97 /* Configure LDO L2 TEST Bank 2, to Range Select 0 */
Subbaraman Narayanamurthy83019a42011-02-15 20:08:02 -080098 /* Not updating reference voltage */
Shashank Mittal402d0972010-09-29 10:09:52 -070099 buffer = (0x80); /* Write mode */
100 buffer |= (PM8901_LDO_TEST_BANK(2)); /* Test Bank 2 */
101 mask = buffer | LDO_TEST_RANGE_SELECT_MASK;
102
103 if ((ret = pm8901_test_bank_read(&prev_val,
104 PM8901_LDO_TEST_BANK(2),
105 PM8901_LDO_L2_TEST_BANK))) {
106 return ret;
107 }
108 if ((ret = pm8901_vreg_write(&buffer, mask, PM8901_LDO_L2_TEST_BANK,
109 prev_val))) {
110 return ret;
111 }
112
Subbaraman Narayanamurthy83019a42011-02-15 20:08:02 -0800113 /* Enable LDO L2 at Max Voltage (should be around 3.3v) */
114 buffer = (0x0 << PM8901_LDO_CTL_ENABLE__S);
115 /* Disable Pull Down */
116 buffer |= (0x1 << PM8901_LDO_CTL_PULL_DOWN__S);
117 /* Put LDO into normal mode instead of low power mode */
118 buffer |= (0x0 << PM8901_LDO_CTL_MODE__S);
119 /* Write a 31 into the Voltage Programming value to obtain 3.3v VREG =
120 1.75V + X * 100mV */
121 buffer |= (0xF);
122 mask = buffer | LDO_CTL_ENABLE_MASK |
123 LDO_CTL_PULL_DOWN_MASK |
124 LDO_CTL_NORMAL_POWER_MODE_MASK | LDO_CTL_VOLTAGE_SET_MASK;
125
126 /* Do a normal read here, as to not destroy the value in LDO control */
127 if ((ret = pm8901_read(&prev_val, 1, PM8901_LDO_L2))) {
128 return ret;
129 }
130 /* Configure the LDO2 for 3.3v */
131 ret = pm8901_vreg_write(&buffer, mask, PM8901_LDO_L2, prev_val);
132
Shashank Mittal402d0972010-09-29 10:09:52 -0700133 /* Configure LDO L2 TEST Bank 4, for High Range Mode */
134 buffer = (0x80); /* Write mode */
135 buffer |= (PM8901_LDO_TEST_BANK(4)); /* Test Bank 4 */
136 buffer |= (0x01); /* Put into High Range Mode */
137 mask = buffer | LDO_TEST_OUTPUT_RANGE_MASK;
138
139 if ((ret = pm8901_test_bank_read(&prev_val,
140 PM8901_LDO_TEST_BANK(4),
141 PM8901_LDO_L2_TEST_BANK))) {
142 return ret;
143 }
144 if ((ret = pm8901_vreg_write(&buffer, mask, PM8901_LDO_L2_TEST_BANK,
145 prev_val))) {
146 return ret;
147 }
148
Subbaraman Narayanamurthy83019a42011-02-15 20:08:02 -0800149 /* Configure LDO L2 TEST Bank 2, to Range Select 0 */
Shashank Mittal402d0972010-09-29 10:09:52 -0700150 buffer = (0x80); /* Write mode */
Subbaraman Narayanamurthy83019a42011-02-15 20:08:02 -0800151 buffer |= (PM8901_LDO_TEST_BANK(2)); /* Test Bank 2 */
152 buffer |= (1<<1); /* For fine step 50 mV */
153 buffer |= (1<<3); /* to update reference voltage */
154 mask = buffer | LDO_TEST_RANGE_SELECT_MASK;
155 mask |= (1<<2); /* Setting mask to make ref voltage as 1.25 V */
Shashank Mittal402d0972010-09-29 10:09:52 -0700156
157 if ((ret = pm8901_test_bank_read(&prev_val,
Subbaraman Narayanamurthy83019a42011-02-15 20:08:02 -0800158 PM8901_LDO_TEST_BANK(2),
Shashank Mittal402d0972010-09-29 10:09:52 -0700159 PM8901_LDO_L2_TEST_BANK))) {
160 return ret;
161 }
162 if ((ret = pm8901_vreg_write(&buffer, mask, PM8901_LDO_L2_TEST_BANK,
163 prev_val))) {
164 return ret;
165 }
166
Subbaraman Narayanamurthy83019a42011-02-15 20:08:02 -0800167 /* Enable PMR for LDO L2 */
168 buffer = 0x7F;
169 mask = 0x7F;
170 if ((ret = pm8901_read(&prev_val, 1, PM8901_PMR_7))) {
Shashank Mittal402d0972010-09-29 10:09:52 -0700171 return ret;
172 }
Subbaraman Narayanamurthy83019a42011-02-15 20:08:02 -0800173 ret = pm8901_vreg_write(&buffer, mask, PM8901_PMR_7, prev_val);
Shashank Mittal402d0972010-09-29 10:09:52 -0700174 return ret;
175}
176
177/* Configures the GPIO that are needed to enable LCD.
178 * This function also configures the PMIC for PWM control of the LCD backlight.
179 */
180static void lcd_gpio_cfg(uint8_t on)
181{
182 uint32_t func;
183 uint32_t pull;
184 uint32_t dir;
185 uint32_t enable = 0; /* not used in gpio_tlmm_config */
186 uint32_t drv;
187 if (on) {
188 func = 1; /* Configure GPIO for LCDC function */
189 pull = GPIO_NO_PULL;
190 dir = 1; /* doesn't matter since it is not configured as
191 GPIO */
192 drv = GPIO_16MA;
193 } else {
194 /* As discussed in the MSM8660 FFA HW SW Control Doc configure these
195 GPIO as input and pull down. */
196 func = 0; /* GPIO */
197 pull = GPIO_PULL_DOWN;
198 dir = 0; /* Input */
199 drv = 0; /* does not matter configured as input */
200 }
201
202 gpio_tlmm_config(0, func, dir, pull, drv, enable); /* lcdc_pclk */
203 gpio_tlmm_config(1, func, dir, pull, drv, enable); /* lcdc_hsync */
204 gpio_tlmm_config(2, func, dir, pull, drv, enable); /* lcdc_vsync */
205 gpio_tlmm_config(3, func, dir, pull, drv, enable); /* lcdc_den */
206 gpio_tlmm_config(4, func, dir, pull, drv, enable); /* lcdc_red7 */
207 gpio_tlmm_config(5, func, dir, pull, drv, enable); /* lcdc_red6 */
208 gpio_tlmm_config(6, func, dir, pull, drv, enable); /* lcdc_red5 */
209 gpio_tlmm_config(7, func, dir, pull, drv, enable); /* lcdc_red4 */
210 gpio_tlmm_config(8, func, dir, pull, drv, enable); /* lcdc_red3 */
211 gpio_tlmm_config(9, func, dir, pull, drv, enable); /* lcdc_red2 */
212 gpio_tlmm_config(10, func, dir, pull, drv, enable); /* lcdc_red1 */
213 gpio_tlmm_config(11, func, dir, pull, drv, enable); /* lcdc_red0 */
214 gpio_tlmm_config(12, func, dir, pull, drv, enable); /* lcdc_rgn7 */
215 gpio_tlmm_config(13, func, dir, pull, drv, enable); /* lcdc_rgn6 */
216 gpio_tlmm_config(14, func, dir, pull, drv, enable); /* lcdc_rgn5 */
217 gpio_tlmm_config(15, func, dir, pull, drv, enable); /* lcdc_rgn4 */
218 gpio_tlmm_config(16, func, dir, pull, drv, enable); /* lcdc_rgn3 */
219 gpio_tlmm_config(17, func, dir, pull, drv, enable); /* lcdc_rgn2 */
220 gpio_tlmm_config(18, func, dir, pull, drv, enable); /* lcdc_rgn1 */
221 gpio_tlmm_config(19, func, dir, pull, drv, enable); /* lcdc_rgn0 */
222 gpio_tlmm_config(20, func, dir, pull, drv, enable); /* lcdc_blu7 */
223 gpio_tlmm_config(21, func, dir, pull, drv, enable); /* lcdc_blu6 */
224 gpio_tlmm_config(22, func, dir, pull, drv, enable); /* lcdc_blu5 */
225 gpio_tlmm_config(23, func, dir, pull, drv, enable); /* lcdc_blu4 */
226 gpio_tlmm_config(24, func, dir, pull, drv, enable); /* lcdc_blu3 */
227 gpio_tlmm_config(25, func, dir, pull, drv, enable); /* lcdc_blu2 */
228 gpio_tlmm_config(26, func, dir, pull, drv, enable); /* lcdc_blu1 */
229 gpio_tlmm_config(27, func, dir, pull, drv, enable); /* lcdc_blu0 */
230}
231
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700232/* API to set backlight level configuring PWM in PM8058 */
233
234int panel_set_backlight(uint8_t bt_level)
Shashank Mittal402d0972010-09-29 10:09:52 -0700235{
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700236 int rc = -1;
237 uint32_t duty_us, period_us;
Shashank Mittal402d0972010-09-29 10:09:52 -0700238
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700239 if((bt_level <= 0) || (bt_level > 15))
240 {
241 dprintf(CRITICAL, "Error in brightness level (1-15 allowed)\n");
242 goto bail_out;
243 }
244
245 duty_us = bt_level*PWM_DUTY_LEVEL;
246 period_us = PWM_PERIOD_USEC;
247 rc = pm_pwm_config(0, duty_us, period_us);
248 if(rc)
249 {
250 dprintf(CRITICAL, "Error in pwm_config0\n");
251 goto bail_out;
252 }
253
254 duty_us = PWM_PERIOD_USEC - (bt_level*PWM_DUTY_LEVEL);
255 period_us = PWM_PERIOD_USEC;
256 rc = pm_pwm_config(1, duty_us, period_us);
257 if(rc)
258 {
259 dprintf(CRITICAL, "Error in pwm_config1\n");
260 goto bail_out;
261 }
262
263 rc = pm_pwm_enable(0);
264 if(rc)
265 {
266 dprintf(CRITICAL, "Error in pwm_enable0\n");
267 goto bail_out;
268 }
269
270 rc = pm_pwm_enable(1);
271 if(rc)
272 dprintf(CRITICAL, "Error in pwm_enable1\n");
273
274bail_out:
275 return rc;
276}
277
278void bl_gpio_init(void)
279{
280 /* Configure PM8058 GPIO24 as a PWM driver (LPG ch0) for chain 1 of 6 LEDs */
281 pm8058_write_one(0x81, GPIO24_GPIO_CNTRL); /* Write, Bank0, VIN0, Mode
Shashank Mittal402d0972010-09-29 10:09:52 -0700282 selection enabled */
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700283 pm8058_write_one(0x98, GPIO24_GPIO_CNTRL); /* Write, Bank1, OutOn/InOff,
Shashank Mittal402d0972010-09-29 10:09:52 -0700284 CMOS, Don't Invert Output */
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700285 pm8058_write_one(0xAA, GPIO24_GPIO_CNTRL); /* Write, Bank2, GPIO no pull */
286 pm8058_write_one(0xB4, GPIO24_GPIO_CNTRL); /* Write, Bank3, high drv
Shashank Mittal402d0972010-09-29 10:09:52 -0700287 strength */
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700288 pm8058_write_one(0xC6, GPIO24_GPIO_CNTRL); /* Write, Bank4, Src: LPG_DRV1
Shashank Mittal402d0972010-09-29 10:09:52 -0700289 (Spec. Fnc 2) */
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700290 pm8058_write_one(0xD8, GPIO24_GPIO_CNTRL); /* Write, Bank5, Interrupt
Shashank Mittal402d0972010-09-29 10:09:52 -0700291 polarity noninversion */
292
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700293 /* Configure PM8058 GPIO25 as a PWM driver (LPG ch1) for chain 2 of 5 LEDs */
294 pm8058_write_one(0x81, GPIO25_GPIO_CNTRL); /* Write, Bank0, VIN0, Mode
Shashank Mittal402d0972010-09-29 10:09:52 -0700295 selection enabled */
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700296 pm8058_write_one(0x98, GPIO25_GPIO_CNTRL); /* Write, Bank1, OutOn/InOff,
Shashank Mittal402d0972010-09-29 10:09:52 -0700297 CMOS, Don't Invert Output */
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700298 pm8058_write_one(0xAA, GPIO25_GPIO_CNTRL); /* Write, Bank2, GPIO no pull */
299 pm8058_write_one(0xB4, GPIO25_GPIO_CNTRL); /* Write, Bank3, high drv
Shashank Mittal402d0972010-09-29 10:09:52 -0700300 strength */
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700301 pm8058_write_one(0xC6, GPIO25_GPIO_CNTRL); /* Write, Bank4, Src: LPG_DRV2
Shashank Mittal402d0972010-09-29 10:09:52 -0700302 (Spec. Fnc 2) */
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700303 pm8058_write_one(0xD8, GPIO25_GPIO_CNTRL); /* Write, Bank5, Interrupt
Shashank Mittal402d0972010-09-29 10:09:52 -0700304 polarity noninversion */
Shashank Mittal402d0972010-09-29 10:09:52 -0700305}
306
307void board_lcd_enable(void)
308{
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700309 int rc = -1;
Shashank Mittal402d0972010-09-29 10:09:52 -0700310 dev = qup_i2c_init(GSBI8_BASE, 100000, 24000000);
311
312 /* Make sure dev is created and initialized properly */
313 if (!dev) {
314 while (1) ;
315 return;
316 }
317
318 /* Store current value of these registers as to not destroy their previous
319 state. */
320 uint8_t open_drain_a = expander_read(GPIO_EXPANDER_REG_OPEN_DRAIN_A);
321 uint8_t dir_b = expander_read(GPIO_EXPANDER_REG_DIR_B);
322 uint8_t dir_a = expander_read(GPIO_EXPANDER_REG_DIR_A);
323 uint8_t data_b = expander_read(GPIO_EXPANDER_REG_DATA_B);
324 uint8_t data_a = expander_read(GPIO_EXPANDER_REG_DATA_A);
325
326 /* Set the LVDS_SHUTDOWN_N to open drain and output low. */
327 dprintf(INFO, "Enable lvds_shutdown_n line for Open Drain.\n");
328 expander_write(GPIO_EXPANDER_REG_OPEN_DRAIN_A, 0x04 | open_drain_a);
329
330 dprintf(INFO, "Enable lvds_shutdown_n line for output.\n");
331 expander_write(GPIO_EXPANDER_REG_DIR_A, ~0x04 & dir_a);
332
333 dprintf(INFO, "Drive the LVDS_SHUTDOWN_N pin high here.\n");
334 expander_write(GPIO_EXPANDER_REG_DATA_A, 0x04 | data_a);
335
336 /* Turn on the VREG_L2B to 3.3V. */
337
338 /* Power on the appropiate PMIC LDO power rails */
339 if (lcd_power_on())
340 return;
341
342 /* Enable the GPIO as LCDC mode LCD. */
343 lcd_gpio_cfg(1);
344
345 /* Arbitrary delay */
346 udelay(20000);
347
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700348 /* Set the GPIOs needed for backlight */
349 bl_gpio_init();
350 /* Set backlight level with API (to 8 by default) */
351 rc = panel_set_backlight(8);
352 if(rc)
353 dprintf(CRITICAL,"Error in setting panel backlight\n");
Shashank Mittal402d0972010-09-29 10:09:52 -0700354
355 dprintf(INFO, "Enable BACKLIGHT_EN line for output.\n");
356 expander_write(GPIO_EXPANDER_REG_DIR_B, ~0x10 & dir_b);
357
358 dprintf(INFO, "Drive BACKLIGHT_EN to high\n");
359 expander_write(GPIO_EXPANDER_REG_DATA_B, 0x10 | data_b);
360
361}
362
363void mdp_clock_init(void)
364{
Shashank Mittal402d0972010-09-29 10:09:52 -0700365 /* Turn on the PLL2, to ramp up the MDP clock to max (200MHz) */
366 nt_pll_enable(PLL_2, 1);
367
368 config_mdp_clk(MDP_NS_VAL, MDP_MD_VAL,
369 MDP_CC_VAL, MDP_NS_REG, MDP_MD_REG, MDP_CC_REG);
370
371 config_pixel_clk(PIXEL_NS_VAL, PIXEL_MD_VAL,
372 PIXEL_CC_VAL, LCD_PIXEL_NS_REG,
373 LCD_PIXEL_MD_REG, LCD_PIXEL_CC_REG);
374}
375
376void lcdc_on(void)
377{
378 board_lcd_enable();
379}