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Kinson Chik18e36332011-08-15 10:07:28 -07001/* Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved.
2 *
3 * Redistribution and use in source and binary forms, with or without
4 * modification, are permitted provided that the following conditions are met:
5 * * Redistributions of source code must retain the above copyright
6 * notice, this list of conditions and the following disclaimer.
7 * * Redistributions in binary form must reproduce the above copyright
8 * notice, this list of conditions and the following disclaimer in the
9 * documentation and/or other materials provided with the distribution.
10 * * Neither the name of Code Aurora nor
11 * the names of its contributors may be used to endorse or promote
12 * products derived from this software without specific prior written
13 * permission.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
19 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
20 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
21 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
22 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
23 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
24 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
25 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 *
27 */
28
29#ifndef __IRQS_9615_H
30#define __IRQS_9615_H
31
32/* MSM ACPU Interrupt Numbers */
33
34/* 0-15: STI/SGI (software triggered/generated interrupts)
35 * 16-31: PPI (private peripheral interrupts)
36 * 32+: SPI (shared peripheral interrupts)
37 */
38
39#define GIC_PPI_START 16
40#define GIC_SPI_START 32
41
42#define INT_DEBUG_TIMER_EXP (GIC_PPI_START + 1)
43
44#define USB1_HS_BAM_IRQ (GIC_SPI_START + 94)
45#define USB1_HS_IRQ (GIC_SPI_START + 100)
46#define USB2_IRQ (GIC_SPI_START + 141)
47#define USB1_IRQ (GIC_SPI_START + 142)
48
49#define GSBI_QUP_IRQ(id) ((id) <= 8 ? (GIC_SPI_START + 145 + 2*((id))) : \
50 (GIC_SPI_START + 187 + 2*((id)-8)))
51
52
53/* Retrofit universal macro names */
54#define INT_USB_HS USB1_HS_IRQ
55
56#define NR_MSM_IRQS 256
57#define NR_GPIO_IRQS 173
58#define NR_BOARD_IRQS 0
59
60#define NR_IRQS (NR_MSM_IRQS + NR_GPIO_IRQS + NR_BOARD_IRQS)
61
62#endif /* __IRQS_9615_H */