Subbaraman Narayanamurthy | 8c7cd22 | 2011-06-16 18:24:28 -0700 | [diff] [blame] | 1 | /* |
| 2 | * * Copyright (c) 2011, Code Aurora Forum. All rights reserved. |
| 3 | * |
| 4 | * Redistribution and use in source and binary forms, with or without |
| 5 | * modification, are permitted provided that the following conditions are |
| 6 | * met: |
| 7 | * * Redistributions of source code must retain the above copyright |
| 8 | * notice, this list of conditions and the following disclaimer. |
| 9 | * * Redistributions in binary form must reproduce the above |
| 10 | * copyright notice, this list of conditions and the following |
| 11 | * disclaimer in the documentation and/or other materials provided |
| 12 | * with the distribution. |
| 13 | * * Neither the name of Code Aurora Forum, Inc. nor the names of its |
| 14 | * contributors may be used to endorse or promote products derived |
| 15 | * from this software without specific prior written permission. |
| 16 | * |
| 17 | * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED |
| 18 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| 19 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT |
| 20 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS |
| 21 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 22 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 23 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR |
| 24 | * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, |
| 25 | * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE |
| 26 | * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN |
| 27 | * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 28 | */ |
| 29 | |
| 30 | #ifndef __PMIC_BATT_ALARM_H |
| 31 | #define __PMIC_BATT_ALARM_H |
| 32 | |
| 33 | #define BIT(x) (1 << (x)) |
| 34 | |
| 35 | /* PM8058 Battery alarm control registers */ |
| 36 | #define PM8058_REG_THRESHOLD 0x023 |
| 37 | #define PM8058_REG_CTRL1 0x024 |
| 38 | #define PM8058_REG_CTRL2 0x0AA |
| 39 | #define PM8058_REG_PWM_CTRL 0x0A3 |
| 40 | |
| 41 | /* Available voltage threshold values */ |
| 42 | #define THRESHOLD_MIN_MV 2500 |
| 43 | #define THRESHOLD_MAX_MV 5675 |
| 44 | #define THRESHOLD_STEP_MV 25 |
| 45 | |
| 46 | /* Register bit definitions */ |
| 47 | |
| 48 | /* Threshold register */ |
| 49 | #define THRESHOLD_UPPER_MASK 0xF0 |
| 50 | #define THRESHOLD_LOWER_MASK 0x0F |
| 51 | #define THRESHOLD_UPPER_SHIFT 4 |
| 52 | #define THRESHOLD_LOWER_SHIFT 0 |
| 53 | |
| 54 | /* CTRL 1 register */ |
| 55 | #define CTRL1_BATT_ALARM_EN_MASK 0x80 |
| 56 | #define CTRL1_HOLD_TIME_MASK 0x70 |
| 57 | #define CTRL1_STATUS_UPPER_MASK 0x02 |
| 58 | #define CTRL1_STATUS_LOWER_MASK 0x01 |
| 59 | #define CTRL1_HOLD_TIME_SHIFT 4 |
| 60 | #define CTRL1_HOLD_TIME_MIN 0 |
| 61 | #define CTRL1_HOLD_TIME_MAX 7 |
| 62 | |
| 63 | /* CTRL 2 register */ |
| 64 | #define CTRL2_COMP_UPPER_DISABLE_MASK 0x80 |
| 65 | #define CTRL2_COMP_LOWER_DISABLE_MASK 0x40 |
| 66 | #define CTRL2_FINE_STEP_UPPER_MASK 0x30 |
| 67 | #define CTRL2_RANGE_EXT_UPPER_MASK 0x08 |
| 68 | #define CTRL2_FINE_STEP_LOWER_MASK 0x06 |
| 69 | #define CTRL2_RANGE_EXT_LOWER_MASK 0x01 |
| 70 | #define CTRL2_FINE_STEP_UPPER_SHIFT 4 |
| 71 | #define CTRL2_FINE_STEP_LOWER_SHIFT 1 |
| 72 | |
| 73 | /* PWM control register */ |
| 74 | #define PWM_CTRL_ALARM_EN_MASK 0xC0 |
| 75 | #define PWM_CTRL_ALARM_EN_NEVER 0x00 |
| 76 | #define PWM_CTRL_ALARM_EN_TCXO 0x40 |
| 77 | #define PWM_CTRL_ALARM_EN_PWM 0x80 |
| 78 | #define PWM_CTRL_ALARM_EN_ALWAYS 0xC0 |
| 79 | #define PWM_CTRL_PRE_MASK 0x38 |
| 80 | #define PWM_CTRL_DIV_MASK 0x07 |
| 81 | #define PWM_CTRL_PRE_SHIFT 3 |
| 82 | #define PWM_CTRL_DIV_SHIFT 0 |
| 83 | #define PWM_CTRL_PRE_MIN 0 |
| 84 | #define PWM_CTRL_PRE_MAX 7 |
| 85 | #define PWM_CTRL_DIV_MIN 1 |
| 86 | #define PWM_CTRL_DIV_MAX 7 |
| 87 | |
| 88 | /* PWM control input range */ |
| 89 | #define PWM_CTRL_PRE_INPUT_MIN 2 |
| 90 | #define PWM_CTRL_PRE_INPUT_MAX 9 |
| 91 | #define PWM_CTRL_DIV_INPUT_MIN 2 |
| 92 | #define PWM_CTRL_DIV_INPUT_MAX 8 |
| 93 | |
| 94 | /* Available voltage threshold values */ |
| 95 | #define THRESHOLD_BASIC_MIN_MV 2800 |
| 96 | #define THRESHOLD_EXT_MIN_MV 4400 |
| 97 | |
| 98 | #define DEFAULT_THRESHOLD_LOWER 3200 |
| 99 | #define DEFAULT_THRESHOLD_UPPER 4300 |
| 100 | #define DEFAULT_HOLD_TIME HOLD_TIME_16_MS |
| 101 | #define DISABLE_USE_PWM 0 |
| 102 | #define ENABLE_USE_PWM 1 |
| 103 | #define DEFAULT_PWM_SCALER 9 |
| 104 | #define DEFAULT_PWM_DIVIDER 8 |
| 105 | #define LOWER_COMP_DISABLE 0 |
| 106 | #define UPPER_COMP_DISABLE 0 |
| 107 | #define LOWER_COMP_ENABLE 1 |
| 108 | #define UPPER_COMP_ENABLE 1 |
| 109 | |
| 110 | #define PM_BATT_ALARM_STATUS_BELOW_LOWER BIT(0) |
| 111 | #define PM_BATT_ALARM_STATUS_ABOVE_UPPER BIT(1) |
| 112 | |
| 113 | typedef enum { |
| 114 | HOLD_TIME_0p125_MS = 0, |
| 115 | HOLD_TIME_0p25_MS, |
| 116 | HOLD_TIME_0p5_MS, |
| 117 | HOLD_TIME_1_MS, |
| 118 | HOLD_TIME_2_MS, |
| 119 | HOLD_TIME_4_MS, |
| 120 | HOLD_TIME_8_MS, |
| 121 | HOLD_TIME_16_MS, |
Ajay Dudani | b01e506 | 2011-12-03 23:23:42 -0800 | [diff] [blame] | 122 | } pm_batt_alarm_hold_time; |
Subbaraman Narayanamurthy | 8c7cd22 | 2011-06-16 18:24:28 -0700 | [diff] [blame] | 123 | |
| 124 | typedef enum { |
| 125 | ALARM_EN_NEVER = 0, |
| 126 | ALARM_EN_PWM, |
| 127 | ALARM_EN_ALWAYS, |
Ajay Dudani | b01e506 | 2011-12-03 23:23:42 -0800 | [diff] [blame] | 128 | } pm_batt_alarm_pwm_ctrl; |
Subbaraman Narayanamurthy | 8c7cd22 | 2011-06-16 18:24:28 -0700 | [diff] [blame] | 129 | |
| 130 | struct pm_batt_alarm_device { |
| 131 | uint8_t reg_threshold; |
| 132 | uint8_t reg_ctrl1; |
| 133 | uint8_t reg_ctrl2; |
| 134 | uint8_t reg_pwm_ctrl; |
| 135 | }; |
| 136 | |
| 137 | extern int pm8058_mwrite(uint16_t addr, uint8_t val, uint8_t mask, |
Ajay Dudani | b01e506 | 2011-12-03 23:23:42 -0800 | [diff] [blame] | 138 | uint8_t * reg_save); |
| 139 | extern int pm8058_read(uint16_t addr, uint8_t * data, uint16_t length); |
Subbaraman Narayanamurthy | 8c7cd22 | 2011-06-16 18:24:28 -0700 | [diff] [blame] | 140 | extern void mdelay(uint32_t ms); |
| 141 | |
| 142 | #endif |